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-rw-r--r--include/asm-ia64/topology.h128
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diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h
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1/*
2 * linux/include/asm-ia64/topology.h
3 *
4 * Copyright (C) 2002, Erich Focht, NEC
5 *
6 * All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13#ifndef _ASM_IA64_TOPOLOGY_H
14#define _ASM_IA64_TOPOLOGY_H
15
16#include <asm/acpi.h>
17#include <asm/numa.h>
18#include <asm/smp.h>
19
20#ifdef CONFIG_NUMA
21
22/* Nodes w/o CPUs are preferred for memory allocations, see build_zonelists */
23#define PENALTY_FOR_NODE_WITH_CPUS 255
24
25/*
26 * Distance above which we begin to use zone reclaim
27 */
28#define RECLAIM_DISTANCE 15
29
30/*
31 * Returns the number of the node containing CPU 'cpu'
32 */
33#define cpu_to_node(cpu) (int)(cpu_to_node_map[cpu])
34
35/*
36 * Returns a bitmask of CPUs on Node 'node'.
37 */
38#define node_to_cpumask(node) (node_to_cpu_mask[node])
39
40/*
41 * Returns the number of the node containing Node 'nid'.
42 * Not implemented here. Multi-level hierarchies detected with
43 * the help of node_distance().
44 */
45#define parent_node(nid) (nid)
46
47/*
48 * Returns the number of the first CPU on Node 'node'.
49 */
50#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node)))
51
52/*
53 * Determines the node for a given pci bus
54 */
55#define pcibus_to_node(bus) PCI_CONTROLLER(bus)->node
56
57void build_cpu_to_node_map(void);
58
59#define SD_CPU_INIT (struct sched_domain) { \
60 .span = CPU_MASK_NONE, \
61 .parent = NULL, \
62 .child = NULL, \
63 .groups = NULL, \
64 .min_interval = 1, \
65 .max_interval = 4, \
66 .busy_factor = 64, \
67 .imbalance_pct = 125, \
68 .cache_nice_tries = 2, \
69 .busy_idx = 2, \
70 .idle_idx = 1, \
71 .newidle_idx = 2, \
72 .wake_idx = 1, \
73 .forkexec_idx = 1, \
74 .flags = SD_LOAD_BALANCE \
75 | SD_BALANCE_NEWIDLE \
76 | SD_BALANCE_EXEC \
77 | SD_WAKE_AFFINE, \
78 .last_balance = jiffies, \
79 .balance_interval = 1, \
80 .nr_balance_failed = 0, \
81}
82
83/* sched_domains SD_NODE_INIT for IA64 NUMA machines */
84#define SD_NODE_INIT (struct sched_domain) { \
85 .span = CPU_MASK_NONE, \
86 .parent = NULL, \
87 .child = NULL, \
88 .groups = NULL, \
89 .min_interval = 8, \
90 .max_interval = 8*(min(num_online_cpus(), 32)), \
91 .busy_factor = 64, \
92 .imbalance_pct = 125, \
93 .cache_nice_tries = 2, \
94 .busy_idx = 3, \
95 .idle_idx = 2, \
96 .newidle_idx = 2, \
97 .wake_idx = 1, \
98 .forkexec_idx = 1, \
99 .flags = SD_LOAD_BALANCE \
100 | SD_BALANCE_EXEC \
101 | SD_BALANCE_FORK \
102 | SD_SERIALIZE \
103 | SD_WAKE_BALANCE, \
104 .last_balance = jiffies, \
105 .balance_interval = 64, \
106 .nr_balance_failed = 0, \
107}
108
109#endif /* CONFIG_NUMA */
110
111#ifdef CONFIG_SMP
112#define topology_physical_package_id(cpu) (cpu_data(cpu)->socket_id)
113#define topology_core_id(cpu) (cpu_data(cpu)->core_id)
114#define topology_core_siblings(cpu) (cpu_core_map[cpu])
115#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu))
116#define smt_capable() (smp_num_siblings > 1)
117#endif
118
119extern void arch_fix_phys_package_id(int num, u32 slot);
120
121#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \
122 CPU_MASK_ALL : \
123 node_to_cpumask(pcibus_to_node(bus)) \
124 )
125
126#include <asm-generic/topology.h>
127
128#endif /* _ASM_IA64_TOPOLOGY_H */