diff options
Diffstat (limited to 'include/asm-ia64/sn')
-rw-r--r-- | include/asm-ia64/sn/bte.h | 53 | ||||
-rw-r--r-- | include/asm-ia64/sn/nodepda.h | 4 | ||||
-rw-r--r-- | include/asm-ia64/sn/pda.h | 3 | ||||
-rw-r--r-- | include/asm-ia64/sn/shub_mmr.h | 20 |
4 files changed, 69 insertions, 11 deletions
diff --git a/include/asm-ia64/sn/bte.h b/include/asm-ia64/sn/bte.h index 0ec27f99c181..f50da3d91d07 100644 --- a/include/asm-ia64/sn/bte.h +++ b/include/asm-ia64/sn/bte.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved. | 6 | * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | 9 | ||
@@ -13,8 +13,12 @@ | |||
13 | #include <linux/timer.h> | 13 | #include <linux/timer.h> |
14 | #include <linux/spinlock.h> | 14 | #include <linux/spinlock.h> |
15 | #include <linux/cache.h> | 15 | #include <linux/cache.h> |
16 | #include <asm/sn/pda.h> | ||
16 | #include <asm/sn/types.h> | 17 | #include <asm/sn/types.h> |
18 | #include <asm/sn/shub_mmr.h> | ||
17 | 19 | ||
20 | #define IBCT_NOTIFY (0x1UL << 4) | ||
21 | #define IBCT_ZFIL_MODE (0x1UL << 0) | ||
18 | 22 | ||
19 | /* #define BTE_DEBUG */ | 23 | /* #define BTE_DEBUG */ |
20 | /* #define BTE_DEBUG_VERBOSE */ | 24 | /* #define BTE_DEBUG_VERBOSE */ |
@@ -39,8 +43,36 @@ | |||
39 | 43 | ||
40 | 44 | ||
41 | /* Define hardware */ | 45 | /* Define hardware */ |
42 | #define BTES_PER_NODE 2 | 46 | #define BTES_PER_NODE (is_shub2() ? 4 : 2) |
47 | #define MAX_BTES_PER_NODE 4 | ||
43 | 48 | ||
49 | #define BTE2OFF_CTRL (0) | ||
50 | #define BTE2OFF_SRC (SH2_BT_ENG_SRC_ADDR_0 - SH2_BT_ENG_CSR_0) | ||
51 | #define BTE2OFF_DEST (SH2_BT_ENG_DEST_ADDR_0 - SH2_BT_ENG_CSR_0) | ||
52 | #define BTE2OFF_NOTIFY (SH2_BT_ENG_NOTIF_ADDR_0 - SH2_BT_ENG_CSR_0) | ||
53 | |||
54 | #define BTE_BASE_ADDR(interface) \ | ||
55 | (is_shub2() ? (interface == 0) ? SH2_BT_ENG_CSR_0 : \ | ||
56 | (interface == 1) ? SH2_BT_ENG_CSR_1 : \ | ||
57 | (interface == 2) ? SH2_BT_ENG_CSR_2 : \ | ||
58 | SH2_BT_ENG_CSR_3 \ | ||
59 | : (interface == 0) ? IIO_IBLS0 : IIO_IBLS1) | ||
60 | |||
61 | #define BTE_SOURCE_ADDR(base) \ | ||
62 | (is_shub2() ? base + (BTE2OFF_SRC/8) \ | ||
63 | : base + (BTEOFF_SRC/8)) | ||
64 | |||
65 | #define BTE_DEST_ADDR(base) \ | ||
66 | (is_shub2() ? base + (BTE2OFF_DEST/8) \ | ||
67 | : base + (BTEOFF_DEST/8)) | ||
68 | |||
69 | #define BTE_CTRL_ADDR(base) \ | ||
70 | (is_shub2() ? base + (BTE2OFF_CTRL/8) \ | ||
71 | : base + (BTEOFF_CTRL/8)) | ||
72 | |||
73 | #define BTE_NOTIF_ADDR(base) \ | ||
74 | (is_shub2() ? base + (BTE2OFF_NOTIFY/8) \ | ||
75 | : base + (BTEOFF_NOTIFY/8)) | ||
44 | 76 | ||
45 | /* Define hardware modes */ | 77 | /* Define hardware modes */ |
46 | #define BTE_NOTIFY (IBCT_NOTIFY) | 78 | #define BTE_NOTIFY (IBCT_NOTIFY) |
@@ -68,14 +100,18 @@ | |||
68 | #define BTE_LNSTAT_STORE(_bte, _x) \ | 100 | #define BTE_LNSTAT_STORE(_bte, _x) \ |
69 | HUB_S(_bte->bte_base_addr, (_x)) | 101 | HUB_S(_bte->bte_base_addr, (_x)) |
70 | #define BTE_SRC_STORE(_bte, _x) \ | 102 | #define BTE_SRC_STORE(_bte, _x) \ |
71 | HUB_S(_bte->bte_base_addr + (BTEOFF_SRC/8), (_x)) | 103 | HUB_S(_bte->bte_source_addr, (_x)) |
72 | #define BTE_DEST_STORE(_bte, _x) \ | 104 | #define BTE_DEST_STORE(_bte, _x) \ |
73 | HUB_S(_bte->bte_base_addr + (BTEOFF_DEST/8), (_x)) | 105 | HUB_S(_bte->bte_destination_addr, (_x)) |
74 | #define BTE_CTRL_STORE(_bte, _x) \ | 106 | #define BTE_CTRL_STORE(_bte, _x) \ |
75 | HUB_S(_bte->bte_base_addr + (BTEOFF_CTRL/8), (_x)) | 107 | HUB_S(_bte->bte_control_addr, (_x)) |
76 | #define BTE_NOTIF_STORE(_bte, _x) \ | 108 | #define BTE_NOTIF_STORE(_bte, _x) \ |
77 | HUB_S(_bte->bte_base_addr + (BTEOFF_NOTIFY/8), (_x)) | 109 | HUB_S(_bte->bte_notify_addr, (_x)) |
78 | 110 | ||
111 | #define BTE_START_TRANSFER(_bte, _len, _mode) \ | ||
112 | is_shub2() ? BTE_CTRL_STORE(_bte, IBLS_BUSY | (_mode << 24) | _len) \ | ||
113 | : BTE_LNSTAT_STORE(_bte, _len); \ | ||
114 | BTE_CTRL_STORE(_bte, _mode) | ||
79 | 115 | ||
80 | /* Possible results from bte_copy and bte_unaligned_copy */ | 116 | /* Possible results from bte_copy and bte_unaligned_copy */ |
81 | /* The following error codes map into the BTE hardware codes | 117 | /* The following error codes map into the BTE hardware codes |
@@ -110,6 +146,10 @@ typedef enum { | |||
110 | struct bteinfo_s { | 146 | struct bteinfo_s { |
111 | volatile u64 notify ____cacheline_aligned; | 147 | volatile u64 notify ____cacheline_aligned; |
112 | u64 *bte_base_addr ____cacheline_aligned; | 148 | u64 *bte_base_addr ____cacheline_aligned; |
149 | u64 *bte_source_addr; | ||
150 | u64 *bte_destination_addr; | ||
151 | u64 *bte_control_addr; | ||
152 | u64 *bte_notify_addr; | ||
113 | spinlock_t spinlock; | 153 | spinlock_t spinlock; |
114 | cnodeid_t bte_cnode; /* cnode */ | 154 | cnodeid_t bte_cnode; /* cnode */ |
115 | int bte_error_count; /* Number of errors encountered */ | 155 | int bte_error_count; /* Number of errors encountered */ |
@@ -117,6 +157,7 @@ struct bteinfo_s { | |||
117 | int cleanup_active; /* Interface is locked for cleanup */ | 157 | int cleanup_active; /* Interface is locked for cleanup */ |
118 | volatile bte_result_t bh_error; /* error while processing */ | 158 | volatile bte_result_t bh_error; /* error while processing */ |
119 | volatile u64 *most_rcnt_na; | 159 | volatile u64 *most_rcnt_na; |
160 | struct bteinfo_s *btes_to_try[MAX_BTES_PER_NODE]; | ||
120 | }; | 161 | }; |
121 | 162 | ||
122 | 163 | ||
diff --git a/include/asm-ia64/sn/nodepda.h b/include/asm-ia64/sn/nodepda.h index 2fbde33656e6..13cc1002b294 100644 --- a/include/asm-ia64/sn/nodepda.h +++ b/include/asm-ia64/sn/nodepda.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | #ifndef _ASM_IA64_SN_NODEPDA_H | 8 | #ifndef _ASM_IA64_SN_NODEPDA_H |
9 | #define _ASM_IA64_SN_NODEPDA_H | 9 | #define _ASM_IA64_SN_NODEPDA_H |
@@ -43,7 +43,7 @@ struct nodepda_s { | |||
43 | /* | 43 | /* |
44 | * The BTEs on this node are shared by the local cpus | 44 | * The BTEs on this node are shared by the local cpus |
45 | */ | 45 | */ |
46 | struct bteinfo_s bte_if[BTES_PER_NODE]; /* Virtual Interface */ | 46 | struct bteinfo_s bte_if[MAX_BTES_PER_NODE]; /* Virtual Interface */ |
47 | struct timer_list bte_recovery_timer; | 47 | struct timer_list bte_recovery_timer; |
48 | spinlock_t bte_recovery_lock; | 48 | spinlock_t bte_recovery_lock; |
49 | 49 | ||
diff --git a/include/asm-ia64/sn/pda.h b/include/asm-ia64/sn/pda.h index e940d3647c80..cd19f17bf91a 100644 --- a/include/asm-ia64/sn/pda.h +++ b/include/asm-ia64/sn/pda.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. | 6 | * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. |
7 | */ | 7 | */ |
8 | #ifndef _ASM_IA64_SN_PDA_H | 8 | #ifndef _ASM_IA64_SN_PDA_H |
9 | #define _ASM_IA64_SN_PDA_H | 9 | #define _ASM_IA64_SN_PDA_H |
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/cache.h> | 11 | #include <linux/cache.h> |
12 | #include <asm/percpu.h> | 12 | #include <asm/percpu.h> |
13 | #include <asm/system.h> | 13 | #include <asm/system.h> |
14 | #include <asm/sn/bte.h> | ||
15 | 14 | ||
16 | 15 | ||
17 | /* | 16 | /* |
diff --git a/include/asm-ia64/sn/shub_mmr.h b/include/asm-ia64/sn/shub_mmr.h index 6ec37e816a9e..2f885088e095 100644 --- a/include/asm-ia64/sn/shub_mmr.h +++ b/include/asm-ia64/sn/shub_mmr.h | |||
@@ -4,7 +4,7 @@ | |||
4 | * License. See the file "COPYING" in the main directory of this archive | 4 | * License. See the file "COPYING" in the main directory of this archive |
5 | * for more details. | 5 | * for more details. |
6 | * | 6 | * |
7 | * Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved. | 7 | * Copyright (c) 2001-2005 Silicon Graphics, Inc. All rights reserved. |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #ifndef _ASM_IA64_SN_SHUB_MMR_H | 10 | #ifndef _ASM_IA64_SN_SHUB_MMR_H |
@@ -455,4 +455,22 @@ | |||
455 | #define SH_INT_CMPC shubmmr(SH, INT_CMPC) | 455 | #define SH_INT_CMPC shubmmr(SH, INT_CMPC) |
456 | #define SH_INT_CMPD shubmmr(SH, INT_CMPD) | 456 | #define SH_INT_CMPD shubmmr(SH, INT_CMPD) |
457 | 457 | ||
458 | /* ========================================================================== */ | ||
459 | /* Register "SH2_BT_ENG_CSR_0" */ | ||
460 | /* Engine 0 Control and Status Register */ | ||
461 | /* ========================================================================== */ | ||
462 | |||
463 | #define SH2_BT_ENG_CSR_0 0x0000000030040000 | ||
464 | #define SH2_BT_ENG_SRC_ADDR_0 0x0000000030040080 | ||
465 | #define SH2_BT_ENG_DEST_ADDR_0 0x0000000030040100 | ||
466 | #define SH2_BT_ENG_NOTIF_ADDR_0 0x0000000030040180 | ||
467 | |||
468 | /* ========================================================================== */ | ||
469 | /* BTE interfaces 1-3 */ | ||
470 | /* ========================================================================== */ | ||
471 | |||
472 | #define SH2_BT_ENG_CSR_1 0x0000000030050000 | ||
473 | #define SH2_BT_ENG_CSR_2 0x0000000030060000 | ||
474 | #define SH2_BT_ENG_CSR_3 0x0000000030070000 | ||
475 | |||
458 | #endif /* _ASM_IA64_SN_SHUB_MMR_H */ | 476 | #endif /* _ASM_IA64_SN_SHUB_MMR_H */ |