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1#ifndef _ASM_IA64_SAL_H
2#define _ASM_IA64_SAL_H
3
4/*
5 * System Abstraction Layer definitions.
6 *
7 * This is based on version 2.5 of the manual "IA-64 System
8 * Abstraction Layer".
9 *
10 * Copyright (C) 2001 Intel
11 * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
12 * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
13 * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
14 * David Mosberger-Tang <davidm@hpl.hp.com>
15 * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
16 *
17 * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
18 * revision of the SAL spec.
19 * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
20 * revision of the SAL spec.
21 * 99/09/29 davidm Updated for SAL 2.6.
22 * 00/03/29 cfleck Updated SAL Error Logging info for processor (SAL 2.6)
23 * (plus examples of platform error info structures from smariset @ Intel)
24 */
25
26#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT 0
27#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT 1
28#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT 2
29#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT 3
30
31#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
32#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
33#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
34#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
35
36#ifndef __ASSEMBLY__
37
38#include <linux/bcd.h>
39#include <linux/spinlock.h>
40#include <linux/efi.h>
41
42#include <asm/pal.h>
43#include <asm/system.h>
44#include <asm/fpu.h>
45
46extern spinlock_t sal_lock;
47
48/* SAL spec _requires_ eight args for each call. */
49#define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7) \
50 result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7)
51
52# define SAL_CALL(result,args...) do { \
53 unsigned long __ia64_sc_flags; \
54 struct ia64_fpreg __ia64_sc_fr[6]; \
55 ia64_save_scratch_fpregs(__ia64_sc_fr); \
56 spin_lock_irqsave(&sal_lock, __ia64_sc_flags); \
57 __SAL_CALL(result, args); \
58 spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags); \
59 ia64_load_scratch_fpregs(__ia64_sc_fr); \
60} while (0)
61
62# define SAL_CALL_NOLOCK(result,args...) do { \
63 unsigned long __ia64_scn_flags; \
64 struct ia64_fpreg __ia64_scn_fr[6]; \
65 ia64_save_scratch_fpregs(__ia64_scn_fr); \
66 local_irq_save(__ia64_scn_flags); \
67 __SAL_CALL(result, args); \
68 local_irq_restore(__ia64_scn_flags); \
69 ia64_load_scratch_fpregs(__ia64_scn_fr); \
70} while (0)
71
72# define SAL_CALL_REENTRANT(result,args...) do { \
73 struct ia64_fpreg __ia64_scs_fr[6]; \
74 ia64_save_scratch_fpregs(__ia64_scs_fr); \
75 preempt_disable(); \
76 __SAL_CALL(result, args); \
77 preempt_enable(); \
78 ia64_load_scratch_fpregs(__ia64_scs_fr); \
79} while (0)
80
81#define SAL_SET_VECTORS 0x01000000
82#define SAL_GET_STATE_INFO 0x01000001
83#define SAL_GET_STATE_INFO_SIZE 0x01000002
84#define SAL_CLEAR_STATE_INFO 0x01000003
85#define SAL_MC_RENDEZ 0x01000004
86#define SAL_MC_SET_PARAMS 0x01000005
87#define SAL_REGISTER_PHYSICAL_ADDR 0x01000006
88
89#define SAL_CACHE_FLUSH 0x01000008
90#define SAL_CACHE_INIT 0x01000009
91#define SAL_PCI_CONFIG_READ 0x01000010
92#define SAL_PCI_CONFIG_WRITE 0x01000011
93#define SAL_FREQ_BASE 0x01000012
94
95#define SAL_UPDATE_PAL 0x01000020
96
97struct ia64_sal_retval {
98 /*
99 * A zero status value indicates call completed without error.
100 * A negative status value indicates reason of call failure.
101 * A positive status value indicates success but an
102 * informational value should be printed (e.g., "reboot for
103 * change to take effect").
104 */
105 s64 status;
106 u64 v0;
107 u64 v1;
108 u64 v2;
109};
110
111typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
112
113enum {
114 SAL_FREQ_BASE_PLATFORM = 0,
115 SAL_FREQ_BASE_INTERVAL_TIMER = 1,
116 SAL_FREQ_BASE_REALTIME_CLOCK = 2
117};
118
119/*
120 * The SAL system table is followed by a variable number of variable
121 * length descriptors. The structure of these descriptors follows
122 * below.
123 * The defininition follows SAL specs from July 2000
124 */
125struct ia64_sal_systab {
126 u8 signature[4]; /* should be "SST_" */
127 u32 size; /* size of this table in bytes */
128 u8 sal_rev_minor;
129 u8 sal_rev_major;
130 u16 entry_count; /* # of entries in variable portion */
131 u8 checksum;
132 u8 reserved1[7];
133 u8 sal_a_rev_minor;
134 u8 sal_a_rev_major;
135 u8 sal_b_rev_minor;
136 u8 sal_b_rev_major;
137 /* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
138 u8 oem_id[32];
139 u8 product_id[32]; /* ASCII product id */
140 u8 reserved2[8];
141};
142
143enum sal_systab_entry_type {
144 SAL_DESC_ENTRY_POINT = 0,
145 SAL_DESC_MEMORY = 1,
146 SAL_DESC_PLATFORM_FEATURE = 2,
147 SAL_DESC_TR = 3,
148 SAL_DESC_PTC = 4,
149 SAL_DESC_AP_WAKEUP = 5
150};
151
152/*
153 * Entry type: Size:
154 * 0 48
155 * 1 32
156 * 2 16
157 * 3 32
158 * 4 16
159 * 5 16
160 */
161#define SAL_DESC_SIZE(type) "\060\040\020\040\020\020"[(unsigned) type]
162
163typedef struct ia64_sal_desc_entry_point {
164 u8 type;
165 u8 reserved1[7];
166 u64 pal_proc;
167 u64 sal_proc;
168 u64 gp;
169 u8 reserved2[16];
170}ia64_sal_desc_entry_point_t;
171
172typedef struct ia64_sal_desc_memory {
173 u8 type;
174 u8 used_by_sal; /* needs to be mapped for SAL? */
175 u8 mem_attr; /* current memory attribute setting */
176 u8 access_rights; /* access rights set up by SAL */
177 u8 mem_attr_mask; /* mask of supported memory attributes */
178 u8 reserved1;
179 u8 mem_type; /* memory type */
180 u8 mem_usage; /* memory usage */
181 u64 addr; /* physical address of memory */
182 u32 length; /* length (multiple of 4KB pages) */
183 u32 reserved2;
184 u8 oem_reserved[8];
185} ia64_sal_desc_memory_t;
186
187typedef struct ia64_sal_desc_platform_feature {
188 u8 type;
189 u8 feature_mask;
190 u8 reserved1[14];
191} ia64_sal_desc_platform_feature_t;
192
193typedef struct ia64_sal_desc_tr {
194 u8 type;
195 u8 tr_type; /* 0 == instruction, 1 == data */
196 u8 regnum; /* translation register number */
197 u8 reserved1[5];
198 u64 addr; /* virtual address of area covered */
199 u64 page_size; /* encoded page size */
200 u8 reserved2[8];
201} ia64_sal_desc_tr_t;
202
203typedef struct ia64_sal_desc_ptc {
204 u8 type;
205 u8 reserved1[3];
206 u32 num_domains; /* # of coherence domains */
207 u64 domain_info; /* physical address of domain info table */
208} ia64_sal_desc_ptc_t;
209
210typedef struct ia64_sal_ptc_domain_info {
211 u64 proc_count; /* number of processors in domain */
212 u64 proc_list; /* physical address of LID array */
213} ia64_sal_ptc_domain_info_t;
214
215typedef struct ia64_sal_ptc_domain_proc_entry {
216 u64 id : 8; /* id of processor */
217 u64 eid : 8; /* eid of processor */
218} ia64_sal_ptc_domain_proc_entry_t;
219
220
221#define IA64_SAL_AP_EXTERNAL_INT 0
222
223typedef struct ia64_sal_desc_ap_wakeup {
224 u8 type;
225 u8 mechanism; /* 0 == external interrupt */
226 u8 reserved1[6];
227 u64 vector; /* interrupt vector in range 0x10-0xff */
228} ia64_sal_desc_ap_wakeup_t ;
229
230extern ia64_sal_handler ia64_sal;
231extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
232
233extern unsigned short sal_revision; /* supported SAL spec revision */
234extern unsigned short sal_version; /* SAL version; OEM dependent */
235#define SAL_VERSION_CODE(major, minor) ((BIN2BCD(major) << 8) | BIN2BCD(minor))
236
237extern const char *ia64_sal_strerror (long status);
238extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
239
240/* SAL information type encodings */
241enum {
242 SAL_INFO_TYPE_MCA = 0, /* Machine check abort information */
243 SAL_INFO_TYPE_INIT = 1, /* Init information */
244 SAL_INFO_TYPE_CMC = 2, /* Corrected machine check information */
245 SAL_INFO_TYPE_CPE = 3 /* Corrected platform error information */
246};
247
248/* Encodings for machine check parameter types */
249enum {
250 SAL_MC_PARAM_RENDEZ_INT = 1, /* Rendezvous interrupt */
251 SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */
252 SAL_MC_PARAM_CPE_INT = 3 /* Corrected Platform Error Int */
253};
254
255/* Encodings for rendezvous mechanisms */
256enum {
257 SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */
258 SAL_MC_PARAM_MECHANISM_MEM = 2 /* Use memory synchronization variable*/
259};
260
261/* Encodings for vectors which can be registered by the OS with SAL */
262enum {
263 SAL_VECTOR_OS_MCA = 0,
264 SAL_VECTOR_OS_INIT = 1,
265 SAL_VECTOR_OS_BOOT_RENDEZ = 2
266};
267
268/* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
269#define SAL_MC_PARAM_RZ_ALWAYS 0x1
270#define SAL_MC_PARAM_BINIT_ESCALATE 0x10
271
272/*
273 * Definition of the SAL Error Log from the SAL spec
274 */
275
276/* SAL Error Record Section GUID Definitions */
277#define SAL_PROC_DEV_ERR_SECT_GUID \
278 EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
279#define SAL_PLAT_MEM_DEV_ERR_SECT_GUID \
280 EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
281#define SAL_PLAT_SEL_DEV_ERR_SECT_GUID \
282 EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
283#define SAL_PLAT_PCI_BUS_ERR_SECT_GUID \
284 EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
285#define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID \
286 EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
287#define SAL_PLAT_PCI_COMP_ERR_SECT_GUID \
288 EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
289#define SAL_PLAT_SPECIFIC_ERR_SECT_GUID \
290 EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
291#define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID \
292 EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
293#define SAL_PLAT_BUS_ERR_SECT_GUID \
294 EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
295
296#define MAX_CACHE_ERRORS 6
297#define MAX_TLB_ERRORS 6
298#define MAX_BUS_ERRORS 1
299
300/* Definition of version according to SAL spec for logging purposes */
301typedef struct sal_log_revision {
302 u8 minor; /* BCD (0..99) */
303 u8 major; /* BCD (0..99) */
304} sal_log_revision_t;
305
306/* Definition of timestamp according to SAL spec for logging purposes */
307typedef struct sal_log_timestamp {
308 u8 slh_second; /* Second (0..59) */
309 u8 slh_minute; /* Minute (0..59) */
310 u8 slh_hour; /* Hour (0..23) */
311 u8 slh_reserved;
312 u8 slh_day; /* Day (1..31) */
313 u8 slh_month; /* Month (1..12) */
314 u8 slh_year; /* Year (00..99) */
315 u8 slh_century; /* Century (19, 20, 21, ...) */
316} sal_log_timestamp_t;
317
318/* Definition of log record header structures */
319typedef struct sal_log_record_header {
320 u64 id; /* Unique monotonically increasing ID */
321 sal_log_revision_t revision; /* Major and Minor revision of header */
322 u16 severity; /* Error Severity */
323 u32 len; /* Length of this error log in bytes */
324 sal_log_timestamp_t timestamp; /* Timestamp */
325 efi_guid_t platform_guid; /* Unique OEM Platform ID */
326} sal_log_record_header_t;
327
328#define sal_log_severity_recoverable 0
329#define sal_log_severity_fatal 1
330#define sal_log_severity_corrected 2
331
332/* Definition of log section header structures */
333typedef struct sal_log_sec_header {
334 efi_guid_t guid; /* Unique Section ID */
335 sal_log_revision_t revision; /* Major and Minor revision of Section */
336 u16 reserved;
337 u32 len; /* Section length */
338} sal_log_section_hdr_t;
339
340typedef struct sal_log_mod_error_info {
341 struct {
342 u64 check_info : 1,
343 requestor_identifier : 1,
344 responder_identifier : 1,
345 target_identifier : 1,
346 precise_ip : 1,
347 reserved : 59;
348 } valid;
349 u64 check_info;
350 u64 requestor_identifier;
351 u64 responder_identifier;
352 u64 target_identifier;
353 u64 precise_ip;
354} sal_log_mod_error_info_t;
355
356typedef struct sal_processor_static_info {
357 struct {
358 u64 minstate : 1,
359 br : 1,
360 cr : 1,
361 ar : 1,
362 rr : 1,
363 fr : 1,
364 reserved : 58;
365 } valid;
366 pal_min_state_area_t min_state_area;
367 u64 br[8];
368 u64 cr[128];
369 u64 ar[128];
370 u64 rr[8];
371 struct ia64_fpreg __attribute__ ((packed)) fr[128];
372} sal_processor_static_info_t;
373
374struct sal_cpuid_info {
375 u64 regs[5];
376 u64 reserved;
377};
378
379typedef struct sal_log_processor_info {
380 sal_log_section_hdr_t header;
381 struct {
382 u64 proc_error_map : 1,
383 proc_state_param : 1,
384 proc_cr_lid : 1,
385 psi_static_struct : 1,
386 num_cache_check : 4,
387 num_tlb_check : 4,
388 num_bus_check : 4,
389 num_reg_file_check : 4,
390 num_ms_check : 4,
391 cpuid_info : 1,
392 reserved1 : 39;
393 } valid;
394 u64 proc_error_map;
395 u64 proc_state_parameter;
396 u64 proc_cr_lid;
397 /*
398 * The rest of this structure consists of variable-length arrays, which can't be
399 * expressed in C.
400 */
401 sal_log_mod_error_info_t info[0];
402 /*
403 * This is what the rest looked like if C supported variable-length arrays:
404 *
405 * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
406 * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
407 * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
408 * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
409 * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
410 * struct sal_cpuid_info cpuid_info;
411 * sal_processor_static_info_t processor_static_info;
412 */
413} sal_log_processor_info_t;
414
415/* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
416#define SAL_LPI_PSI_INFO(l) \
417({ sal_log_processor_info_t *_l = (l); \
418 ((sal_processor_static_info_t *) \
419 ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check \
420 + _l->valid.num_bus_check + _l->valid.num_reg_file_check \
421 + _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t) \
422 + sizeof(struct sal_cpuid_info)))); \
423})
424
425/* platform error log structures */
426
427typedef struct sal_log_mem_dev_err_info {
428 sal_log_section_hdr_t header;
429 struct {
430 u64 error_status : 1,
431 physical_addr : 1,
432 addr_mask : 1,
433 node : 1,
434 card : 1,
435 module : 1,
436 bank : 1,
437 device : 1,
438 row : 1,
439 column : 1,
440 bit_position : 1,
441 requestor_id : 1,
442 responder_id : 1,
443 target_id : 1,
444 bus_spec_data : 1,
445 oem_id : 1,
446 oem_data : 1,
447 reserved : 47;
448 } valid;
449 u64 error_status;
450 u64 physical_addr;
451 u64 addr_mask;
452 u16 node;
453 u16 card;
454 u16 module;
455 u16 bank;
456 u16 device;
457 u16 row;
458 u16 column;
459 u16 bit_position;
460 u64 requestor_id;
461 u64 responder_id;
462 u64 target_id;
463 u64 bus_spec_data;
464 u8 oem_id[16];
465 u8 oem_data[1]; /* Variable length data */
466} sal_log_mem_dev_err_info_t;
467
468typedef struct sal_log_sel_dev_err_info {
469 sal_log_section_hdr_t header;
470 struct {
471 u64 record_id : 1,
472 record_type : 1,
473 generator_id : 1,
474 evm_rev : 1,
475 sensor_type : 1,
476 sensor_num : 1,
477 event_dir : 1,
478 event_data1 : 1,
479 event_data2 : 1,
480 event_data3 : 1,
481 reserved : 54;
482 } valid;
483 u16 record_id;
484 u8 record_type;
485 u8 timestamp[4];
486 u16 generator_id;
487 u8 evm_rev;
488 u8 sensor_type;
489 u8 sensor_num;
490 u8 event_dir;
491 u8 event_data1;
492 u8 event_data2;
493 u8 event_data3;
494} sal_log_sel_dev_err_info_t;
495
496typedef struct sal_log_pci_bus_err_info {
497 sal_log_section_hdr_t header;
498 struct {
499 u64 err_status : 1,
500 err_type : 1,
501 bus_id : 1,
502 bus_address : 1,
503 bus_data : 1,
504 bus_cmd : 1,
505 requestor_id : 1,
506 responder_id : 1,
507 target_id : 1,
508 oem_data : 1,
509 reserved : 54;
510 } valid;
511 u64 err_status;
512 u16 err_type;
513 u16 bus_id;
514 u32 reserved;
515 u64 bus_address;
516 u64 bus_data;
517 u64 bus_cmd;
518 u64 requestor_id;
519 u64 responder_id;
520 u64 target_id;
521 u8 oem_data[1]; /* Variable length data */
522} sal_log_pci_bus_err_info_t;
523
524typedef struct sal_log_smbios_dev_err_info {
525 sal_log_section_hdr_t header;
526 struct {
527 u64 event_type : 1,
528 length : 1,
529 time_stamp : 1,
530 data : 1,
531 reserved1 : 60;
532 } valid;
533 u8 event_type;
534 u8 length;
535 u8 time_stamp[6];
536 u8 data[1]; /* data of variable length, length == slsmb_length */
537} sal_log_smbios_dev_err_info_t;
538
539typedef struct sal_log_pci_comp_err_info {
540 sal_log_section_hdr_t header;
541 struct {
542 u64 err_status : 1,
543 comp_info : 1,
544 num_mem_regs : 1,
545 num_io_regs : 1,
546 reg_data_pairs : 1,
547 oem_data : 1,
548 reserved : 58;
549 } valid;
550 u64 err_status;
551 struct {
552 u16 vendor_id;
553 u16 device_id;
554 u8 class_code[3];
555 u8 func_num;
556 u8 dev_num;
557 u8 bus_num;
558 u8 seg_num;
559 u8 reserved[5];
560 } comp_info;
561 u32 num_mem_regs;
562 u32 num_io_regs;
563 u64 reg_data_pairs[1];
564 /*
565 * array of address/data register pairs is num_mem_regs + num_io_regs elements
566 * long. Each array element consists of a u64 address followed by a u64 data
567 * value. The oem_data array immediately follows the reg_data_pairs array
568 */
569 u8 oem_data[1]; /* Variable length data */
570} sal_log_pci_comp_err_info_t;
571
572typedef struct sal_log_plat_specific_err_info {
573 sal_log_section_hdr_t header;
574 struct {
575 u64 err_status : 1,
576 guid : 1,
577 oem_data : 1,
578 reserved : 61;
579 } valid;
580 u64 err_status;
581 efi_guid_t guid;
582 u8 oem_data[1]; /* platform specific variable length data */
583} sal_log_plat_specific_err_info_t;
584
585typedef struct sal_log_host_ctlr_err_info {
586 sal_log_section_hdr_t header;
587 struct {
588 u64 err_status : 1,
589 requestor_id : 1,
590 responder_id : 1,
591 target_id : 1,
592 bus_spec_data : 1,
593 oem_data : 1,
594 reserved : 58;
595 } valid;
596 u64 err_status;
597 u64 requestor_id;
598 u64 responder_id;
599 u64 target_id;
600 u64 bus_spec_data;
601 u8 oem_data[1]; /* Variable length OEM data */
602} sal_log_host_ctlr_err_info_t;
603
604typedef struct sal_log_plat_bus_err_info {
605 sal_log_section_hdr_t header;
606 struct {
607 u64 err_status : 1,
608 requestor_id : 1,
609 responder_id : 1,
610 target_id : 1,
611 bus_spec_data : 1,
612 oem_data : 1,
613 reserved : 58;
614 } valid;
615 u64 err_status;
616 u64 requestor_id;
617 u64 responder_id;
618 u64 target_id;
619 u64 bus_spec_data;
620 u8 oem_data[1]; /* Variable length OEM data */
621} sal_log_plat_bus_err_info_t;
622
623/* Overall platform error section structure */
624typedef union sal_log_platform_err_info {
625 sal_log_mem_dev_err_info_t mem_dev_err;
626 sal_log_sel_dev_err_info_t sel_dev_err;
627 sal_log_pci_bus_err_info_t pci_bus_err;
628 sal_log_smbios_dev_err_info_t smbios_dev_err;
629 sal_log_pci_comp_err_info_t pci_comp_err;
630 sal_log_plat_specific_err_info_t plat_specific_err;
631 sal_log_host_ctlr_err_info_t host_ctlr_err;
632 sal_log_plat_bus_err_info_t plat_bus_err;
633} sal_log_platform_err_info_t;
634
635/* SAL log over-all, multi-section error record structure (processor+platform) */
636typedef struct err_rec {
637 sal_log_record_header_t sal_elog_header;
638 sal_log_processor_info_t proc_err;
639 sal_log_platform_err_info_t plat_err;
640 u8 oem_data_pad[1024];
641} ia64_err_rec_t;
642
643/*
644 * Now define a couple of inline functions for improved type checking
645 * and convenience.
646 */
647static inline long
648ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
649 unsigned long *drift_info)
650{
651 struct ia64_sal_retval isrv;
652
653 SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0);
654 *ticks_per_second = isrv.v0;
655 *drift_info = isrv.v1;
656 return isrv.status;
657}
658
659/* Flush all the processor and platform level instruction and/or data caches */
660static inline s64
661ia64_sal_cache_flush (u64 cache_type)
662{
663 struct ia64_sal_retval isrv;
664 SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
665 return isrv.status;
666}
667
668
669/* Initialize all the processor and platform level instruction and data caches */
670static inline s64
671ia64_sal_cache_init (void)
672{
673 struct ia64_sal_retval isrv;
674 SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
675 return isrv.status;
676}
677
678/*
679 * Clear the processor and platform information logged by SAL with respect to the machine
680 * state at the time of MCA's, INITs, CMCs, or CPEs.
681 */
682static inline s64
683ia64_sal_clear_state_info (u64 sal_info_type)
684{
685 struct ia64_sal_retval isrv;
686 SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
687 0, 0, 0, 0, 0);
688 return isrv.status;
689}
690
691
692/* Get the processor and platform information logged by SAL with respect to the machine
693 * state at the time of the MCAs, INITs, CMCs, or CPEs.
694 */
695static inline u64
696ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
697{
698 struct ia64_sal_retval isrv;
699 SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
700 sal_info, 0, 0, 0, 0);
701 if (isrv.status)
702 return 0;
703
704 return isrv.v0;
705}
706
707/*
708 * Get the maximum size of the information logged by SAL with respect to the machine state
709 * at the time of MCAs, INITs, CMCs, or CPEs.
710 */
711static inline u64
712ia64_sal_get_state_info_size (u64 sal_info_type)
713{
714 struct ia64_sal_retval isrv;
715 SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
716 0, 0, 0, 0, 0);
717 if (isrv.status)
718 return 0;
719 return isrv.v0;
720}
721
722/*
723 * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
724 * the monarch processor. Must not lock, because it will not return on any cpu until the
725 * monarch processor sends a wake up.
726 */
727static inline s64
728ia64_sal_mc_rendez (void)
729{
730 struct ia64_sal_retval isrv;
731 SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
732 return isrv.status;
733}
734
735/*
736 * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
737 * the machine check rendezvous sequence as well as the mechanism to wake up the
738 * non-monarch processor at the end of machine check processing.
739 * Returns the complete ia64_sal_retval because some calls return more than just a status
740 * value.
741 */
742static inline struct ia64_sal_retval
743ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
744{
745 struct ia64_sal_retval isrv;
746 SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
747 timeout, rz_always, 0, 0);
748 return isrv;
749}
750
751/* Read from PCI configuration space */
752static inline s64
753ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
754{
755 struct ia64_sal_retval isrv;
756 SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
757 if (value)
758 *value = isrv.v0;
759 return isrv.status;
760}
761
762/* Write to PCI configuration space */
763static inline s64
764ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
765{
766 struct ia64_sal_retval isrv;
767 SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
768 type, 0, 0, 0);
769 return isrv.status;
770}
771
772/*
773 * Register physical addresses of locations needed by SAL when SAL procedures are invoked
774 * in virtual mode.
775 */
776static inline s64
777ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
778{
779 struct ia64_sal_retval isrv;
780 SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
781 0, 0, 0, 0, 0);
782 return isrv.status;
783}
784
785/*
786 * Register software dependent code locations within SAL. These locations are handlers or
787 * entry points where SAL will pass control for the specified event. These event handlers
788 * are for the bott rendezvous, MCAs and INIT scenarios.
789 */
790static inline s64
791ia64_sal_set_vectors (u64 vector_type,
792 u64 handler_addr1, u64 gp1, u64 handler_len1,
793 u64 handler_addr2, u64 gp2, u64 handler_len2)
794{
795 struct ia64_sal_retval isrv;
796 SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
797 handler_addr1, gp1, handler_len1,
798 handler_addr2, gp2, handler_len2);
799
800 return isrv.status;
801}
802
803/* Update the contents of PAL block in the non-volatile storage device */
804static inline s64
805ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
806 u64 *error_code, u64 *scratch_buf_size_needed)
807{
808 struct ia64_sal_retval isrv;
809 SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
810 0, 0, 0, 0);
811 if (error_code)
812 *error_code = isrv.v0;
813 if (scratch_buf_size_needed)
814 *scratch_buf_size_needed = isrv.v1;
815 return isrv.status;
816}
817
818extern unsigned long sal_platform_features;
819
820extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
821
822struct sal_ret_values {
823 long r8; long r9; long r10; long r11;
824};
825
826#define IA64_SAL_OEMFUNC_MIN 0x02000000
827#define IA64_SAL_OEMFUNC_MAX 0x03ffffff
828
829extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64,
830 u64, u64, u64);
831extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64,
832 u64, u64, u64, u64, u64);
833extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
834 u64, u64, u64, u64, u64);
835
836extern void ia64_sal_handler_init(void *entry_point, void *gpval);
837
838#endif /* __ASSEMBLY__ */
839
840#endif /* _ASM_IA64_SAL_H */
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