diff options
Diffstat (limited to 'include/asm-ia64/pal.h')
-rw-r--r-- | include/asm-ia64/pal.h | 43 |
1 files changed, 41 insertions, 2 deletions
diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index 7423b10e8935..308e94f6299e 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h | |||
@@ -20,6 +20,8 @@ | |||
20 | * 00/05/24 eranian Updated to latest PAL spec, fix structures bugs, added | 20 | * 00/05/24 eranian Updated to latest PAL spec, fix structures bugs, added |
21 | * 00/05/25 eranian Support for stack calls, and static physical calls | 21 | * 00/05/25 eranian Support for stack calls, and static physical calls |
22 | * 00/06/18 eranian Support for stacked physical calls | 22 | * 00/06/18 eranian Support for stacked physical calls |
23 | * 06/10/26 rja Support for Intel Itanium Architecture Software Developer's | ||
24 | * Manual Rev 2.2 (Jan 2006) | ||
23 | */ | 25 | */ |
24 | 26 | ||
25 | /* | 27 | /* |
@@ -69,6 +71,8 @@ | |||
69 | #define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */ | 71 | #define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */ |
70 | #define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping */ | 72 | #define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping */ |
71 | #define PAL_CACHE_SHARED_INFO 43 /* returns information on caches shared by logical processor */ | 73 | #define PAL_CACHE_SHARED_INFO 43 /* returns information on caches shared by logical processor */ |
74 | #define PAL_GET_HW_POLICY 48 /* Get current hardware resource sharing policy */ | ||
75 | #define PAL_SET_HW_POLICY 49 /* Set current hardware resource sharing policy */ | ||
72 | 76 | ||
73 | #define PAL_COPY_PAL 256 /* relocate PAL procedures and PAL PMI */ | 77 | #define PAL_COPY_PAL 256 /* relocate PAL procedures and PAL PMI */ |
74 | #define PAL_HALT_INFO 257 /* return the low power capabilities of processor */ | 78 | #define PAL_HALT_INFO 257 /* return the low power capabilities of processor */ |
@@ -102,6 +106,7 @@ typedef s64 pal_status_t; | |||
102 | * cache without sideeffects | 106 | * cache without sideeffects |
103 | * and "restrict" was 1 | 107 | * and "restrict" was 1 |
104 | */ | 108 | */ |
109 | #define PAL_STATUS_REQUIRES_MEMORY (-9) /* Call requires PAL memory buffer */ | ||
105 | 110 | ||
106 | /* Processor cache level in the heirarchy */ | 111 | /* Processor cache level in the heirarchy */ |
107 | typedef u64 pal_cache_level_t; | 112 | typedef u64 pal_cache_level_t; |
@@ -838,7 +843,9 @@ typedef union pal_bus_features_u { | |||
838 | u64 pbf_req_bus_parking : 1; | 843 | u64 pbf_req_bus_parking : 1; |
839 | u64 pbf_bus_lock_mask : 1; | 844 | u64 pbf_bus_lock_mask : 1; |
840 | u64 pbf_enable_half_xfer_rate : 1; | 845 | u64 pbf_enable_half_xfer_rate : 1; |
841 | u64 pbf_reserved2 : 22; | 846 | u64 pbf_reserved2 : 20; |
847 | u64 pbf_enable_shared_line_replace : 1; | ||
848 | u64 pbf_enable_exclusive_line_replace : 1; | ||
842 | u64 pbf_disable_xaction_queueing : 1; | 849 | u64 pbf_disable_xaction_queueing : 1; |
843 | u64 pbf_disable_resp_err_check : 1; | 850 | u64 pbf_disable_resp_err_check : 1; |
844 | u64 pbf_disable_berr_check : 1; | 851 | u64 pbf_disable_berr_check : 1; |
@@ -1081,6 +1088,24 @@ ia64_pal_freq_ratios (struct pal_freq_ratio *proc_ratio, struct pal_freq_ratio * | |||
1081 | return iprv.status; | 1088 | return iprv.status; |
1082 | } | 1089 | } |
1083 | 1090 | ||
1091 | /* | ||
1092 | * Get the current hardware resource sharing policy of the processor | ||
1093 | */ | ||
1094 | static inline s64 | ||
1095 | ia64_pal_get_hw_policy (u64 proc_num, u64 *cur_policy, u64 *num_impacted, | ||
1096 | u64 *la) | ||
1097 | { | ||
1098 | struct ia64_pal_retval iprv; | ||
1099 | PAL_CALL(iprv, PAL_GET_HW_POLICY, proc_num, 0, 0); | ||
1100 | if (cur_policy) | ||
1101 | *cur_policy = iprv.v0; | ||
1102 | if (num_impacted) | ||
1103 | *num_impacted = iprv.v1; | ||
1104 | if (la) | ||
1105 | *la = iprv.v2; | ||
1106 | return iprv.status; | ||
1107 | } | ||
1108 | |||
1084 | /* Make the processor enter HALT or one of the implementation dependent low | 1109 | /* Make the processor enter HALT or one of the implementation dependent low |
1085 | * power states where prefetching and execution are suspended and cache and | 1110 | * power states where prefetching and execution are suspended and cache and |
1086 | * TLB coherency is not maintained. | 1111 | * TLB coherency is not maintained. |
@@ -1405,6 +1430,17 @@ ia64_pal_rse_info (u64 *num_phys_stacked, pal_hints_u_t *hints) | |||
1405 | return iprv.status; | 1430 | return iprv.status; |
1406 | } | 1431 | } |
1407 | 1432 | ||
1433 | /* | ||
1434 | * Set the current hardware resource sharing policy of the processor | ||
1435 | */ | ||
1436 | static inline s64 | ||
1437 | ia64_pal_set_hw_policy (u64 policy) | ||
1438 | { | ||
1439 | struct ia64_pal_retval iprv; | ||
1440 | PAL_CALL(iprv, PAL_SET_HW_POLICY, policy, 0, 0); | ||
1441 | return iprv.status; | ||
1442 | } | ||
1443 | |||
1408 | /* Cause the processor to enter SHUTDOWN state, where prefetching and execution are | 1444 | /* Cause the processor to enter SHUTDOWN state, where prefetching and execution are |
1409 | * suspended, but cause cache and TLB coherency to be maintained. | 1445 | * suspended, but cause cache and TLB coherency to be maintained. |
1410 | * This is usually called in IA-32 mode. | 1446 | * This is usually called in IA-32 mode. |
@@ -1528,12 +1564,15 @@ typedef union pal_vm_info_1_u { | |||
1528 | } pal_vm_info_1_s; | 1564 | } pal_vm_info_1_s; |
1529 | } pal_vm_info_1_u_t; | 1565 | } pal_vm_info_1_u_t; |
1530 | 1566 | ||
1567 | #define PAL_MAX_PURGES 0xFFFF /* all ones is means unlimited */ | ||
1568 | |||
1531 | typedef union pal_vm_info_2_u { | 1569 | typedef union pal_vm_info_2_u { |
1532 | u64 pvi2_val; | 1570 | u64 pvi2_val; |
1533 | struct { | 1571 | struct { |
1534 | u64 impl_va_msb : 8, | 1572 | u64 impl_va_msb : 8, |
1535 | rid_size : 8, | 1573 | rid_size : 8, |
1536 | reserved : 48; | 1574 | max_purges : 16, |
1575 | reserved : 32; | ||
1537 | } pal_vm_info_2_s; | 1576 | } pal_vm_info_2_s; |
1538 | } pal_vm_info_2_u_t; | 1577 | } pal_vm_info_2_u_t; |
1539 | 1578 | ||