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Diffstat (limited to 'include/asm-ia64/gcc_intrin.h')
-rw-r--r--include/asm-ia64/gcc_intrin.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/include/asm-ia64/gcc_intrin.h b/include/asm-ia64/gcc_intrin.h
index 2fe292c275fe..0f5b55921758 100644
--- a/include/asm-ia64/gcc_intrin.h
+++ b/include/asm-ia64/gcc_intrin.h
@@ -32,7 +32,7 @@ extern void ia64_bad_param_for_getreg (void);
32register unsigned long ia64_r13 asm ("r13") __used; 32register unsigned long ia64_r13 asm ("r13") __used;
33#endif 33#endif
34 34
35#define ia64_setreg(regnum, val) \ 35#define ia64_native_setreg(regnum, val) \
36({ \ 36({ \
37 switch (regnum) { \ 37 switch (regnum) { \
38 case _IA64_REG_PSR_L: \ 38 case _IA64_REG_PSR_L: \
@@ -61,7 +61,7 @@ register unsigned long ia64_r13 asm ("r13") __used;
61 } \ 61 } \
62}) 62})
63 63
64#define ia64_getreg(regnum) \ 64#define ia64_native_getreg(regnum) \
65({ \ 65({ \
66 __u64 ia64_intri_res; \ 66 __u64 ia64_intri_res; \
67 \ 67 \
@@ -385,7 +385,7 @@ register unsigned long ia64_r13 asm ("r13") __used;
385 385
386#define ia64_invala() asm volatile ("invala" ::: "memory") 386#define ia64_invala() asm volatile ("invala" ::: "memory")
387 387
388#define ia64_thash(addr) \ 388#define ia64_native_thash(addr) \
389({ \ 389({ \
390 __u64 ia64_intri_res; \ 390 __u64 ia64_intri_res; \
391 asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \ 391 asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
@@ -438,10 +438,10 @@ register unsigned long ia64_r13 asm ("r13") __used;
438#define ia64_set_pmd(index, val) \ 438#define ia64_set_pmd(index, val) \
439 asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory") 439 asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
440 440
441#define ia64_set_rr(index, val) \ 441#define ia64_native_set_rr(index, val) \
442 asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory"); 442 asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
443 443
444#define ia64_get_cpuid(index) \ 444#define ia64_native_get_cpuid(index) \
445({ \ 445({ \
446 __u64 ia64_intri_res; \ 446 __u64 ia64_intri_res; \
447 asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \ 447 asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
@@ -477,33 +477,33 @@ register unsigned long ia64_r13 asm ("r13") __used;
477}) 477})
478 478
479 479
480#define ia64_get_pmd(index) \ 480#define ia64_native_get_pmd(index) \
481({ \ 481({ \
482 __u64 ia64_intri_res; \ 482 __u64 ia64_intri_res; \
483 asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ 483 asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
484 ia64_intri_res; \ 484 ia64_intri_res; \
485}) 485})
486 486
487#define ia64_get_rr(index) \ 487#define ia64_native_get_rr(index) \
488({ \ 488({ \
489 __u64 ia64_intri_res; \ 489 __u64 ia64_intri_res; \
490 asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \ 490 asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
491 ia64_intri_res; \ 491 ia64_intri_res; \
492}) 492})
493 493
494#define ia64_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory") 494#define ia64_native_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory")
495 495
496 496
497#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory") 497#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory")
498 498
499#define ia64_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory") 499#define ia64_native_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory")
500#define ia64_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory") 500#define ia64_native_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory")
501#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory") 501#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
502#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory") 502#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
503 503
504#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr)) 504#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr))
505 505
506#define ia64_ptcga(addr, size) \ 506#define ia64_native_ptcga(addr, size) \
507do { \ 507do { \
508 asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \ 508 asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \
509 ia64_dv_serialize_data(); \ 509 ia64_dv_serialize_data(); \
@@ -608,7 +608,7 @@ do { \
608 } \ 608 } \
609}) 609})
610 610
611#define ia64_intrin_local_irq_restore(x) \ 611#define ia64_native_intrin_local_irq_restore(x) \
612do { \ 612do { \
613 asm volatile (";; cmp.ne p6,p7=%0,r0;;" \ 613 asm volatile (";; cmp.ne p6,p7=%0,r0;;" \
614 "(p6) ssm psr.i;" \ 614 "(p6) ssm psr.i;" \