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-rw-r--r--include/asm-i386/pgtable.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 77c6497f416e..c797286b512f 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -86,9 +86,7 @@ void paging_init(void);
86#endif 86#endif
87 87
88/* 88/*
89 * The 4MB page is guessing.. Detailed in the infamous "Chapter H" 89 * _PAGE_PSE set in the page directory entry just means that
90 * of the Pentium details, but assuming intel did the straightforward
91 * thing, this bit set in the page directory entry just means that
92 * the page directory entry points directly to a 4MB-aligned block of 90 * the page directory entry points directly to a 4MB-aligned block of
93 * memory. 91 * memory.
94 */ 92 */
@@ -119,8 +117,10 @@ void paging_init(void);
119#define _PAGE_UNUSED2 0x400 117#define _PAGE_UNUSED2 0x400
120#define _PAGE_UNUSED3 0x800 118#define _PAGE_UNUSED3 0x800
121 119
122#define _PAGE_FILE 0x040 /* set:pagecache unset:swap */ 120/* If _PAGE_PRESENT is clear, we use these: */
123#define _PAGE_PROTNONE 0x080 /* If not present */ 121#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
122#define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE;
123 pte_present gives true */
124#ifdef CONFIG_X86_PAE 124#ifdef CONFIG_X86_PAE
125#define _PAGE_NX (1ULL<<_PAGE_BIT_NX) 125#define _PAGE_NX (1ULL<<_PAGE_BIT_NX)
126#else 126#else