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-rw-r--r--include/asm-i386/apic.h2
-rw-r--r--include/asm-i386/atomic.h5
-rw-r--r--include/asm-i386/cpufeature.h1
-rw-r--r--include/asm-i386/e820.h4
-rw-r--r--include/asm-i386/hpet.h1
-rw-r--r--include/asm-i386/i387.h30
-rw-r--r--include/asm-i386/io_apic.h1
-rw-r--r--include/asm-i386/mpspec.h1
-rw-r--r--include/asm-i386/numnodes.h18
-rw-r--r--include/asm-i386/pgtable-2level.h3
-rw-r--r--include/asm-i386/pgtable-3level.h20
-rw-r--r--include/asm-i386/pgtable.h4
-rw-r--r--include/asm-i386/unistd.h10
13 files changed, 68 insertions, 32 deletions
diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h
index ff9ac8d19eb2..288233fd77d7 100644
--- a/include/asm-i386/apic.h
+++ b/include/asm-i386/apic.h
@@ -139,6 +139,8 @@ void switch_ipi_to_APIC_timer(void *cpumask);
139 139
140extern int timer_over_8254; 140extern int timer_over_8254;
141 141
142extern int modern_apic(void);
143
142#else /* !CONFIG_X86_LOCAL_APIC */ 144#else /* !CONFIG_X86_LOCAL_APIC */
143static inline void lapic_shutdown(void) { } 145static inline void lapic_shutdown(void) { }
144 146
diff --git a/include/asm-i386/atomic.h b/include/asm-i386/atomic.h
index 22d80ece95cb..4ddce5296a78 100644
--- a/include/asm-i386/atomic.h
+++ b/include/asm-i386/atomic.h
@@ -183,6 +183,7 @@ static __inline__ int atomic_add_return(int i, atomic_t *v)
183{ 183{
184 int __i; 184 int __i;
185#ifdef CONFIG_M386 185#ifdef CONFIG_M386
186 unsigned long flags;
186 if(unlikely(boot_cpu_data.x86==3)) 187 if(unlikely(boot_cpu_data.x86==3))
187 goto no_xadd; 188 goto no_xadd;
188#endif 189#endif
@@ -196,10 +197,10 @@ static __inline__ int atomic_add_return(int i, atomic_t *v)
196 197
197#ifdef CONFIG_M386 198#ifdef CONFIG_M386
198no_xadd: /* Legacy 386 processor */ 199no_xadd: /* Legacy 386 processor */
199 local_irq_disable(); 200 local_irq_save(flags);
200 __i = atomic_read(v); 201 __i = atomic_read(v);
201 atomic_set(v, i + __i); 202 atomic_set(v, i + __i);
202 local_irq_enable(); 203 local_irq_restore(flags);
203 return i + __i; 204 return i + __i;
204#endif 205#endif
205} 206}
diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h
index 5c0b5876b931..b44bfc6239cb 100644
--- a/include/asm-i386/cpufeature.h
+++ b/include/asm-i386/cpufeature.h
@@ -71,6 +71,7 @@
71#define X86_FEATURE_P4 (3*32+ 7) /* P4 */ 71#define X86_FEATURE_P4 (3*32+ 7) /* P4 */
72#define X86_FEATURE_CONSTANT_TSC (3*32+ 8) /* TSC ticks at a constant rate */ 72#define X86_FEATURE_CONSTANT_TSC (3*32+ 8) /* TSC ticks at a constant rate */
73#define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */ 73#define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */
74#define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* FXSAVE leaks FOP/FIP/FOP */
74 75
75/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ 76/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
76#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ 77#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
diff --git a/include/asm-i386/e820.h b/include/asm-i386/e820.h
index edf65be21a92..ca82acb8cb1f 100644
--- a/include/asm-i386/e820.h
+++ b/include/asm-i386/e820.h
@@ -35,6 +35,10 @@ struct e820map {
35}; 35};
36 36
37extern struct e820map e820; 37extern struct e820map e820;
38
39extern int e820_all_mapped(unsigned long start, unsigned long end,
40 unsigned type);
41
38#endif/*!__ASSEMBLY__*/ 42#endif/*!__ASSEMBLY__*/
39 43
40#endif/*__E820_HEADER*/ 44#endif/*__E820_HEADER*/
diff --git a/include/asm-i386/hpet.h b/include/asm-i386/hpet.h
index 16ef9f996e3f..7f1a8a6ee32f 100644
--- a/include/asm-i386/hpet.h
+++ b/include/asm-i386/hpet.h
@@ -89,6 +89,7 @@
89 * then 32 bit HPET counter wrapsaround in less than 0.5 sec. 89 * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
90 */ 90 */
91#define HPET_MIN_PERIOD (100000UL) 91#define HPET_MIN_PERIOD (100000UL)
92#define HPET_TICK_RATE (HZ * 100000UL)
92 93
93extern unsigned long hpet_tick; /* hpet clks count per tick */ 94extern unsigned long hpet_tick; /* hpet clks count per tick */
94extern unsigned long hpet_address; /* hpet memory map physical address */ 95extern unsigned long hpet_address; /* hpet memory map physical address */
diff --git a/include/asm-i386/i387.h b/include/asm-i386/i387.h
index 152d0baa576a..bc1d6edae1ed 100644
--- a/include/asm-i386/i387.h
+++ b/include/asm-i386/i387.h
@@ -13,6 +13,7 @@
13 13
14#include <linux/sched.h> 14#include <linux/sched.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/kernel_stat.h>
16#include <asm/processor.h> 17#include <asm/processor.h>
17#include <asm/sigcontext.h> 18#include <asm/sigcontext.h>
18#include <asm/user.h> 19#include <asm/user.h>
@@ -38,17 +39,38 @@ extern void init_fpu(struct task_struct *);
38extern void kernel_fpu_begin(void); 39extern void kernel_fpu_begin(void);
39#define kernel_fpu_end() do { stts(); preempt_enable(); } while(0) 40#define kernel_fpu_end() do { stts(); preempt_enable(); } while(0)
40 41
42/* We need a safe address that is cheap to find and that is already
43 in L1 during context switch. The best choices are unfortunately
44 different for UP and SMP */
45#ifdef CONFIG_SMP
46#define safe_address (__per_cpu_offset[0])
47#else
48#define safe_address (kstat_cpu(0).cpustat.user)
49#endif
50
41/* 51/*
42 * These must be called with preempt disabled 52 * These must be called with preempt disabled
43 */ 53 */
44static inline void __save_init_fpu( struct task_struct *tsk ) 54static inline void __save_init_fpu( struct task_struct *tsk )
45{ 55{
56 /* Use more nops than strictly needed in case the compiler
57 varies code */
46 alternative_input( 58 alternative_input(
47 "fnsave %1 ; fwait ;" GENERIC_NOP2, 59 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
48 "fxsave %1 ; fnclex", 60 "fxsave %[fx]\n"
61 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
49 X86_FEATURE_FXSR, 62 X86_FEATURE_FXSR,
50 "m" (tsk->thread.i387.fxsave) 63 [fx] "m" (tsk->thread.i387.fxsave),
51 :"memory"); 64 [fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory");
65 /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
66 is pending. Clear the x87 state here by setting it to fixed
67 values. safe_address is a random variable that should be in L1 */
68 alternative_input(
69 GENERIC_NOP8 GENERIC_NOP2,
70 "emms\n\t" /* clear stack tags */
71 "fildl %[addr]", /* set F?P to defined value */
72 X86_FEATURE_FXSAVE_LEAK,
73 [addr] "m" (safe_address));
52 task_thread_info(tsk)->status &= ~TS_USEDFPU; 74 task_thread_info(tsk)->status &= ~TS_USEDFPU;
53} 75}
54 76
diff --git a/include/asm-i386/io_apic.h b/include/asm-i386/io_apic.h
index 51c4e5fe6062..d92e253f7f6f 100644
--- a/include/asm-i386/io_apic.h
+++ b/include/asm-i386/io_apic.h
@@ -200,6 +200,7 @@ extern int io_apic_get_unique_id (int ioapic, int apic_id);
200extern int io_apic_get_version (int ioapic); 200extern int io_apic_get_version (int ioapic);
201extern int io_apic_get_redir_entries (int ioapic); 201extern int io_apic_get_redir_entries (int ioapic);
202extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low); 202extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low);
203extern int timer_uses_ioapic_pin_0;
203#endif /* CONFIG_ACPI */ 204#endif /* CONFIG_ACPI */
204 205
205extern int (*ioapic_renumber_irq)(int ioapic, int irq); 206extern int (*ioapic_renumber_irq)(int ioapic, int irq);
diff --git a/include/asm-i386/mpspec.h b/include/asm-i386/mpspec.h
index 62113d3bfdc2..770bf6da8c3d 100644
--- a/include/asm-i386/mpspec.h
+++ b/include/asm-i386/mpspec.h
@@ -18,7 +18,6 @@ extern void find_smp_config (void);
18extern void get_smp_config (void); 18extern void get_smp_config (void);
19extern int nr_ioapics; 19extern int nr_ioapics;
20extern int apic_version [MAX_APICS]; 20extern int apic_version [MAX_APICS];
21extern int mp_bus_id_to_type [MAX_MP_BUSSES];
22extern int mp_irq_entries; 21extern int mp_irq_entries;
23extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES]; 22extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
24extern int mpc_default_type; 23extern int mpc_default_type;
diff --git a/include/asm-i386/numnodes.h b/include/asm-i386/numnodes.h
deleted file mode 100644
index a61f38c8176f..000000000000
--- a/include/asm-i386/numnodes.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef _ASM_MAX_NUMNODES_H
2#define _ASM_MAX_NUMNODES_H
3
4#include <linux/config.h>
5
6#ifdef CONFIG_X86_NUMAQ
7
8/* Max 16 Nodes */
9#define NODES_SHIFT 4
10
11#elif defined(CONFIG_ACPI_SRAT)
12
13/* Max 8 Nodes */
14#define NODES_SHIFT 3
15
16#endif /* CONFIG_X86_NUMAQ */
17
18#endif /* _ASM_MAX_NUMNODES_H */
diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h
index 27bde973abc7..2756d4b04c27 100644
--- a/include/asm-i386/pgtable-2level.h
+++ b/include/asm-i386/pgtable-2level.h
@@ -18,6 +18,9 @@
18#define set_pte_atomic(pteptr, pteval) set_pte(pteptr,pteval) 18#define set_pte_atomic(pteptr, pteval) set_pte(pteptr,pteval)
19#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval)) 19#define set_pmd(pmdptr, pmdval) (*(pmdptr) = (pmdval))
20 20
21#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
22#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
23
21#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte_low, 0)) 24#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte_low, 0))
22#define pte_same(a, b) ((a).pte_low == (b).pte_low) 25#define pte_same(a, b) ((a).pte_low == (b).pte_low)
23#define pte_page(x) pfn_to_page(pte_pfn(x)) 26#define pte_page(x) pfn_to_page(pte_pfn(x))
diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h
index 36a5aa63cbbf..dccb1b3337ad 100644
--- a/include/asm-i386/pgtable-3level.h
+++ b/include/asm-i386/pgtable-3level.h
@@ -85,6 +85,26 @@ static inline void pud_clear (pud_t * pud) { }
85#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \ 85#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
86 pmd_index(address)) 86 pmd_index(address))
87 87
88/*
89 * For PTEs and PDEs, we must clear the P-bit first when clearing a page table
90 * entry, so clear the bottom half first and enforce ordering with a compiler
91 * barrier.
92 */
93static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
94{
95 ptep->pte_low = 0;
96 smp_wmb();
97 ptep->pte_high = 0;
98}
99
100static inline void pmd_clear(pmd_t *pmd)
101{
102 u32 *tmp = (u32 *)pmd;
103 *tmp = 0;
104 smp_wmb();
105 *(tmp + 1) = 0;
106}
107
88static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 108static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
89{ 109{
90 pte_t res; 110 pte_t res;
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index ee056c41a9fb..672c3f76b9df 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -204,12 +204,10 @@ extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
204extern unsigned long pg0[]; 204extern unsigned long pg0[];
205 205
206#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) 206#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
207#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
208 207
209/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */ 208/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
210#define pmd_none(x) (!(unsigned long)pmd_val(x)) 209#define pmd_none(x) (!(unsigned long)pmd_val(x))
211#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT) 210#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
212#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
213#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) 211#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
214 212
215 213
@@ -268,7 +266,7 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long
268 pte_t pte; 266 pte_t pte;
269 if (full) { 267 if (full) {
270 pte = *ptep; 268 pte = *ptep;
271 *ptep = __pte(0); 269 pte_clear(mm, addr, ptep);
272 } else { 270 } else {
273 pte = ptep_get_and_clear(mm, addr, ptep); 271 pte = ptep_get_and_clear(mm, addr, ptep);
274 } 272 }
diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h
index 2e7f3e257fdd..eb4b152c82fc 100644
--- a/include/asm-i386/unistd.h
+++ b/include/asm-i386/unistd.h
@@ -288,7 +288,7 @@
288#define __NR_mq_timedreceive (__NR_mq_open+3) 288#define __NR_mq_timedreceive (__NR_mq_open+3)
289#define __NR_mq_notify (__NR_mq_open+4) 289#define __NR_mq_notify (__NR_mq_open+4)
290#define __NR_mq_getsetattr (__NR_mq_open+5) 290#define __NR_mq_getsetattr (__NR_mq_open+5)
291#define __NR_sys_kexec_load 283 291#define __NR_kexec_load 283
292#define __NR_waitid 284 292#define __NR_waitid 284
293/* #define __NR_sys_setaltroot 285 */ 293/* #define __NR_sys_setaltroot 285 */
294#define __NR_add_key 286 294#define __NR_add_key 286
@@ -318,10 +318,12 @@
318#define __NR_unshare 310 318#define __NR_unshare 310
319#define __NR_set_robust_list 311 319#define __NR_set_robust_list 311
320#define __NR_get_robust_list 312 320#define __NR_get_robust_list 312
321#define __NR_sys_splice 313 321#define __NR_splice 313
322#define __NR_sys_sync_file_range 314 322#define __NR_sync_file_range 314
323#define __NR_tee 315
324#define __NR_vmsplice 316
323 325
324#define NR_syscalls 315 326#define NR_syscalls 317
325 327
326/* 328/*
327 * user-visible error numbers are in the range -1 - -128: see 329 * user-visible error numbers are in the range -1 - -128: see