1 files changed, 0 insertions, 35 deletions

diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index 882d3f8fbbac..77e263267aa6 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -143,21 +143,6 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
 #define load_cr3(pgdir) write_cr3(__pa(pgdir))
 
 /*
- * Intel CPU features in CR4
- */
-#define X86_CR4_VME             0x0001  /* enable vm86 extensions */
-#define X86_CR4_PVI             0x0002  /* virtual interrupts flag enable */
-#define X86_CR4_TSD             0x0004  /* disable time stamp at ipl 3 */
-#define X86_CR4_DE              0x0008  /* enable debugging extensions */
-#define X86_CR4_PSE             0x0010  /* enable page size extensions */
-#define X86_CR4_PAE             0x0020  /* enable physical address extensions */
-#define X86_CR4_MCE             0x0040  /* Machine check enable */
-#define X86_CR4_PGE             0x0080  /* enable global pages */
-#define X86_CR4_PCE             0x0100  /* enable performance counters at ipl 3 */
-#define X86_CR4_OSFXSR          0x0200  /* enable fast FPU save and restore */
-#define X86_CR4_OSXMMEXCPT      0x0400  /* enable unmasked SSE exceptions */
-
-/*
  * Save the cr4 feature set we're using (ie
  * Pentium 4MB enable and PPro Global page
  * enable), so that any CPU's that boot up
@@ -184,26 +169,6 @@ static inline void clear_in_cr4 (unsigned long mask)
 }
 
 /*
- *      NSC/Cyrix CPU configuration register indexes
- */
-
-#define CX86_PCR0 0x20
-#define CX86_GCR  0xb8
-#define CX86_CCR0 0xc0
-#define CX86_CCR1 0xc1
-#define CX86_CCR2 0xc2
-#define CX86_CCR3 0xc3
-#define CX86_CCR4 0xe8
-#define CX86_CCR5 0xe9
-#define CX86_CCR6 0xea
-#define CX86_CCR7 0xeb
-#define CX86_PCR1 0xf0
-#define CX86_DIR0 0xfe
-#define CX86_DIR1 0xff
-#define CX86_ARR_BASE 0xc4
-#define CX86_RCR_BASE 0xdc
-
-/*
  *      NSC/Cyrix CPU indexed register access macros
  */