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-rw-r--r--include/asm-i386/pgtable.h42
1 files changed, 36 insertions, 6 deletions
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 77c6497f416e..47bc1ffa3d4c 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -86,9 +86,7 @@ void paging_init(void);
86#endif 86#endif
87 87
88/* 88/*
89 * The 4MB page is guessing.. Detailed in the infamous "Chapter H" 89 * _PAGE_PSE set in the page directory entry just means that
90 * of the Pentium details, but assuming intel did the straightforward
91 * thing, this bit set in the page directory entry just means that
92 * the page directory entry points directly to a 4MB-aligned block of 90 * the page directory entry points directly to a 4MB-aligned block of
93 * memory. 91 * memory.
94 */ 92 */
@@ -119,8 +117,10 @@ void paging_init(void);
119#define _PAGE_UNUSED2 0x400 117#define _PAGE_UNUSED2 0x400
120#define _PAGE_UNUSED3 0x800 118#define _PAGE_UNUSED3 0x800
121 119
122#define _PAGE_FILE 0x040 /* set:pagecache unset:swap */ 120/* If _PAGE_PRESENT is clear, we use these: */
123#define _PAGE_PROTNONE 0x080 /* If not present */ 121#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
122#define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE;
123 pte_present gives true */
124#ifdef CONFIG_X86_PAE 124#ifdef CONFIG_X86_PAE
125#define _PAGE_NX (1ULL<<_PAGE_BIT_NX) 125#define _PAGE_NX (1ULL<<_PAGE_BIT_NX)
126#else 126#else
@@ -215,11 +215,13 @@ extern unsigned long pg0[];
215 * The following only work if pte_present() is true. 215 * The following only work if pte_present() is true.
216 * Undefined behaviour if not.. 216 * Undefined behaviour if not..
217 */ 217 */
218#define __LARGE_PTE (_PAGE_PSE | _PAGE_PRESENT)
218static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; } 219static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
219static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; } 220static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
220static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; } 221static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; }
221static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; } 222static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
222static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; } 223static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; }
224static inline int pte_huge(pte_t pte) { return ((pte).pte_low & __LARGE_PTE) == __LARGE_PTE; }
223 225
224/* 226/*
225 * The following only works if pte_present() is not true. 227 * The following only works if pte_present() is not true.
@@ -236,7 +238,7 @@ static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return
236static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; } 238static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; }
237static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; } 239static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; }
238static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; } 240static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; }
239static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PRESENT | _PAGE_PSE; return pte; } 241static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= __LARGE_PTE; return pte; }
240 242
241#ifdef CONFIG_X86_PAE 243#ifdef CONFIG_X86_PAE
242# include <asm/pgtable-3level.h> 244# include <asm/pgtable-3level.h>
@@ -258,12 +260,39 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned
258 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low); 260 return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low);
259} 261}
260 262
263static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
264{
265 pte_t pte;
266 if (full) {
267 pte = *ptep;
268 *ptep = __pte(0);
269 } else {
270 pte = ptep_get_and_clear(mm, addr, ptep);
271 }
272 return pte;
273}
274
261static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 275static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
262{ 276{
263 clear_bit(_PAGE_BIT_RW, &ptep->pte_low); 277 clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
264} 278}
265 279
266/* 280/*
281 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
282 *
283 * dst - pointer to pgd range anwhere on a pgd page
284 * src - ""
285 * count - the number of pgds to copy.
286 *
287 * dst and src can be on the same page, but the range must not overlap,
288 * and must not cross a page boundary.
289 */
290static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
291{
292 memcpy(dst, src, count * sizeof(pgd_t));
293}
294
295/*
267 * Macro to mark a page protection value as "uncacheable". On processors which do not support 296 * Macro to mark a page protection value as "uncacheable". On processors which do not support
268 * it, this is a no-op. 297 * it, this is a no-op.
269 */ 298 */
@@ -415,6 +444,7 @@ extern void noexec_setup(const char *str);
415#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 444#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
416#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY 445#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
417#define __HAVE_ARCH_PTEP_GET_AND_CLEAR 446#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
447#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
418#define __HAVE_ARCH_PTEP_SET_WRPROTECT 448#define __HAVE_ARCH_PTEP_SET_WRPROTECT
419#define __HAVE_ARCH_PTE_SAME 449#define __HAVE_ARCH_PTE_SAME
420#include <asm-generic/pgtable.h> 450#include <asm-generic/pgtable.h>