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-rw-r--r--include/asm-i386/mach-visws/mach_apic.h103
1 files changed, 0 insertions, 103 deletions
diff --git a/include/asm-i386/mach-visws/mach_apic.h b/include/asm-i386/mach-visws/mach_apic.h
deleted file mode 100644
index efac6f0d139f..000000000000
--- a/include/asm-i386/mach-visws/mach_apic.h
+++ /dev/null
@@ -1,103 +0,0 @@
1#ifndef __ASM_MACH_APIC_H
2#define __ASM_MACH_APIC_H
3
4#include <mach_apicdef.h>
5#include <asm/smp.h>
6
7#define APIC_DFR_VALUE (APIC_DFR_FLAT)
8
9#define no_balance_irq (0)
10#define esr_disable (0)
11
12#define INT_DELIVERY_MODE dest_LowestPrio
13#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
14
15#ifdef CONFIG_SMP
16 #define TARGET_CPUS cpu_online_map
17#else
18 #define TARGET_CPUS cpumask_of_cpu(0)
19#endif
20
21#define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap)
22#define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map)
23
24static inline int apic_id_registered(void)
25{
26 return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
27}
28
29/*
30 * Set up the logical destination ID.
31 *
32 * Intel recommends to set DFR, LDR and TPR before enabling
33 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
34 * document number 292116). So here it goes...
35 */
36static inline void init_apic_ldr(void)
37{
38 unsigned long val;
39
40 apic_write_around(APIC_DFR, APIC_DFR_VALUE);
41 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
42 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
43 apic_write_around(APIC_LDR, val);
44}
45
46static inline void summit_check(char *oem, char *productid)
47{
48}
49
50static inline void setup_apic_routing(void)
51{
52}
53
54static inline int apicid_to_node(int logical_apicid)
55{
56 return 0;
57}
58
59/* Mapping from cpu number to logical apicid */
60static inline int cpu_to_logical_apicid(int cpu)
61{
62 return 1 << cpu;
63}
64
65static inline int cpu_present_to_apicid(int mps_cpu)
66{
67 if (mps_cpu < get_physical_broadcast())
68 return mps_cpu;
69 else
70 return BAD_APICID;
71}
72
73static inline physid_mask_t apicid_to_cpu_present(int apicid)
74{
75 return physid_mask_of_physid(apicid);
76}
77
78#define WAKE_SECONDARY_VIA_INIT
79
80static inline void setup_portio_remap(void)
81{
82}
83
84static inline void enable_apic_mode(void)
85{
86}
87
88static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
89{
90 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
91}
92
93static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
94{
95 return cpus_addr(cpumask)[0];
96}
97
98static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
99{
100 return cpuid_apic >> index_msb;
101}
102
103#endif /* __ASM_MACH_APIC_H */