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Diffstat (limited to 'include/asm-i386/desc.h')
-rw-r--r--include/asm-i386/desc.h33
1 files changed, 25 insertions, 8 deletions
diff --git a/include/asm-i386/desc.h b/include/asm-i386/desc.h
index 11e67811a990..6df1a53c190e 100644
--- a/include/asm-i386/desc.h
+++ b/include/asm-i386/desc.h
@@ -27,8 +27,18 @@ struct Xgt_desc_struct {
27 27
28extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS]; 28extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
29 29
30#define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8)) 30#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
31#define load_LDT_desc() __asm__ __volatile__("lldt %%ax"::"a" (GDT_ENTRY_LDT*8)) 31#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
32
33#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
34#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
35#define load_tr(tr) __asm__ __volatile("ltr %0"::"mr" (tr))
36#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"mr" (ldt))
37
38#define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr))
39#define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr))
40#define store_tr(tr) __asm__ ("str %0":"=mr" (tr))
41#define store_ldt(ldt) __asm__ ("sldt %0":"=mr" (ldt))
32 42
33/* 43/*
34 * This is the ldt that every process will get unless we need 44 * This is the ldt that every process will get unless we need
@@ -39,14 +49,14 @@ extern void set_intr_gate(unsigned int irq, void * addr);
39 49
40#define _set_tssldt_desc(n,addr,limit,type) \ 50#define _set_tssldt_desc(n,addr,limit,type) \
41__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \ 51__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
42 "movw %%ax,2(%2)\n\t" \ 52 "movw %w1,2(%2)\n\t" \
43 "rorl $16,%%eax\n\t" \ 53 "rorl $16,%1\n\t" \
44 "movb %%al,4(%2)\n\t" \ 54 "movb %b1,4(%2)\n\t" \
45 "movb %4,5(%2)\n\t" \ 55 "movb %4,5(%2)\n\t" \
46 "movb $0,6(%2)\n\t" \ 56 "movb $0,6(%2)\n\t" \
47 "movb %%ah,7(%2)\n\t" \ 57 "movb %h1,7(%2)\n\t" \
48 "rorl $16,%%eax" \ 58 "rorl $16,%1" \
49 : "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type)) 59 : "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type))
50 60
51static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr) 61static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
52{ 62{
@@ -86,6 +96,13 @@ static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size)
86 (info)->seg_not_present == 1 && \ 96 (info)->seg_not_present == 1 && \
87 (info)->useable == 0 ) 97 (info)->useable == 0 )
88 98
99static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 entry_b)
100{
101 __u32 *lp = (__u32 *)((char *)ldt + entry*8);
102 *lp = entry_a;
103 *(lp+1) = entry_b;
104}
105
89#if TLS_SIZE != 24 106#if TLS_SIZE != 24
90# error update this code. 107# error update this code.
91#endif 108#endif