diff options
Diffstat (limited to 'include/asm-i386/cpufeature.h')
-rw-r--r-- | include/asm-i386/cpufeature.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h index 7ea5f4a6706f..c961c03cf1e2 100644 --- a/include/asm-i386/cpufeature.h +++ b/include/asm-i386/cpufeature.h | |||
@@ -12,7 +12,7 @@ | |||
12 | #endif | 12 | #endif |
13 | #include <asm/required-features.h> | 13 | #include <asm/required-features.h> |
14 | 14 | ||
15 | #define NCAPINTS 7 /* N 32-bit words worth of info */ | 15 | #define NCAPINTS 8 /* N 32-bit words worth of info */ |
16 | 16 | ||
17 | /* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */ | 17 | /* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */ |
18 | #define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */ | 18 | #define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */ |
@@ -109,6 +109,12 @@ | |||
109 | #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ | 109 | #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ |
110 | #define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ | 110 | #define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ |
111 | 111 | ||
112 | /* | ||
113 | * Auxiliary flags: Linux defined - For features scattered in various | ||
114 | * CPUID levels like 0x6, 0xA etc | ||
115 | */ | ||
116 | #define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */ | ||
117 | |||
112 | #define cpu_has(c, bit) \ | 118 | #define cpu_has(c, bit) \ |
113 | (__builtin_constant_p(bit) && \ | 119 | (__builtin_constant_p(bit) && \ |
114 | ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \ | 120 | ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \ |
@@ -117,7 +123,8 @@ | |||
117 | (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) || \ | 123 | (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) || \ |
118 | (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) || \ | 124 | (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) || \ |
119 | (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) || \ | 125 | (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) || \ |
120 | (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) ) \ | 126 | (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) || \ |
127 | (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7)) ) \ | ||
121 | ? 1 : \ | 128 | ? 1 : \ |
122 | test_bit(bit, (c)->x86_capability)) | 129 | test_bit(bit, (c)->x86_capability)) |
123 | #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) | 130 | #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) |