diff options
Diffstat (limited to 'include/asm-i386/cpufeature.h')
-rw-r--r-- | include/asm-i386/cpufeature.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h index d314ebb3d59e..3f92b94e0d75 100644 --- a/include/asm-i386/cpufeature.h +++ b/include/asm-i386/cpufeature.h | |||
@@ -31,7 +31,7 @@ | |||
31 | #define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */ | 31 | #define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */ |
32 | #define X86_FEATURE_PN (0*32+18) /* Processor serial number */ | 32 | #define X86_FEATURE_PN (0*32+18) /* Processor serial number */ |
33 | #define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */ | 33 | #define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */ |
34 | #define X86_FEATURE_DTES (0*32+21) /* Debug Trace Store */ | 34 | #define X86_FEATURE_DS (0*32+21) /* Debug Store */ |
35 | #define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */ | 35 | #define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */ |
36 | #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ | 36 | #define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ |
37 | #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */ | 37 | #define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */ |
@@ -73,6 +73,8 @@ | |||
73 | #define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */ | 73 | #define X86_FEATURE_UP (3*32+ 9) /* smp kernel running on up */ |
74 | #define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* FXSAVE leaks FOP/FIP/FOP */ | 74 | #define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* FXSAVE leaks FOP/FIP/FOP */ |
75 | #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */ | 75 | #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */ |
76 | #define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ | ||
77 | #define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ | ||
76 | 78 | ||
77 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | 79 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ |
78 | #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ | 80 | #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ |
@@ -134,6 +136,10 @@ | |||
134 | #define cpu_has_phe_enabled boot_cpu_has(X86_FEATURE_PHE_EN) | 136 | #define cpu_has_phe_enabled boot_cpu_has(X86_FEATURE_PHE_EN) |
135 | #define cpu_has_pmm boot_cpu_has(X86_FEATURE_PMM) | 137 | #define cpu_has_pmm boot_cpu_has(X86_FEATURE_PMM) |
136 | #define cpu_has_pmm_enabled boot_cpu_has(X86_FEATURE_PMM_EN) | 138 | #define cpu_has_pmm_enabled boot_cpu_has(X86_FEATURE_PMM_EN) |
139 | #define cpu_has_ds boot_cpu_has(X86_FEATURE_DS) | ||
140 | #define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS) | ||
141 | #define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH) | ||
142 | #define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS) | ||
137 | 143 | ||
138 | #endif /* __ASM_I386_CPUFEATURE_H */ | 144 | #endif /* __ASM_I386_CPUFEATURE_H */ |
139 | 145 | ||