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-rw-r--r--include/asm-frv/kvm.h6
-rw-r--r--include/asm-frv/mem-layout.h2
-rw-r--r--include/asm-frv/pgtable.h19
-rw-r--r--include/asm-frv/spr-regs.h14
-rw-r--r--include/asm-frv/system.h25
5 files changed, 52 insertions, 14 deletions
diff --git a/include/asm-frv/kvm.h b/include/asm-frv/kvm.h
new file mode 100644
index 000000000000..9c8a4f08d0a9
--- /dev/null
+++ b/include/asm-frv/kvm.h
@@ -0,0 +1,6 @@
1#ifndef __LINUX_KVM_FRV_H
2#define __LINUX_KVM_FRV_H
3
4/* frv does not support KVM */
5
6#endif
diff --git a/include/asm-frv/mem-layout.h b/include/asm-frv/mem-layout.h
index 83532252b8be..734a1d0583b6 100644
--- a/include/asm-frv/mem-layout.h
+++ b/include/asm-frv/mem-layout.h
@@ -60,7 +60,7 @@
60 */ 60 */
61#define BRK_BASE __UL(2 * 1024 * 1024 + PAGE_SIZE) 61#define BRK_BASE __UL(2 * 1024 * 1024 + PAGE_SIZE)
62#define STACK_TOP __UL(2 * 1024 * 1024) 62#define STACK_TOP __UL(2 * 1024 * 1024)
63#define STACK_TOP_MAX STACK_TOP 63#define STACK_TOP_MAX __UL(0xc0000000)
64 64
65/* userspace process size */ 65/* userspace process size */
66#ifdef CONFIG_MMU 66#ifdef CONFIG_MMU
diff --git a/include/asm-frv/pgtable.h b/include/asm-frv/pgtable.h
index 6c0682ed5fc9..4e219046fe42 100644
--- a/include/asm-frv/pgtable.h
+++ b/include/asm-frv/pgtable.h
@@ -507,13 +507,22 @@ static inline int pte_file(pte_t pte)
507 */ 507 */
508static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte) 508static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
509{ 509{
510 struct mm_struct *mm;
510 unsigned long ampr; 511 unsigned long ampr;
511 pgd_t *pge = pgd_offset(current->mm, address);
512 pud_t *pue = pud_offset(pge, address);
513 pmd_t *pme = pmd_offset(pue, address);
514 512
515 ampr = pme->ste[0] & 0xffffff00; 513 mm = current->mm;
516 ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C | xAMPRx_V; 514 if (mm) {
515 pgd_t *pge = pgd_offset(mm, address);
516 pud_t *pue = pud_offset(pge, address);
517 pmd_t *pme = pmd_offset(pue, address);
518
519 ampr = pme->ste[0] & 0xffffff00;
520 ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C |
521 xAMPRx_V;
522 } else {
523 address = ULONG_MAX;
524 ampr = 0;
525 }
517 526
518 asm volatile("movgs %0,scr0\n" 527 asm volatile("movgs %0,scr0\n"
519 "movgs %0,scr1\n" 528 "movgs %0,scr1\n"
diff --git a/include/asm-frv/spr-regs.h b/include/asm-frv/spr-regs.h
index c2a541ef828d..01e6af5e99b8 100644
--- a/include/asm-frv/spr-regs.h
+++ b/include/asm-frv/spr-regs.h
@@ -99,9 +99,23 @@
99#define TBR_TT_TRAP1 (0x81 << 4) 99#define TBR_TT_TRAP1 (0x81 << 4)
100#define TBR_TT_TRAP2 (0x82 << 4) 100#define TBR_TT_TRAP2 (0x82 << 4)
101#define TBR_TT_TRAP3 (0x83 << 4) 101#define TBR_TT_TRAP3 (0x83 << 4)
102#define TBR_TT_TRAP120 (0xf8 << 4)
103#define TBR_TT_TRAP121 (0xf9 << 4)
104#define TBR_TT_TRAP122 (0xfa << 4)
105#define TBR_TT_TRAP123 (0xfb << 4)
106#define TBR_TT_TRAP124 (0xfc << 4)
107#define TBR_TT_TRAP125 (0xfd << 4)
102#define TBR_TT_TRAP126 (0xfe << 4) 108#define TBR_TT_TRAP126 (0xfe << 4)
103#define TBR_TT_BREAK (0xff << 4) 109#define TBR_TT_BREAK (0xff << 4)
104 110
111#define TBR_TT_ATOMIC_CMPXCHG32 TBR_TT_TRAP120
112#define TBR_TT_ATOMIC_XCHG32 TBR_TT_TRAP121
113#define TBR_TT_ATOMIC_XOR TBR_TT_TRAP122
114#define TBR_TT_ATOMIC_OR TBR_TT_TRAP123
115#define TBR_TT_ATOMIC_AND TBR_TT_TRAP124
116#define TBR_TT_ATOMIC_SUB TBR_TT_TRAP125
117#define TBR_TT_ATOMIC_ADD TBR_TT_TRAP126
118
105#define __get_TBR() ({ unsigned long x; asm volatile("movsg tbr,%0" : "=r"(x)); x; }) 119#define __get_TBR() ({ unsigned long x; asm volatile("movsg tbr,%0" : "=r"(x)); x; })
106 120
107/* 121/*
diff --git a/include/asm-frv/system.h b/include/asm-frv/system.h
index b400cea81487..30a67a9da11a 100644
--- a/include/asm-frv/system.h
+++ b/include/asm-frv/system.h
@@ -179,14 +179,23 @@ do { \
179#define mb() asm volatile ("membar" : : :"memory") 179#define mb() asm volatile ("membar" : : :"memory")
180#define rmb() asm volatile ("membar" : : :"memory") 180#define rmb() asm volatile ("membar" : : :"memory")
181#define wmb() asm volatile ("membar" : : :"memory") 181#define wmb() asm volatile ("membar" : : :"memory")
182#define set_mb(var, value) do { var = value; mb(); } while (0) 182#define read_barrier_depends() barrier()
183 183
184#define smp_mb() mb() 184#ifdef CONFIG_SMP
185#define smp_rmb() rmb() 185#define smp_mb() mb()
186#define smp_wmb() wmb() 186#define smp_rmb() rmb()
187 187#define smp_wmb() wmb()
188#define read_barrier_depends() do {} while(0)
189#define smp_read_barrier_depends() read_barrier_depends() 188#define smp_read_barrier_depends() read_barrier_depends()
189#define set_mb(var, value) \
190 do { xchg(&var, (value)); } while (0)
191#else
192#define smp_mb() barrier()
193#define smp_rmb() barrier()
194#define smp_wmb() barrier()
195#define smp_read_barrier_depends() do {} while(0)
196#define set_mb(var, value) \
197 do { var = (value); barrier(); } while (0)
198#endif
190 199
191#define HARD_RESET_NOW() \ 200#define HARD_RESET_NOW() \
192do { \ 201do { \
@@ -234,7 +243,7 @@ extern void free_initmem(void);
234 break; \ 243 break; \
235 \ 244 \
236 default: \ 245 default: \
237 __xg_orig = 0; \ 246 __xg_orig = (__typeof__(__xg_orig))0; \
238 asm volatile("break"); \ 247 asm volatile("break"); \
239 break; \ 248 break; \
240 } \ 249 } \
@@ -259,7 +268,7 @@ extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
259 (__force uint32_t)__xg_test, \ 268 (__force uint32_t)__xg_test, \
260 (__force uint32_t)__xg_new); break; \ 269 (__force uint32_t)__xg_new); break; \
261 default: \ 270 default: \
262 __xg_orig = 0; \ 271 __xg_orig = (__typeof__(__xg_orig))0; \
263 asm volatile("break"); \ 272 asm volatile("break"); \
264 break; \ 273 break; \
265 } \ 274 } \