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-rw-r--r--include/asm-cris/arch-v10/cache.h1
-rw-r--r--include/asm-cris/arch-v32/cache.h1
-rw-r--r--include/asm-cris/dma-mapping.h2
3 files changed, 1 insertions, 3 deletions
diff --git a/include/asm-cris/arch-v10/cache.h b/include/asm-cris/arch-v10/cache.h
index 1d1d1ba65b1a..aea27184d2d2 100644
--- a/include/asm-cris/arch-v10/cache.h
+++ b/include/asm-cris/arch-v10/cache.h
@@ -4,6 +4,5 @@
4/* Etrax 100LX have 32-byte cache-lines. */ 4/* Etrax 100LX have 32-byte cache-lines. */
5#define L1_CACHE_BYTES 32 5#define L1_CACHE_BYTES 32
6#define L1_CACHE_SHIFT 5 6#define L1_CACHE_SHIFT 5
7#define L1_CACHE_SHIFT_MAX 5
8 7
9#endif /* _ASM_ARCH_CACHE_H */ 8#endif /* _ASM_ARCH_CACHE_H */
diff --git a/include/asm-cris/arch-v32/cache.h b/include/asm-cris/arch-v32/cache.h
index 4fed8d62ccc8..80b236b15319 100644
--- a/include/asm-cris/arch-v32/cache.h
+++ b/include/asm-cris/arch-v32/cache.h
@@ -4,6 +4,5 @@
4/* A cache-line is 32 bytes. */ 4/* A cache-line is 32 bytes. */
5#define L1_CACHE_BYTES 32 5#define L1_CACHE_BYTES 32
6#define L1_CACHE_SHIFT 5 6#define L1_CACHE_SHIFT 5
7#define L1_CACHE_SHIFT_MAX 5
8 7
9#endif /* _ASM_CRIS_ARCH_CACHE_H */ 8#endif /* _ASM_CRIS_ARCH_CACHE_H */
diff --git a/include/asm-cris/dma-mapping.h b/include/asm-cris/dma-mapping.h
index 8eff51349ae7..cbf1a98f0129 100644
--- a/include/asm-cris/dma-mapping.h
+++ b/include/asm-cris/dma-mapping.h
@@ -153,7 +153,7 @@ dma_set_mask(struct device *dev, u64 mask)
153static inline int 153static inline int
154dma_get_cache_alignment(void) 154dma_get_cache_alignment(void)
155{ 155{
156 return (1 << L1_CACHE_SHIFT_MAX); 156 return (1 << INTERNODE_CACHE_SHIFT);
157} 157}
158 158
159#define dma_is_consistent(d) (1) 159#define dma_is_consistent(d) (1)