1 files changed, 14 insertions, 0 deletions

diff --git a/include/asm-cris/arch-v32/tlb.h b/include/asm-cris/arch-v32/tlb.h
new file mode 100644
index 000000000000..4effb1253660
--- /dev/null
+++ b/include/asm-cris/arch-v32/tlb.h
@@ -0,0 +1,14 @@
+#ifndef _CRIS_ARCH_TLB_H
+#define _CRIS_ARCH_TLB_H
+
+/*
+ * The TLB is a 64-entry cache. Each entry has a 8-bit page_id that is used
+ * to store the "process" it belongs to (=> fast mm context switch). The
+ * last page_id is never used so we can make TLB entries that never matches.
+ */
+#define NUM_TLB_ENTRIES 64
+#define NUM_PAGEID 256
+#define INVALID_PAGEID 255
+#define NO_CONTEXT -1
+
+#endif /* _CRIS_ARCH_TLB_H */