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-rw-r--r--include/asm-cris/arch-v32/ide.h61
1 files changed, 61 insertions, 0 deletions
diff --git a/include/asm-cris/arch-v32/ide.h b/include/asm-cris/arch-v32/ide.h
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1/*
2 * linux/include/asm-cris/ide.h
3 *
4 * Copyright (C) 2000-2004 Axis Communications AB
5 *
6 * Authors: Bjorn Wesen, Mikael Starvik
7 *
8 */
9
10/*
11 * This file contains the ETRAX FS specific IDE code.
12 */
13
14#ifndef __ASMCRIS_IDE_H
15#define __ASMCRIS_IDE_H
16
17#ifdef __KERNEL__
18
19#include <asm/arch/hwregs/intr_vect.h>
20#include <asm/arch/hwregs/ata_defs.h>
21#include <asm/io.h>
22#include <asm-generic/ide_iops.h>
23
24
25/* ETRAX FS can support 4 IDE busses on the same pins (serialized) */
26
27#define MAX_HWIFS 4
28
29extern __inline__ int ide_default_irq(unsigned long base)
30{
31 /* all IDE busses share the same IRQ,
32 * this has the side-effect that ide-probe.c will cluster our 4 interfaces
33 * together in a hwgroup, and will serialize accesses. this is good, because
34 * we can't access more than one interface at the same time on ETRAX100.
35 */
36 return ATA_INTR_VECT;
37}
38
39extern __inline__ unsigned long ide_default_io_base(int index)
40{
41 reg_ata_rw_ctrl2 ctrl2 = {.sel = index};
42 /* we have no real I/O base address per interface, since all go through the
43 * same register. but in a bitfield in that register, we have the i/f number.
44 * so we can use the io_base to remember that bitfield.
45 */
46 ctrl2.sel = index;
47
48 return REG_TYPE_CONV(unsigned long, reg_ata_rw_ctrl2, ctrl2);
49}
50
51/* some configuration options we don't need */
52
53#undef SUPPORT_VLB_SYNC
54#define SUPPORT_VLB_SYNC 0
55
56#define IDE_ARCH_ACK_INTR
57#define ide_ack_intr(hwif) (hwif)->hw.ack_intr(hwif)
58
59#endif /* __KERNEL__ */
60
61#endif /* __ASMCRIS_IDE_H */