13 files changed, 261 insertions, 27 deletions

diff --git a/include/asm-cris/arch-v10/atomic.h b/include/asm-cris/arch-v10/atomic.h
new file mode 100644
index 000000000000..6ef5e7d09024
--- /dev/null
+++ b/include/asm-cris/arch-v10/atomic.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_CRIS_ARCH_ATOMIC__
+#define __ASM_CRIS_ARCH_ATOMIC__
+
+#define cris_atomic_save(addr, flags) local_irq_save(flags);
+#define cris_atomic_restore(addr, flags) local_irq_restore(flags);
+
+#endif
diff --git a/include/asm-cris/arch-v10/bitops.h b/include/asm-cris/arch-v10/bitops.h
index 21b7ae8c9bb3..b73f5396e5a6 100644
--- a/include/asm-cris/arch-v10/bitops.h
+++ b/include/asm-cris/arch-v10/bitops.h
@@ -51,7 +51,7 @@ extern inline unsigned long ffz(unsigned long w)
  *
  * Undefined if no bit exists, so code should check against 0 first.
  */
-extern __inline__ unsigned long __ffs(unsigned long word)
+extern inline unsigned long __ffs(unsigned long word)
 {
         return cris_swapnwbrlz(~word);
 }
diff --git a/include/asm-cris/arch-v10/dma.h b/include/asm-cris/arch-v10/dma.h
index 9e078b9bc934..ecb9dba6fa4f 100644
--- a/include/asm-cris/arch-v10/dma.h
+++ b/include/asm-cris/arch-v10/dma.h
@@ -44,3 +44,31 @@
 #define USB_RX_DMA_NBR 9
 
 #endif
+
+enum dma_owner
+{
+  dma_eth,
+  dma_ser0,
+  dma_ser1, /* Async and sync */
+  dma_ser2,
+  dma_ser3, /* Async and sync */
+  dma_ata,
+  dma_par0,
+  dma_par1,
+  dma_ext0,
+  dma_ext1,
+  dma_int6,
+  dma_int7,
+  dma_usb,
+  dma_scsi0,
+  dma_scsi1
+};
+
+/* Masks used by cris_request_dma options: */
+#define DMA_VERBOSE_ON_ERROR    (1<<0)
+#define DMA_PANIC_ON_ERROR     ((1<<1)|DMA_VERBOSE_ON_ERROR)
+
+int cris_request_dma(unsigned int dmanr, const char * device_id,
+                     unsigned options, enum dma_owner owner);
+
+void cris_free_dma(unsigned int dmanr, const char * device_id);
diff --git a/include/asm-cris/arch-v10/elf.h b/include/asm-cris/arch-v10/elf.h
index 2a2201ca538e..1c38ee728b17 100644
--- a/include/asm-cris/arch-v10/elf.h
+++ b/include/asm-cris/arch-v10/elf.h
@@ -1,6 +1,16 @@
 #ifndef __ASMCRIS_ARCH_ELF_H
 #define __ASMCRIS_ARCH_ELF_H
 
+#define ELF_MACH EF_CRIS_VARIANT_ANY_V0_V10
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(x)                       \
+ ((x)->e_machine == EM_CRIS                     \
+  && ((((x)->e_flags & EF_CRIS_VARIANT_MASK) == EF_CRIS_VARIANT_ANY_V0_V10      \
+      || (((x)->e_flags & EF_CRIS_VARIANT_MASK) == EF_CRIS_VARIANT_COMMON_V10_V32))))
+
 /*
  * ELF register definitions..
  */
diff --git a/include/asm-cris/arch-v10/ide.h b/include/asm-cris/arch-v10/ide.h
new file mode 100644
index 000000000000..8cf2d7cb22ac
--- /dev/null
+++ b/include/asm-cris/arch-v10/ide.h
@@ -0,0 +1,99 @@
+/*
+ *  linux/include/asm-cris/ide.h
+ *
+ *  Copyright (C) 2000, 2001, 2002  Axis Communications AB
+ *
+ *  Authors:    Bjorn Wesen
+ *
+ */
+
+/*
+ *  This file contains the ETRAX 100LX specific IDE code.
+ */
+
+#ifndef __ASMCRIS_IDE_H
+#define __ASMCRIS_IDE_H
+
+#ifdef __KERNEL__
+
+#include <asm/arch/svinto.h>
+#include <asm/io.h>
+#include <asm-generic/ide_iops.h>
+
+
+/* ETRAX 100 can support 4 IDE busses on the same pins (serialized) */
+
+#define MAX_HWIFS       4
+
+extern __inline__ int ide_default_irq(unsigned long base)
+{
+        /* all IDE busses share the same IRQ, number 4.
+         * this has the side-effect that ide-probe.c will cluster our 4 interfaces
+         * together in a hwgroup, and will serialize accesses. this is good, because
+         * we can't access more than one interface at the same time on ETRAX100.
+         */
+        return 4;
+}
+
+extern __inline__ unsigned long ide_default_io_base(int index)
+{
+        /* we have no real I/O base address per interface, since all go through the
+         * same register. but in a bitfield in that register, we have the i/f number.
+         * so we can use the io_base to remember that bitfield.
+         */
+        static const unsigned long io_bases[MAX_HWIFS] = {
+                IO_FIELD(R_ATA_CTRL_DATA, sel, 0),
+                IO_FIELD(R_ATA_CTRL_DATA, sel, 1),
+                IO_FIELD(R_ATA_CTRL_DATA, sel, 2),
+                IO_FIELD(R_ATA_CTRL_DATA, sel, 3)
+        };
+        return io_bases[index];
+}
+
+/* this is called once for each interface, to setup the port addresses. data_port is the result
+ * of the ide_default_io_base call above. ctrl_port will be 0, but that is don't care for us.
+ */
+
+extern __inline__ void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, unsigned long ctrl_port, int *irq)
+{
+        int i;
+
+        /* fill in ports for ATA addresses 0 to 7 */
+
+        for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
+                hw->io_ports[i] = data_port |
+                        IO_FIELD(R_ATA_CTRL_DATA, addr, i) |
+                        IO_STATE(R_ATA_CTRL_DATA, cs0, active);
+        }
+
+        /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */
+
+        hw->io_ports[IDE_CONTROL_OFFSET] = data_port |
+                        IO_FIELD(R_ATA_CTRL_DATA, addr, 6) |
+                        IO_STATE(R_ATA_CTRL_DATA, cs1, active);
+
+        /* whats this for ? */
+
+        hw->io_ports[IDE_IRQ_OFFSET] = 0;
+}
+
+extern __inline__ void ide_init_default_hwifs(void)
+{
+        hw_regs_t hw;
+        int index;
+
+        for(index = 0; index < MAX_HWIFS; index++) {
+                ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
+                hw.irq = ide_default_irq(ide_default_io_base(index));
+                ide_register_hw(&hw, NULL);
+        }
+}
+
+/* some configuration options we don't need */
+
+#undef SUPPORT_VLB_SYNC
+#define SUPPORT_VLB_SYNC 0
+
+#endif /* __KERNEL__ */
+
+#endif /* __ASMCRIS_IDE_H */
diff --git a/include/asm-cris/arch-v10/io.h b/include/asm-cris/arch-v10/io.h
index 0bc38a0313c1..dd39198ec67d 100644
--- a/include/asm-cris/arch-v10/io.h
+++ b/include/asm-cris/arch-v10/io.h
@@ -6,6 +6,7 @@
 
 /* Etrax shadow registers - which live in arch/cris/kernel/shadows.c */
 
+extern unsigned long gen_config_ii_shadow;
 extern unsigned long port_g_data_shadow;
 extern unsigned char port_pa_dir_shadow;
 extern unsigned char port_pa_data_shadow;
diff --git a/include/asm-cris/arch-v10/io_interface_mux.h b/include/asm-cris/arch-v10/io_interface_mux.h
new file mode 100644
index 000000000000..d92500080883
--- /dev/null
+++ b/include/asm-cris/arch-v10/io_interface_mux.h
@@ -0,0 +1,75 @@
+/* IO interface mux allocator for ETRAX100LX.
+ * Copyright 2004, Axis Communications AB
+ * $Id: io_interface_mux.h,v 1.1 2004/12/13 12:21:53 starvik Exp $
+ */
+
+
+#ifndef _IO_INTERFACE_MUX_H
+#define _IO_INTERFACE_MUX_H
+
+
+/* C.f. ETRAX100LX Designer's Reference 20.9 */
+
+/* The order in enum must match the order of interfaces[] in
+ * io_interface_mux.c */
+enum cris_io_interface {
+        /* Begin Non-multiplexed interfaces */
+        if_eth = 0,
+        if_serial_0,
+        /* End Non-multiplexed interfaces */
+        if_serial_1,
+        if_serial_2,
+        if_serial_3,
+        if_sync_serial_1,
+        if_sync_serial_3,
+        if_shared_ram,
+        if_shared_ram_w,
+        if_par_0,
+        if_par_1,
+        if_par_w,
+        if_scsi8_0,
+        if_scsi8_1,
+        if_scsi_w,
+        if_ata,
+        if_csp,
+        if_i2c,
+        if_usb_1,
+        if_usb_2,
+        /* GPIO pins */
+        if_gpio_grp_a,
+        if_gpio_grp_b,
+        if_gpio_grp_c,
+        if_gpio_grp_d,
+        if_gpio_grp_e,
+        if_gpio_grp_f,
+        if_max_interfaces,
+        if_unclaimed
+};
+
+int cris_request_io_interface(enum cris_io_interface ioif, const char *device_id);
+
+void cris_free_io_interface(enum cris_io_interface ioif);
+
+/* port can be 'a', 'b' or 'g' */
+int cris_io_interface_allocate_pins(const enum cris_io_interface ioif,
+                                    const char port,
+                                    const unsigned start_bit,
+                                    const unsigned stop_bit);
+
+/* port can be 'a', 'b' or 'g' */
+int cris_io_interface_free_pins(const enum cris_io_interface ioif,
+                                const char port,
+                                const unsigned start_bit,
+                                const unsigned stop_bit);
+
+int cris_io_interface_register_watcher(void (*notify)(const unsigned int gpio_in_available,
+                                                      const unsigned int gpio_out_available,
+                                                      const unsigned char pa_available,
+                                                      const unsigned char pb_available));
+
+void cris_io_interface_delete_watcher(void (*notify)(const unsigned int gpio_in_available,
+                                                     const unsigned int gpio_out_available,
+                                                     const unsigned char pa_available,
+                                                     const unsigned char pb_available));
+
+#endif /* _IO_INTERFACE_MUX_H */
diff --git a/include/asm-cris/arch-v10/irq.h b/include/asm-cris/arch-v10/irq.h
index a2a6e1533ea0..4fa8945b0263 100644
--- a/include/asm-cris/arch-v10/irq.h
+++ b/include/asm-cris/arch-v10/irq.h
@@ -74,12 +74,9 @@ struct etrax_interrupt_vector {
 };
 
 extern struct etrax_interrupt_vector *etrax_irv;
-void set_int_vector(int n, irqvectptr addr, irqvectptr saddr);
+void set_int_vector(int n, irqvectptr addr);
 void set_break_vector(int n, irqvectptr addr);
 
-#define mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr));
-#define unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr));
-
 #define __STR(x) #x
 #define STR(x) __STR(x)
  
@@ -121,26 +118,17 @@ void set_break_vector(int n, irqvectptr addr);
 
 #define BUILD_IRQ(nr,mask) \
 void IRQ_NAME(nr); \
-void sIRQ_NAME(nr); \
-void BAD_IRQ_NAME(nr); \
 __asm__ ( \
           ".text\n\t" \
           "IRQ" #nr "_interrupt:\n\t" \
           SAVE_ALL \
-          "sIRQ" #nr "_interrupt:\n\t" /* shortcut for the multiple irq handler */ \
           BLOCK_IRQ(mask,nr) /* this must be done to prevent irq loops when we ei later */ \
           "moveq "#nr",$r10\n\t" \
           "move.d $sp,$r11\n\t" \
           "jsr do_IRQ\n\t" /* irq.c, r10 and r11 are arguments */ \
           UNBLOCK_IRQ(mask) \
           "moveq 0,$r9\n\t" /* make ret_from_intr realise we came from an irq */ \
-          "jump ret_from_intr\n\t" \
-          "bad_IRQ" #nr "_interrupt:\n\t" \
-          "push $r0\n\t" \
-          BLOCK_IRQ(mask,nr) \
-          "pop $r0\n\t" \
-          "reti\n\t" \
-          "nop\n");
+          "jump ret_from_intr\n\t");
 
 /* This is subtle. The timer interrupt is crucial and it should not be disabled for 
  * too long. However, if it had been a normal interrupt as per BUILD_IRQ, it would
@@ -159,23 +147,14 @@ __asm__ ( \
 
 #define BUILD_TIMER_IRQ(nr,mask) \
 void IRQ_NAME(nr); \
-void sIRQ_NAME(nr); \
-void BAD_IRQ_NAME(nr); \
 __asm__ ( \
           ".text\n\t" \
           "IRQ" #nr "_interrupt:\n\t" \
           SAVE_ALL \
-          "sIRQ" #nr "_interrupt:\n\t" /* shortcut for the multiple irq handler */ \
           "moveq "#nr",$r10\n\t" \
           "move.d $sp,$r11\n\t" \
           "jsr do_IRQ\n\t" /* irq.c, r10 and r11 are arguments */ \
           "moveq 0,$r9\n\t" /* make ret_from_intr realise we came from an irq */ \
-          "jump ret_from_intr\n\t" \
-          "bad_IRQ" #nr "_interrupt:\n\t" \
-          "push $r0\n\t" \
-          BLOCK_IRQ(mask,nr) \
-          "pop $r0\n\t" \
-          "reti\n\t" \
-          "nop\n");
+          "jump ret_from_intr\n\t");
 
 #endif
diff --git a/include/asm-cris/arch-v10/memmap.h b/include/asm-cris/arch-v10/memmap.h
new file mode 100644
index 000000000000..13f3b971407f
--- /dev/null
+++ b/include/asm-cris/arch-v10/memmap.h
@@ -0,0 +1,22 @@
+#ifndef _ASM_ARCH_MEMMAP_H
+#define _ASM_ARCH_MEMMAP_H
+
+#define MEM_CSE0_START (0x00000000)
+#define MEM_CSE0_SIZE (0x04000000)
+#define MEM_CSE1_START (0x04000000)
+#define MEM_CSE1_SIZE (0x04000000)
+#define MEM_CSR0_START (0x08000000)
+#define MEM_CSR1_START (0x0c000000)
+#define MEM_CSP0_START (0x10000000)
+#define MEM_CSP1_START (0x14000000)
+#define MEM_CSP2_START (0x18000000)
+#define MEM_CSP3_START (0x1c000000)
+#define MEM_CSP4_START (0x20000000)
+#define MEM_CSP5_START (0x24000000)
+#define MEM_CSP6_START (0x28000000)
+#define MEM_CSP7_START (0x2c000000)
+#define MEM_DRAM_START (0x40000000)
+
+#define MEM_NON_CACHEABLE (0x80000000)
+
+#endif
diff --git a/include/asm-cris/arch-v10/mmu.h b/include/asm-cris/arch-v10/mmu.h
index d18aa00e50bc..df84f1716e6b 100644
--- a/include/asm-cris/arch-v10/mmu.h
+++ b/include/asm-cris/arch-v10/mmu.h
@@ -7,7 +7,10 @@
 
 /* type used in struct mm to couple an MMU context to an active mm */
 
-typedef unsigned int mm_context_t;
+typedef struct
+{
+  unsigned int page_id;
+} mm_context_t;
 
 /* kernel memory segments */
 
diff --git a/include/asm-cris/arch-v10/offset.h b/include/asm-cris/arch-v10/offset.h
index fcbd77eab281..675b51d85639 100644
--- a/include/asm-cris/arch-v10/offset.h
+++ b/include/asm-cris/arch-v10/offset.h
@@ -25,7 +25,7 @@
 #define THREAD_usp 4 /* offsetof(struct thread_struct, usp) */
 #define THREAD_dccr 8 /* offsetof(struct thread_struct, dccr) */
 
-#define TASK_pid 133 /* offsetof(struct task_struct, pid) */
+#define TASK_pid 141 /* offsetof(struct task_struct, pid) */
 
 #define LCLONE_VM 256 /* CLONE_VM */
 #define LCLONE_UNTRACED 8388608 /* CLONE_UNTRACED */
diff --git a/include/asm-cris/arch-v10/processor.h b/include/asm-cris/arch-v10/processor.h
index 9355d8675a58..e23df8dc96e8 100644
--- a/include/asm-cris/arch-v10/processor.h
+++ b/include/asm-cris/arch-v10/processor.h
@@ -59,4 +59,12 @@ struct thread_struct {
         wrusp(usp);           \
 } while(0)
 
+/* Called when handling a kernel bus fault fixup.
+ *
+ * After a fixup we do not want to return by restoring the CPU-state
+ * anymore, so switch frame-types (see ptrace.h)
+ */
+#define arch_fixup(regs) \
+   regs->frametype = CRIS_FRAME_NORMAL;
+
 #endif
diff --git a/include/asm-cris/arch-v10/system.h b/include/asm-cris/arch-v10/system.h
index 781ca30229a8..6cc35642b8ab 100644
--- a/include/asm-cris/arch-v10/system.h
+++ b/include/asm-cris/arch-v10/system.h
@@ -11,6 +11,8 @@ extern inline unsigned long rdvr(void) {
         return vr;
 }
 
+#define cris_machine_name "cris"
+
 /* read/write the user-mode stackpointer */
 
 extern inline unsigned long rdusp(void) {