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Diffstat (limited to 'include/asm-blackfin/mach-common/cdef_LPBlackfin.h')
-rw-r--r--include/asm-blackfin/mach-common/cdef_LPBlackfin.h471
1 files changed, 471 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-common/cdef_LPBlackfin.h b/include/asm-blackfin/mach-common/cdef_LPBlackfin.h
new file mode 100644
index 000000000000..22aa5e637993
--- /dev/null
+++ b/include/asm-blackfin/mach-common/cdef_LPBlackfin.h
@@ -0,0 +1,471 @@
1 /*
2 * File: include/asm-blackfin/mach-common/cdef_LPBlackfin.h
3 * Based on:
4 * Author: unknown
5 * COPYRIGHT 2005 Analog Devices
6 * Created: ?
7 * Description:
8 *
9 * Modified:
10 *
11 * Bugs: Enter bugs at http://blackfin.uclinux.org/
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2, or (at your option)
16 * any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; see the file COPYING.
25 * If not, write to the Free Software Foundation,
26 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 */
28
29#ifndef _CDEF_LPBLACKFIN_H
30#define _CDEF_LPBLACKFIN_H
31
32/*#if !defined(__ADSPLPBLACKFIN__)
33#warning cdef_LPBlackfin.h should only be included for 532 compatible chips.
34#endif
35*/
36#include <asm/mach-common/def_LPBlackfin.h>
37
38/*Cache & SRAM Memory*/
39#define pSRAM_BASE_ADDRESS ((volatile void **)SRAM_BASE_ADDRESS)
40#define bfin_read_SRAM_BASE_ADDRESS() bfin_read32(SRAM_BASE_ADDRESS)
41#define bfin_write_SRAM_BASE_ADDRESS(val) bfin_write32(SRAM_BASE_ADDRESS,val)
42#define pDMEM_CONTROL ((volatile unsigned long *)DMEM_CONTROL)
43#define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL)
44#define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL,val)
45#define pDCPLB_STATUS ((volatile unsigned long *)DCPLB_STATUS)
46#define bfin_read_DCPLB_STATUS() bfin_read32(DCPLB_STATUS)
47#define bfin_write_DCPLB_STATUS(val) bfin_write32(DCPLB_STATUS,val)
48#define pDCPLB_FAULT_ADDR ((volatile void **)DCPLB_FAULT_ADDR)
49#define bfin_read_DCPLB_FAULT_ADDR() bfin_read32(DCPLB_FAULT_ADDR)
50#define bfin_write_DCPLB_FAULT_ADDR(val) bfin_write32(DCPLB_FAULT_ADDR,val)
51/*
52#define MMR_TIMEOUT 0xFFE00010
53*/
54#define pDCPLB_ADDR0 ((volatile void **)DCPLB_ADDR0)
55#define bfin_read_DCPLB_ADDR0() bfin_read32(DCPLB_ADDR0)
56#define bfin_write_DCPLB_ADDR0(val) bfin_write32(DCPLB_ADDR0,val)
57#define pDCPLB_ADDR1 ((volatile void **)DCPLB_ADDR1)
58#define bfin_read_DCPLB_ADDR1() bfin_read32(DCPLB_ADDR1)
59#define bfin_write_DCPLB_ADDR1(val) bfin_write32(DCPLB_ADDR1,val)
60#define pDCPLB_ADDR2 ((volatile void **)DCPLB_ADDR2)
61#define bfin_read_DCPLB_ADDR2() bfin_read32(DCPLB_ADDR2)
62#define bfin_write_DCPLB_ADDR2(val) bfin_write32(DCPLB_ADDR2,val)
63#define pDCPLB_ADDR3 ((volatile void **)DCPLB_ADDR3)
64#define bfin_read_DCPLB_ADDR3() bfin_read32(DCPLB_ADDR3)
65#define bfin_write_DCPLB_ADDR3(val) bfin_write32(DCPLB_ADDR3,val)
66#define pDCPLB_ADDR4 ((volatile void **)DCPLB_ADDR4)
67#define bfin_read_DCPLB_ADDR4() bfin_read32(DCPLB_ADDR4)
68#define bfin_write_DCPLB_ADDR4(val) bfin_write32(DCPLB_ADDR4,val)
69#define pDCPLB_ADDR5 ((volatile void **)DCPLB_ADDR5)
70#define bfin_read_DCPLB_ADDR5() bfin_read32(DCPLB_ADDR5)
71#define bfin_write_DCPLB_ADDR5(val) bfin_write32(DCPLB_ADDR5,val)
72#define pDCPLB_ADDR6 ((volatile void **)DCPLB_ADDR6)
73#define bfin_read_DCPLB_ADDR6() bfin_read32(DCPLB_ADDR6)
74#define bfin_write_DCPLB_ADDR6(val) bfin_write32(DCPLB_ADDR6,val)
75#define pDCPLB_ADDR7 ((volatile void **)DCPLB_ADDR7)
76#define bfin_read_DCPLB_ADDR7() bfin_read32(DCPLB_ADDR7)
77#define bfin_write_DCPLB_ADDR7(val) bfin_write32(DCPLB_ADDR7,val)
78#define pDCPLB_ADDR8 ((volatile void **)DCPLB_ADDR8)
79#define bfin_read_DCPLB_ADDR8() bfin_read32(DCPLB_ADDR8)
80#define bfin_write_DCPLB_ADDR8(val) bfin_write32(DCPLB_ADDR8,val)
81#define pDCPLB_ADDR9 ((volatile void **)DCPLB_ADDR9)
82#define bfin_read_DCPLB_ADDR9() bfin_read32(DCPLB_ADDR9)
83#define bfin_write_DCPLB_ADDR9(val) bfin_write32(DCPLB_ADDR9,val)
84#define pDCPLB_ADDR10 ((volatile void **)DCPLB_ADDR10)
85#define bfin_read_DCPLB_ADDR10() bfin_read32(DCPLB_ADDR10)
86#define bfin_write_DCPLB_ADDR10(val) bfin_write32(DCPLB_ADDR10,val)
87#define pDCPLB_ADDR11 ((volatile void **)DCPLB_ADDR11)
88#define bfin_read_DCPLB_ADDR11() bfin_read32(DCPLB_ADDR11)
89#define bfin_write_DCPLB_ADDR11(val) bfin_write32(DCPLB_ADDR11,val)
90#define pDCPLB_ADDR12 ((volatile void **)DCPLB_ADDR12)
91#define bfin_read_DCPLB_ADDR12() bfin_read32(DCPLB_ADDR12)
92#define bfin_write_DCPLB_ADDR12(val) bfin_write32(DCPLB_ADDR12,val)
93#define pDCPLB_ADDR13 ((volatile void **)DCPLB_ADDR13)
94#define bfin_read_DCPLB_ADDR13() bfin_read32(DCPLB_ADDR13)
95#define bfin_write_DCPLB_ADDR13(val) bfin_write32(DCPLB_ADDR13,val)
96#define pDCPLB_ADDR14 ((volatile void **)DCPLB_ADDR14)
97#define bfin_read_DCPLB_ADDR14() bfin_read32(DCPLB_ADDR14)
98#define bfin_write_DCPLB_ADDR14(val) bfin_write32(DCPLB_ADDR14,val)
99#define pDCPLB_ADDR15 ((volatile void **)DCPLB_ADDR15)
100#define bfin_read_DCPLB_ADDR15() bfin_read32(DCPLB_ADDR15)
101#define bfin_write_DCPLB_ADDR15(val) bfin_write32(DCPLB_ADDR15,val)
102#define pDCPLB_DATA0 ((volatile unsigned long *)DCPLB_DATA0)
103#define bfin_read_DCPLB_DATA0() bfin_read32(DCPLB_DATA0)
104#define bfin_write_DCPLB_DATA0(val) bfin_write32(DCPLB_DATA0,val)
105#define pDCPLB_DATA1 ((volatile unsigned long *)DCPLB_DATA1)
106#define bfin_read_DCPLB_DATA1() bfin_read32(DCPLB_DATA1)
107#define bfin_write_DCPLB_DATA1(val) bfin_write32(DCPLB_DATA1,val)
108#define pDCPLB_DATA2 ((volatile unsigned long *)DCPLB_DATA2)
109#define bfin_read_DCPLB_DATA2() bfin_read32(DCPLB_DATA2)
110#define bfin_write_DCPLB_DATA2(val) bfin_write32(DCPLB_DATA2,val)
111#define pDCPLB_DATA3 ((volatile unsigned long *)DCPLB_DATA3)
112#define bfin_read_DCPLB_DATA3() bfin_read32(DCPLB_DATA3)
113#define bfin_write_DCPLB_DATA3(val) bfin_write32(DCPLB_DATA3,val)
114#define pDCPLB_DATA4 ((volatile unsigned long *)DCPLB_DATA4)
115#define bfin_read_DCPLB_DATA4() bfin_read32(DCPLB_DATA4)
116#define bfin_write_DCPLB_DATA4(val) bfin_write32(DCPLB_DATA4,val)
117#define pDCPLB_DATA5 ((volatile unsigned long *)DCPLB_DATA5)
118#define bfin_read_DCPLB_DATA5() bfin_read32(DCPLB_DATA5)
119#define bfin_write_DCPLB_DATA5(val) bfin_write32(DCPLB_DATA5,val)
120#define pDCPLB_DATA6 ((volatile unsigned long *)DCPLB_DATA6)
121#define bfin_read_DCPLB_DATA6() bfin_read32(DCPLB_DATA6)
122#define bfin_write_DCPLB_DATA6(val) bfin_write32(DCPLB_DATA6,val)
123#define pDCPLB_DATA7 ((volatile unsigned long *)DCPLB_DATA7)
124#define bfin_read_DCPLB_DATA7() bfin_read32(DCPLB_DATA7)
125#define bfin_write_DCPLB_DATA7(val) bfin_write32(DCPLB_DATA7,val)
126#define pDCPLB_DATA8 ((volatile unsigned long *)DCPLB_DATA8)
127#define bfin_read_DCPLB_DATA8() bfin_read32(DCPLB_DATA8)
128#define bfin_write_DCPLB_DATA8(val) bfin_write32(DCPLB_DATA8,val)
129#define pDCPLB_DATA9 ((volatile unsigned long *)DCPLB_DATA9)
130#define bfin_read_DCPLB_DATA9() bfin_read32(DCPLB_DATA9)
131#define bfin_write_DCPLB_DATA9(val) bfin_write32(DCPLB_DATA9,val)
132#define pDCPLB_DATA10 ((volatile unsigned long *)DCPLB_DATA10)
133#define bfin_read_DCPLB_DATA10() bfin_read32(DCPLB_DATA10)
134#define bfin_write_DCPLB_DATA10(val) bfin_write32(DCPLB_DATA10,val)
135#define pDCPLB_DATA11 ((volatile unsigned long *)DCPLB_DATA11)
136#define bfin_read_DCPLB_DATA11() bfin_read32(DCPLB_DATA11)
137#define bfin_write_DCPLB_DATA11(val) bfin_write32(DCPLB_DATA11,val)
138#define pDCPLB_DATA12 ((volatile unsigned long *)DCPLB_DATA12)
139#define bfin_read_DCPLB_DATA12() bfin_read32(DCPLB_DATA12)
140#define bfin_write_DCPLB_DATA12(val) bfin_write32(DCPLB_DATA12,val)
141#define pDCPLB_DATA13 ((volatile unsigned long *)DCPLB_DATA13)
142#define bfin_read_DCPLB_DATA13() bfin_read32(DCPLB_DATA13)
143#define bfin_write_DCPLB_DATA13(val) bfin_write32(DCPLB_DATA13,val)
144#define pDCPLB_DATA14 ((volatile unsigned long *)DCPLB_DATA14)
145#define bfin_read_DCPLB_DATA14() bfin_read32(DCPLB_DATA14)
146#define bfin_write_DCPLB_DATA14(val) bfin_write32(DCPLB_DATA14,val)
147#define pDCPLB_DATA15 ((volatile unsigned long *)DCPLB_DATA15)
148#define bfin_read_DCPLB_DATA15() bfin_read32(DCPLB_DATA15)
149#define bfin_write_DCPLB_DATA15(val) bfin_write32(DCPLB_DATA15,val)
150#define pDTEST_COMMAND ((volatile unsigned long *)DTEST_COMMAND)
151#define bfin_read_DTEST_COMMAND() bfin_read32(DTEST_COMMAND)
152#define bfin_write_DTEST_COMMAND(val) bfin_write32(DTEST_COMMAND,val)
153/*
154#define DTEST_INDEX 0xFFE00304
155*/
156#define pDTEST_DATA0 ((volatile unsigned long *)DTEST_DATA0)
157#define bfin_read_DTEST_DATA0() bfin_read32(DTEST_DATA0)
158#define bfin_write_DTEST_DATA0(val) bfin_write32(DTEST_DATA0,val)
159#define pDTEST_DATA1 ((volatile unsigned long *)DTEST_DATA1)
160#define bfin_read_DTEST_DATA1() bfin_read32(DTEST_DATA1)
161#define bfin_write_DTEST_DATA1(val) bfin_write32(DTEST_DATA1,val)
162/*
163#define DTEST_DATA2 0xFFE00408
164#define DTEST_DATA3 0xFFE0040C
165*/
166#define pIMEM_CONTROL ((volatile unsigned long *)IMEM_CONTROL)
167#define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL)
168#define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL,val)
169#define pICPLB_STATUS ((volatile unsigned long *)ICPLB_STATUS)
170#define bfin_read_ICPLB_STATUS() bfin_read32(ICPLB_STATUS)
171#define bfin_write_ICPLB_STATUS(val) bfin_write32(ICPLB_STATUS,val)
172#define pICPLB_FAULT_ADDR ((volatile void **)ICPLB_FAULT_ADDR)
173#define bfin_read_ICPLB_FAULT_ADDR() bfin_read32(ICPLB_FAULT_ADDR)
174#define bfin_write_ICPLB_FAULT_ADDR(val) bfin_write32(ICPLB_FAULT_ADDR,val)
175#define pICPLB_ADDR0 ((volatile void **)ICPLB_ADDR0)
176#define bfin_read_ICPLB_ADDR0() bfin_read32(ICPLB_ADDR0)
177#define bfin_write_ICPLB_ADDR0(val) bfin_write32(ICPLB_ADDR0,val)
178#define pICPLB_ADDR1 ((volatile void **)ICPLB_ADDR1)
179#define bfin_read_ICPLB_ADDR1() bfin_read32(ICPLB_ADDR1)
180#define bfin_write_ICPLB_ADDR1(val) bfin_write32(ICPLB_ADDR1,val)
181#define pICPLB_ADDR2 ((volatile void **)ICPLB_ADDR2)
182#define bfin_read_ICPLB_ADDR2() bfin_read32(ICPLB_ADDR2)
183#define bfin_write_ICPLB_ADDR2(val) bfin_write32(ICPLB_ADDR2,val)
184#define pICPLB_ADDR3 ((volatile void **)ICPLB_ADDR3)
185#define bfin_read_ICPLB_ADDR3() bfin_read32(ICPLB_ADDR3)
186#define bfin_write_ICPLB_ADDR3(val) bfin_write32(ICPLB_ADDR3,val)
187#define pICPLB_ADDR4 ((volatile void **)ICPLB_ADDR4)
188#define bfin_read_ICPLB_ADDR4() bfin_read32(ICPLB_ADDR4)
189#define bfin_write_ICPLB_ADDR4(val) bfin_write32(ICPLB_ADDR4,val)
190#define pICPLB_ADDR5 ((volatile void **)ICPLB_ADDR5)
191#define bfin_read_ICPLB_ADDR5() bfin_read32(ICPLB_ADDR5)
192#define bfin_write_ICPLB_ADDR5(val) bfin_write32(ICPLB_ADDR5,val)
193#define pICPLB_ADDR6 ((volatile void **)ICPLB_ADDR6)
194#define bfin_read_ICPLB_ADDR6() bfin_read32(ICPLB_ADDR6)
195#define bfin_write_ICPLB_ADDR6(val) bfin_write32(ICPLB_ADDR6,val)
196#define pICPLB_ADDR7 ((volatile void **)ICPLB_ADDR7)
197#define bfin_read_ICPLB_ADDR7() bfin_read32(ICPLB_ADDR7)
198#define bfin_write_ICPLB_ADDR7(val) bfin_write32(ICPLB_ADDR7,val)
199#define pICPLB_ADDR8 ((volatile void **)ICPLB_ADDR8)
200#define bfin_read_ICPLB_ADDR8() bfin_read32(ICPLB_ADDR8)
201#define bfin_write_ICPLB_ADDR8(val) bfin_write32(ICPLB_ADDR8,val)
202#define pICPLB_ADDR9 ((volatile void **)ICPLB_ADDR9)
203#define bfin_read_ICPLB_ADDR9() bfin_read32(ICPLB_ADDR9)
204#define bfin_write_ICPLB_ADDR9(val) bfin_write32(ICPLB_ADDR9,val)
205#define pICPLB_ADDR10 ((volatile void **)ICPLB_ADDR10)
206#define bfin_read_ICPLB_ADDR10() bfin_read32(ICPLB_ADDR10)
207#define bfin_write_ICPLB_ADDR10(val) bfin_write32(ICPLB_ADDR10,val)
208#define pICPLB_ADDR11 ((volatile void **)ICPLB_ADDR11)
209#define bfin_read_ICPLB_ADDR11() bfin_read32(ICPLB_ADDR11)
210#define bfin_write_ICPLB_ADDR11(val) bfin_write32(ICPLB_ADDR11,val)
211#define pICPLB_ADDR12 ((volatile void **)ICPLB_ADDR12)
212#define bfin_read_ICPLB_ADDR12() bfin_read32(ICPLB_ADDR12)
213#define bfin_write_ICPLB_ADDR12(val) bfin_write32(ICPLB_ADDR12,val)
214#define pICPLB_ADDR13 ((volatile void **)ICPLB_ADDR13)
215#define bfin_read_ICPLB_ADDR13() bfin_read32(ICPLB_ADDR13)
216#define bfin_write_ICPLB_ADDR13(val) bfin_write32(ICPLB_ADDR13,val)
217#define pICPLB_ADDR14 ((volatile void **)ICPLB_ADDR14)
218#define bfin_read_ICPLB_ADDR14() bfin_read32(ICPLB_ADDR14)
219#define bfin_write_ICPLB_ADDR14(val) bfin_write32(ICPLB_ADDR14,val)
220#define pICPLB_ADDR15 ((volatile void **)ICPLB_ADDR15)
221#define bfin_read_ICPLB_ADDR15() bfin_read32(ICPLB_ADDR15)
222#define bfin_write_ICPLB_ADDR15(val) bfin_write32(ICPLB_ADDR15,val)
223#define pICPLB_DATA0 ((volatile unsigned long *)ICPLB_DATA0)
224#define bfin_read_ICPLB_DATA0() bfin_read32(ICPLB_DATA0)
225#define bfin_write_ICPLB_DATA0(val) bfin_write32(ICPLB_DATA0,val)
226#define pICPLB_DATA1 ((volatile unsigned long *)ICPLB_DATA1)
227#define bfin_read_ICPLB_DATA1() bfin_read32(ICPLB_DATA1)
228#define bfin_write_ICPLB_DATA1(val) bfin_write32(ICPLB_DATA1,val)
229#define pICPLB_DATA2 ((volatile unsigned long *)ICPLB_DATA2)
230#define bfin_read_ICPLB_DATA2() bfin_read32(ICPLB_DATA2)
231#define bfin_write_ICPLB_DATA2(val) bfin_write32(ICPLB_DATA2,val)
232#define pICPLB_DATA3 ((volatile unsigned long *)ICPLB_DATA3)
233#define bfin_read_ICPLB_DATA3() bfin_read32(ICPLB_DATA3)
234#define bfin_write_ICPLB_DATA3(val) bfin_write32(ICPLB_DATA3,val)
235#define pICPLB_DATA4 ((volatile unsigned long *)ICPLB_DATA4)
236#define bfin_read_ICPLB_DATA4() bfin_read32(ICPLB_DATA4)
237#define bfin_write_ICPLB_DATA4(val) bfin_write32(ICPLB_DATA4,val)
238#define pICPLB_DATA5 ((volatile unsigned long *)ICPLB_DATA5)
239#define bfin_read_ICPLB_DATA5() bfin_read32(ICPLB_DATA5)
240#define bfin_write_ICPLB_DATA5(val) bfin_write32(ICPLB_DATA5,val)
241#define pICPLB_DATA6 ((volatile unsigned long *)ICPLB_DATA6)
242#define bfin_read_ICPLB_DATA6() bfin_read32(ICPLB_DATA6)
243#define bfin_write_ICPLB_DATA6(val) bfin_write32(ICPLB_DATA6,val)
244#define pICPLB_DATA7 ((volatile unsigned long *)ICPLB_DATA7)
245#define bfin_read_ICPLB_DATA7() bfin_read32(ICPLB_DATA7)
246#define bfin_write_ICPLB_DATA7(val) bfin_write32(ICPLB_DATA7,val)
247#define pICPLB_DATA8 ((volatile unsigned long *)ICPLB_DATA8)
248#define bfin_read_ICPLB_DATA8() bfin_read32(ICPLB_DATA8)
249#define bfin_write_ICPLB_DATA8(val) bfin_write32(ICPLB_DATA8,val)
250#define pICPLB_DATA9 ((volatile unsigned long *)ICPLB_DATA9)
251#define bfin_read_ICPLB_DATA9() bfin_read32(ICPLB_DATA9)
252#define bfin_write_ICPLB_DATA9(val) bfin_write32(ICPLB_DATA9,val)
253#define pICPLB_DATA10 ((volatile unsigned long *)ICPLB_DATA10)
254#define bfin_read_ICPLB_DATA10() bfin_read32(ICPLB_DATA10)
255#define bfin_write_ICPLB_DATA10(val) bfin_write32(ICPLB_DATA10,val)
256#define pICPLB_DATA11 ((volatile unsigned long *)ICPLB_DATA11)
257#define bfin_read_ICPLB_DATA11() bfin_read32(ICPLB_DATA11)
258#define bfin_write_ICPLB_DATA11(val) bfin_write32(ICPLB_DATA11,val)
259#define pICPLB_DATA12 ((volatile unsigned long *)ICPLB_DATA12)
260#define bfin_read_ICPLB_DATA12() bfin_read32(ICPLB_DATA12)
261#define bfin_write_ICPLB_DATA12(val) bfin_write32(ICPLB_DATA12,val)
262#define pICPLB_DATA13 ((volatile unsigned long *)ICPLB_DATA13)
263#define bfin_read_ICPLB_DATA13() bfin_read32(ICPLB_DATA13)
264#define bfin_write_ICPLB_DATA13(val) bfin_write32(ICPLB_DATA13,val)
265#define pICPLB_DATA14 ((volatile unsigned long *)ICPLB_DATA14)
266#define bfin_read_ICPLB_DATA14() bfin_read32(ICPLB_DATA14)
267#define bfin_write_ICPLB_DATA14(val) bfin_write32(ICPLB_DATA14,val)
268#define pICPLB_DATA15 ((volatile unsigned long *)ICPLB_DATA15)
269#define bfin_read_ICPLB_DATA15() bfin_read32(ICPLB_DATA15)
270#define bfin_write_ICPLB_DATA15(val) bfin_write32(ICPLB_DATA15,val)
271#define pITEST_COMMAND ((volatile unsigned long *)ITEST_COMMAND)
272#define bfin_read_ITEST_COMMAND() bfin_read32(ITEST_COMMAND)
273#define bfin_write_ITEST_COMMAND(val) bfin_write32(ITEST_COMMAND,val)
274#if 0
275#define ITEST_INDEX 0xFFE01304 /* Instruction Test Index Register */
276#endif
277#define pITEST_DATA0 ((volatile unsigned long *)ITEST_DATA0)
278#define bfin_read_ITEST_DATA0() bfin_read32(ITEST_DATA0)
279#define bfin_write_ITEST_DATA0(val) bfin_write32(ITEST_DATA0,val)
280#define pITEST_DATA1 ((volatile unsigned long *)ITEST_DATA1)
281#define bfin_read_ITEST_DATA1() bfin_read32(ITEST_DATA1)
282#define bfin_write_ITEST_DATA1(val) bfin_write32(ITEST_DATA1,val)
283
284/* Event/Interrupt Registers*/
285
286#define pEVT0 ((volatile void **)EVT0)
287#define bfin_read_EVT0() bfin_read32(EVT0)
288#define bfin_write_EVT0(val) bfin_write32(EVT0,val)
289#define pEVT1 ((volatile void **)EVT1)
290#define bfin_read_EVT1() bfin_read32(EVT1)
291#define bfin_write_EVT1(val) bfin_write32(EVT1,val)
292#define pEVT2 ((volatile void **)EVT2)
293#define bfin_read_EVT2() bfin_read32(EVT2)
294#define bfin_write_EVT2(val) bfin_write32(EVT2,val)
295#define pEVT3 ((volatile void **)EVT3)
296#define bfin_read_EVT3() bfin_read32(EVT3)
297#define bfin_write_EVT3(val) bfin_write32(EVT3,val)
298#define pEVT4 ((volatile void **)EVT4)
299#define bfin_read_EVT4() bfin_read32(EVT4)
300#define bfin_write_EVT4(val) bfin_write32(EVT4,val)
301#define pEVT5 ((volatile void **)EVT5)
302#define bfin_read_EVT5() bfin_read32(EVT5)
303#define bfin_write_EVT5(val) bfin_write32(EVT5,val)
304#define pEVT6 ((volatile void **)EVT6)
305#define bfin_read_EVT6() bfin_read32(EVT6)
306#define bfin_write_EVT6(val) bfin_write32(EVT6,val)
307#define pEVT7 ((volatile void **)EVT7)
308#define bfin_read_EVT7() bfin_read32(EVT7)
309#define bfin_write_EVT7(val) bfin_write32(EVT7,val)
310#define pEVT8 ((volatile void **)EVT8)
311#define bfin_read_EVT8() bfin_read32(EVT8)
312#define bfin_write_EVT8(val) bfin_write32(EVT8,val)
313#define pEVT9 ((volatile void **)EVT9)
314#define bfin_read_EVT9() bfin_read32(EVT9)
315#define bfin_write_EVT9(val) bfin_write32(EVT9,val)
316#define pEVT10 ((volatile void **)EVT10)
317#define bfin_read_EVT10() bfin_read32(EVT10)
318#define bfin_write_EVT10(val) bfin_write32(EVT10,val)
319#define pEVT11 ((volatile void **)EVT11)
320#define bfin_read_EVT11() bfin_read32(EVT11)
321#define bfin_write_EVT11(val) bfin_write32(EVT11,val)
322#define pEVT12 ((volatile void **)EVT12)
323#define bfin_read_EVT12() bfin_read32(EVT12)
324#define bfin_write_EVT12(val) bfin_write32(EVT12,val)
325#define pEVT13 ((volatile void **)EVT13)
326#define bfin_read_EVT13() bfin_read32(EVT13)
327#define bfin_write_EVT13(val) bfin_write32(EVT13,val)
328#define pEVT14 ((volatile void **)EVT14)
329#define bfin_read_EVT14() bfin_read32(EVT14)
330#define bfin_write_EVT14(val) bfin_write32(EVT14,val)
331#define pEVT15 ((volatile void **)EVT15)
332#define bfin_read_EVT15() bfin_read32(EVT15)
333#define bfin_write_EVT15(val) bfin_write32(EVT15,val)
334#define pIMASK ((volatile unsigned long *)IMASK)
335#define bfin_read_IMASK() bfin_read32(IMASK)
336#define bfin_write_IMASK(val) bfin_write32(IMASK,val)
337#define pIPEND ((volatile unsigned long *)IPEND)
338#define bfin_read_IPEND() bfin_read32(IPEND)
339#define bfin_write_IPEND(val) bfin_write32(IPEND,val)
340#define pILAT ((volatile unsigned long *)ILAT)
341#define bfin_read_ILAT() bfin_read32(ILAT)
342#define bfin_write_ILAT(val) bfin_write32(ILAT,val)
343
344/*Core Timer Registers*/
345#define pTCNTL ((volatile unsigned long *)TCNTL)
346#define bfin_read_TCNTL() bfin_read32(TCNTL)
347#define bfin_write_TCNTL(val) bfin_write32(TCNTL,val)
348#define pTPERIOD ((volatile unsigned long *)TPERIOD)
349#define bfin_read_TPERIOD() bfin_read32(TPERIOD)
350#define bfin_write_TPERIOD(val) bfin_write32(TPERIOD,val)
351#define pTSCALE ((volatile unsigned long *)TSCALE)
352#define bfin_read_TSCALE() bfin_read32(TSCALE)
353#define bfin_write_TSCALE(val) bfin_write32(TSCALE,val)
354#define pTCOUNT ((volatile unsigned long *)TCOUNT)
355#define bfin_read_TCOUNT() bfin_read32(TCOUNT)
356#define bfin_write_TCOUNT(val) bfin_write32(TCOUNT,val)
357
358/*Debug/MP/Emulation Registers*/
359#define pDSPID ((volatile unsigned long *)DSPID)
360#define bfin_read_DSPID() bfin_read32(DSPID)
361#define bfin_write_DSPID(val) bfin_write32(DSPID,val)
362#define pDBGCTL ((volatile unsigned long *)DBGCTL)
363#define bfin_read_DBGCTL() bfin_read32(DBGCTL)
364#define bfin_write_DBGCTL(val) bfin_write32(DBGCTL,val)
365#define pDBGSTAT ((volatile unsigned long *)DBGSTAT)
366#define bfin_read_DBGSTAT() bfin_read32(DBGSTAT)
367#define bfin_write_DBGSTAT(val) bfin_write32(DBGSTAT,val)
368#define pEMUDAT ((volatile unsigned long *)EMUDAT)
369#define bfin_read_EMUDAT() bfin_read32(EMUDAT)
370#define bfin_write_EMUDAT(val) bfin_write32(EMUDAT,val)
371
372/*Trace Buffer Registers*/
373#define pTBUFCTL ((volatile unsigned long *)TBUFCTL)
374#define bfin_read_TBUFCTL() bfin_read32(TBUFCTL)
375#define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL,val)
376#define pTBUFSTAT ((volatile unsigned long *)TBUFSTAT)
377#define bfin_read_TBUFSTAT() bfin_read32(TBUFSTAT)
378#define bfin_write_TBUFSTAT(val) bfin_write32(TBUFSTAT,val)
379#define pTBUF ((volatile void **)TBUF)
380#define bfin_read_TBUF() bfin_read32(TBUF)
381#define bfin_write_TBUF(val) bfin_write32(TBUF,val)
382
383/*Watch Point Control Registers*/
384#define pWPIACTL ((volatile unsigned long *)WPIACTL)
385#define bfin_read_WPIACTL() bfin_read32(WPIACTL)
386#define bfin_write_WPIACTL(val) bfin_write32(WPIACTL,val)
387#define pWPIA0 ((volatile void **)WPIA0)
388#define bfin_read_WPIA0() bfin_read32(WPIA0)
389#define bfin_write_WPIA0(val) bfin_write32(WPIA0,val)
390#define pWPIA1 ((volatile void **)WPIA1)
391#define bfin_read_WPIA1() bfin_read32(WPIA1)
392#define bfin_write_WPIA1(val) bfin_write32(WPIA1,val)
393#define pWPIA2 ((volatile void **)WPIA2)
394#define bfin_read_WPIA2() bfin_read32(WPIA2)
395#define bfin_write_WPIA2(val) bfin_write32(WPIA2,val)
396#define pWPIA3 ((volatile void **)WPIA3)
397#define bfin_read_WPIA3() bfin_read32(WPIA3)
398#define bfin_write_WPIA3(val) bfin_write32(WPIA3,val)
399#define pWPIA4 ((volatile void **)WPIA4)
400#define bfin_read_WPIA4() bfin_read32(WPIA4)
401#define bfin_write_WPIA4(val) bfin_write32(WPIA4,val)
402#define pWPIA5 ((volatile void **)WPIA5)
403#define bfin_read_WPIA5() bfin_read32(WPIA5)
404#define bfin_write_WPIA5(val) bfin_write32(WPIA5,val)
405#define pWPIACNT0 ((volatile unsigned long *)WPIACNT0)
406#define bfin_read_WPIACNT0() bfin_read32(WPIACNT0)
407#define bfin_write_WPIACNT0(val) bfin_write32(WPIACNT0,val)
408#define pWPIACNT1 ((volatile unsigned long *)WPIACNT1)
409#define bfin_read_WPIACNT1() bfin_read32(WPIACNT1)
410#define bfin_write_WPIACNT1(val) bfin_write32(WPIACNT1,val)
411#define pWPIACNT2 ((volatile unsigned long *)WPIACNT2)
412#define bfin_read_WPIACNT2() bfin_read32(WPIACNT2)
413#define bfin_write_WPIACNT2(val) bfin_write32(WPIACNT2,val)
414#define pWPIACNT3 ((volatile unsigned long *)WPIACNT3)
415#define bfin_read_WPIACNT3() bfin_read32(WPIACNT3)
416#define bfin_write_WPIACNT3(val) bfin_write32(WPIACNT3,val)
417#define pWPIACNT4 ((volatile unsigned long *)WPIACNT4)
418#define bfin_read_WPIACNT4() bfin_read32(WPIACNT4)
419#define bfin_write_WPIACNT4(val) bfin_write32(WPIACNT4,val)
420#define pWPIACNT5 ((volatile unsigned long *)WPIACNT5)
421#define bfin_read_WPIACNT5() bfin_read32(WPIACNT5)
422#define bfin_write_WPIACNT5(val) bfin_write32(WPIACNT5,val)
423#define pWPDACTL ((volatile unsigned long *)WPDACTL)
424#define bfin_read_WPDACTL() bfin_read32(WPDACTL)
425#define bfin_write_WPDACTL(val) bfin_write32(WPDACTL,val)
426#define pWPDA0 ((volatile void **)WPDA0)
427#define bfin_read_WPDA0() bfin_read32(WPDA0)
428#define bfin_write_WPDA0(val) bfin_write32(WPDA0,val)
429#define pWPDA1 ((volatile void **)WPDA1)
430#define bfin_read_WPDA1() bfin_read32(WPDA1)
431#define bfin_write_WPDA1(val) bfin_write32(WPDA1,val)
432#define pWPDACNT0 ((volatile unsigned long *)WPDACNT0)
433#define bfin_read_WPDACNT0() bfin_read32(WPDACNT0)
434#define bfin_write_WPDACNT0(val) bfin_write32(WPDACNT0,val)
435#define pWPDACNT1 ((volatile unsigned long *)WPDACNT1)
436#define bfin_read_WPDACNT1() bfin_read32(WPDACNT1)
437#define bfin_write_WPDACNT1(val) bfin_write32(WPDACNT1,val)
438#define pWPSTAT ((volatile unsigned long *)WPSTAT)
439#define bfin_read_WPSTAT() bfin_read32(WPSTAT)
440#define bfin_write_WPSTAT(val) bfin_write32(WPSTAT,val)
441
442/*Performance Monitor Registers*/
443#define pPFCTL ((volatile unsigned long *)PFCTL)
444#define bfin_read_PFCTL() bfin_read32(PFCTL)
445#define bfin_write_PFCTL(val) bfin_write32(PFCTL,val)
446#define pPFCNTR0 ((volatile unsigned long *)PFCNTR0)
447#define bfin_read_PFCNTR0() bfin_read32(PFCNTR0)
448#define bfin_write_PFCNTR0(val) bfin_write32(PFCNTR0,val)
449#define pPFCNTR1 ((volatile unsigned long *)PFCNTR1)
450#define bfin_read_PFCNTR1() bfin_read32(PFCNTR1)
451#define bfin_write_PFCNTR1(val) bfin_write32(PFCNTR1,val)
452
453/*
454#define IPRIO 0xFFE02110
455*/
456
457#if defined(CONFIG_BFIN_ALIVE_LED)
458#define pCONFIG_BFIN_ALIVE_LED_DPORT \
459 (volatile unsigned short *)CONFIG_BFIN_ALIVE_LED_DPORT
460#define pCONFIG_BFIN_ALIVE_LED_PORT \
461 (volatile unsigned short *)CONFIG_BFIN_ALIVE_LED_PORT
462#endif
463
464#if defined(CONFIG_BFIN_IDLE_LED)
465#define pCONFIG_BFIN_IDLE_LED_DPORT \
466 (volatile unsigned short *)CONFIG_BFIN_IDLE_LED_DPORT
467#define pCONFIG_BFIN_IDLE_LED_PORT \
468 (volatile unsigned short *)CONFIG_BFIN_IDLE_LED_PORT
469#endif
470
471#endif /* _CDEF_LPBLACKFIN_H */