diff options
Diffstat (limited to 'include/asm-blackfin/mach-bf561/defBF561.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf561/defBF561.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h index 89150ecb909d..0f2dc6e6335b 100644 --- a/include/asm-blackfin/mach-bf561/defBF561.h +++ b/include/asm-blackfin/mach-bf561/defBF561.h | |||
| @@ -52,6 +52,10 @@ | |||
| 52 | #define PLL_LOCKCNT 0xFFC00010 /* PLL Lock Count register (16-bit) */ | 52 | #define PLL_LOCKCNT 0xFFC00010 /* PLL Lock Count register (16-bit) */ |
| 53 | #define CHIPID 0xFFC00014 /* Chip ID Register */ | 53 | #define CHIPID 0xFFC00014 /* Chip ID Register */ |
| 54 | 54 | ||
| 55 | /* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */ | ||
| 56 | #define SWRST SICA_SWRST | ||
| 57 | #define SYSCR SICA_SYSCR | ||
| 58 | |||
| 55 | /* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */ | 59 | /* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */ |
| 56 | #define SICA_SWRST 0xFFC00100 /* Software Reset register */ | 60 | #define SICA_SWRST 0xFFC00100 /* Software Reset register */ |
| 57 | #define SICA_SYSCR 0xFFC00104 /* System Reset Configuration register */ | 61 | #define SICA_SYSCR 0xFFC00104 /* System Reset Configuration register */ |