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-rw-r--r--include/asm-blackfin/mach-bf548/mem_init.h189
1 files changed, 189 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf548/mem_init.h b/include/asm-blackfin/mach-bf548/mem_init.h
new file mode 100644
index 000000000000..0cb279e973d7
--- /dev/null
+++ b/include/asm-blackfin/mach-bf548/mem_init.h
@@ -0,0 +1,189 @@
1/*
2 * File: include/asm-blackfin/mach-bf548/mem_init.h
3 * Based on:
4 * Author:
5 *
6 * Created:
7 * Description:
8 *
9 * Rev:
10 *
11 * Modified:
12 * Copyright 2004-2006 Analog Devices Inc.
13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; see the file COPYING.
28 * If not, write to the Free Software Foundation,
29 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30 */
31
32#if (CONFIG_MEM_MT46V32M16)
33
34#if defined CONFIG_CLKIN_HALF
35#define CLKIN_HALF 1
36#else
37#define CLKIN_HALF 0
38#endif
39
40#if defined CONFIG_PLL_BYPASS
41#define PLL_BYPASS 1
42#else
43#define PLL_BYPASS 0
44#endif
45
46/***************************************Currently Not Being Used *********************************/
47#define flash_EBIU_AMBCTL_WAT ((CONFIG_FLASH_SPEED_BWAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
48#define flash_EBIU_AMBCTL_RAT ((CONFIG_FLASH_SPEED_BRAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
49#define flash_EBIU_AMBCTL_HT ((CONFIG_FLASH_SPEED_BHT * 4) / (4000000000 / CONFIG_SCLK_HZ))
50#define flash_EBIU_AMBCTL_ST ((CONFIG_FLASH_SPEED_BST * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
51#define flash_EBIU_AMBCTL_TT ((CONFIG_FLASH_SPEED_BTT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
52
53#if (flash_EBIU_AMBCTL_TT > 3)
54#define flash_EBIU_AMBCTL0_TT B0TT_4
55#endif
56#if (flash_EBIU_AMBCTL_TT == 3)
57#define flash_EBIU_AMBCTL0_TT B0TT_3
58#endif
59#if (flash_EBIU_AMBCTL_TT == 2)
60#define flash_EBIU_AMBCTL0_TT B0TT_2
61#endif
62#if (flash_EBIU_AMBCTL_TT < 2)
63#define flash_EBIU_AMBCTL0_TT B0TT_1
64#endif
65
66#if (flash_EBIU_AMBCTL_ST > 3)
67#define flash_EBIU_AMBCTL0_ST B0ST_4
68#endif
69#if (flash_EBIU_AMBCTL_ST == 3)
70#define flash_EBIU_AMBCTL0_ST B0ST_3
71#endif
72#if (flash_EBIU_AMBCTL_ST == 2)
73#define flash_EBIU_AMBCTL0_ST B0ST_2
74#endif
75#if (flash_EBIU_AMBCTL_ST < 2)
76#define flash_EBIU_AMBCTL0_ST B0ST_1
77#endif
78
79#if (flash_EBIU_AMBCTL_HT > 2)
80#define flash_EBIU_AMBCTL0_HT B0HT_3
81#endif
82#if (flash_EBIU_AMBCTL_HT == 2)
83#define flash_EBIU_AMBCTL0_HT B0HT_2
84#endif
85#if (flash_EBIU_AMBCTL_HT == 1)
86#define flash_EBIU_AMBCTL0_HT B0HT_1
87#endif
88#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT == 0)
89#define flash_EBIU_AMBCTL0_HT B0HT_0
90#endif
91#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT != 0)
92#define flash_EBIU_AMBCTL0_HT B0HT_1
93#endif
94
95#if (flash_EBIU_AMBCTL_WAT > 14)
96#define flash_EBIU_AMBCTL0_WAT B0WAT_15
97#endif
98#if (flash_EBIU_AMBCTL_WAT == 14)
99#define flash_EBIU_AMBCTL0_WAT B0WAT_14
100#endif
101#if (flash_EBIU_AMBCTL_WAT == 13)
102#define flash_EBIU_AMBCTL0_WAT B0WAT_13
103#endif
104#if (flash_EBIU_AMBCTL_WAT == 12)
105#define flash_EBIU_AMBCTL0_WAT B0WAT_12
106#endif
107#if (flash_EBIU_AMBCTL_WAT == 11)
108#define flash_EBIU_AMBCTL0_WAT B0WAT_11
109#endif
110#if (flash_EBIU_AMBCTL_WAT == 10)
111#define flash_EBIU_AMBCTL0_WAT B0WAT_10
112#endif
113#if (flash_EBIU_AMBCTL_WAT == 9)
114#define flash_EBIU_AMBCTL0_WAT B0WAT_9
115#endif
116#if (flash_EBIU_AMBCTL_WAT == 8)
117#define flash_EBIU_AMBCTL0_WAT B0WAT_8
118#endif
119#if (flash_EBIU_AMBCTL_WAT == 7)
120#define flash_EBIU_AMBCTL0_WAT B0WAT_7
121#endif
122#if (flash_EBIU_AMBCTL_WAT == 6)
123#define flash_EBIU_AMBCTL0_WAT B0WAT_6
124#endif
125#if (flash_EBIU_AMBCTL_WAT == 5)
126#define flash_EBIU_AMBCTL0_WAT B0WAT_5
127#endif
128#if (flash_EBIU_AMBCTL_WAT == 4)
129#define flash_EBIU_AMBCTL0_WAT B0WAT_4
130#endif
131#if (flash_EBIU_AMBCTL_WAT == 3)
132#define flash_EBIU_AMBCTL0_WAT B0WAT_3
133#endif
134#if (flash_EBIU_AMBCTL_WAT == 2)
135#define flash_EBIU_AMBCTL0_WAT B0WAT_2
136#endif
137#if (flash_EBIU_AMBCTL_WAT == 1)
138#define flash_EBIU_AMBCTL0_WAT B0WAT_1
139#endif
140
141#if (flash_EBIU_AMBCTL_RAT > 14)
142#define flash_EBIU_AMBCTL0_RAT B0RAT_15
143#endif
144#if (flash_EBIU_AMBCTL_RAT == 14)
145#define flash_EBIU_AMBCTL0_RAT B0RAT_14
146#endif
147#if (flash_EBIU_AMBCTL_RAT == 13)
148#define flash_EBIU_AMBCTL0_RAT B0RAT_13
149#endif
150#if (flash_EBIU_AMBCTL_RAT == 12)
151#define flash_EBIU_AMBCTL0_RAT B0RAT_12
152#endif
153#if (flash_EBIU_AMBCTL_RAT == 11)
154#define flash_EBIU_AMBCTL0_RAT B0RAT_11
155#endif
156#if (flash_EBIU_AMBCTL_RAT == 10)
157#define flash_EBIU_AMBCTL0_RAT B0RAT_10
158#endif
159#if (flash_EBIU_AMBCTL_RAT == 9)
160#define flash_EBIU_AMBCTL0_RAT B0RAT_9
161#endif
162#if (flash_EBIU_AMBCTL_RAT == 8)
163#define flash_EBIU_AMBCTL0_RAT B0RAT_8
164#endif
165#if (flash_EBIU_AMBCTL_RAT == 7)
166#define flash_EBIU_AMBCTL0_RAT B0RAT_7
167#endif
168#if (flash_EBIU_AMBCTL_RAT == 6)
169#define flash_EBIU_AMBCTL0_RAT B0RAT_6
170#endif
171#if (flash_EBIU_AMBCTL_RAT == 5)
172#define flash_EBIU_AMBCTL0_RAT B0RAT_5
173#endif
174#if (flash_EBIU_AMBCTL_RAT == 4)
175#define flash_EBIU_AMBCTL0_RAT B0RAT_4
176#endif
177#if (flash_EBIU_AMBCTL_RAT == 3)
178#define flash_EBIU_AMBCTL0_RAT B0RAT_3
179#endif
180#if (flash_EBIU_AMBCTL_RAT == 2)
181#define flash_EBIU_AMBCTL0_RAT B0RAT_2
182#endif
183#if (flash_EBIU_AMBCTL_RAT == 1)
184#define flash_EBIU_AMBCTL0_RAT B0RAT_1
185#endif
186
187#define flash_EBIU_AMBCTL0 \
188 (flash_EBIU_AMBCTL0_WAT | flash_EBIU_AMBCTL0_RAT | flash_EBIU_AMBCTL0_HT | \
189 flash_EBIU_AMBCTL0_ST | flash_EBIU_AMBCTL0_TT | CONFIG_FLASH_SPEED_RDYEN)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-16 03:50:41 -0500