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Diffstat (limited to 'include/asm-blackfin/mach-bf548/mem_init.h')
-rw-r--r--include/asm-blackfin/mach-bf548/mem_init.h61
1 files changed, 60 insertions, 1 deletions
diff --git a/include/asm-blackfin/mach-bf548/mem_init.h b/include/asm-blackfin/mach-bf548/mem_init.h
index e792eb7ae6a0..befc2903d5a5 100644
--- a/include/asm-blackfin/mach-bf548/mem_init.h
+++ b/include/asm-blackfin/mach-bf548/mem_init.h
@@ -28,10 +28,69 @@
28 * If not, write to the Free Software Foundation, 28 * If not, write to the Free Software Foundation,
29 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 29 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30 */ 30 */
31#define MIN_DDR_SCLK(x) (x*(CONFIG_SCLK_HZ/1000/1000)/1000 + 1)
31 32
32#if (CONFIG_MEM_MT46V32M16) 33#if (CONFIG_MEM_MT46V32M16_6T)
34#define DDR_SIZE DEVSZ_512
35#define DDR_WIDTH DEVWD_16
36
37#define DDR_tRC DDR_TRC(MIN_DDR_SCLK(60))
38#define DDR_tRAS DDR_TRAS(MIN_DDR_SCLK(42))
39#define DDR_tRP DDR_TRP(MIN_DDR_SCLK(15))
40#define DDR_tRFC DDR_TRFC(MIN_DDR_SCLK(72))
41#define DDR_tREFI DDR_TREFI(MIN_DDR_SCLK(7800))
42
43#define DDR_tRCD DDR_TRCD(MIN_DDR_SCLK(15))
44#define DDR_tWTR DDR_TWTR(1)
45#define DDR_tMRD DDR_TMRD(MIN_DDR_SCLK(12))
46#define DDR_tWR DDR_TWR(MIN_DDR_SCLK(15))
47#endif
48
49#if (CONFIG_MEM_MT46V32M16_5B)
50#define DDR_SIZE DEVSZ_512
51#define DDR_WIDTH DEVWD_16
52
53#define DDR_tRC DDR_TRC(MIN_DDR_SCLK(55))
54#define DDR_tRAS DDR_TRAS(MIN_DDR_SCLK(40))
55#define DDR_tRP DDR_TRP(MIN_DDR_SCLK(15))
56#define DDR_tRFC DDR_TRFC(MIN_DDR_SCLK(70))
57#define DDR_tREFI DDR_TREFI(MIN_DDR_SCLK(7800))
58
59#define DDR_tRCD DDR_TRCD(MIN_DDR_SCLK(15))
60#define DDR_tWTR DDR_TWTR(2)
61#define DDR_tMRD DDR_TMRD(MIN_DDR_SCLK(10))
62#define DDR_tWR DDR_TWR(MIN_DDR_SCLK(15))
63#endif
64
65#if (CONFIG_MEM_GENERIC_BOARD)
66#define DDR_SIZE DEVSZ_512
67#define DDR_WIDTH DEVWD_16
68
69#define DDR_tRCD DDR_TRCD(3)
70#define DDR_tWTR DDR_TWTR(2)
71#define DDR_tWR DDR_TWR(2)
72#define DDR_tMRD DDR_TMRD(2)
73#define DDR_tRP DDR_TRP(3)
74#define DDR_tRAS DDR_TRAS(7)
75#define DDR_tRC DDR_TRC(10)
76#define DDR_tRFC DDR_TRFC(12)
77#define DDR_tREFI DDR_TREFI(1288)
33#endif 78#endif
34 79
80#if (CONFIG_SCLK_HZ <= 133333333)
81#define DDR_CL CL_2
82#elif (CONFIG_SCLK_HZ <= 166666666)
83#define DDR_CL CL_2_5
84#else
85#define DDR_CL CL_3
86#endif
87
88#define mem_DDRCTL0 (DDR_tRP | DDR_tRAS | DDR_tRC | DDR_tRFC | DDR_tREFI)
89#define mem_DDRCTL1 (DDR_DATWIDTH | EXTBANK_1 | DDR_SIZE | DDR_WIDTH | DDR_tWTR \
90 | DDR_tMRD | DDR_tWR | DDR_tRCD)
91#define mem_DDRCTL2 DDR_CL
92
93
35#if defined CONFIG_CLKIN_HALF 94#if defined CONFIG_CLKIN_HALF
36#define CLKIN_HALF 1 95#define CLKIN_HALF 1
37#else 96#else