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diff --git a/include/asm-blackfin/mach-bf548/cdefBF547.h b/include/asm-blackfin/mach-bf548/cdefBF547.h
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--- a/include/asm-blackfin/mach-bf548/cdefBF547.h
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@@ -1,832 +0,0 @@
1/*
2 * File: include/asm-blackfin/mach-bf548/cdefBF547.h
3 * Based on:
4 * Author:
5 *
6 * Created:
7 * Description:
8 *
9 * Rev:
10 *
11 * Modified:
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2, or (at your option)
18 * any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; see the file COPYING.
27 * If not, write to the Free Software Foundation,
28 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */
30
31#ifndef _CDEF_BF548_H
32#define _CDEF_BF548_H
33
34/* include all Core registers and bit definitions */
35#include "defBF548.h"
36
37/* include core sbfin_read_()ecific register pointer definitions */
38#include <asm/mach-common/cdef_LPBlackfin.h>
39
40/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF548 */
41
42/* include cdefBF54x_base.h for the set of #defines that are common to all ADSP-BF54x bfin_read_()rocessors */
43#include "cdefBF54x_base.h"
44
45/* The following are the #defines needed by ADSP-BF548 that are not in the common header */
46
47/* Timer Registers */
48
49#define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)
50#define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val)
51#define bfin_read_TIMER8_COUNTER() bfin_read32(TIMER8_COUNTER)
52#define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER, val)
53#define bfin_read_TIMER8_PERIOD() bfin_read32(TIMER8_PERIOD)
54#define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD, val)
55#define bfin_read_TIMER8_WIDTH() bfin_read32(TIMER8_WIDTH)
56#define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH, val)
57#define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)
58#define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val)
59#define bfin_read_TIMER9_COUNTER() bfin_read32(TIMER9_COUNTER)
60#define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER, val)
61#define bfin_read_TIMER9_PERIOD() bfin_read32(TIMER9_PERIOD)
62#define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD, val)
63#define bfin_read_TIMER9_WIDTH() bfin_read32(TIMER9_WIDTH)
64#define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH, val)
65#define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)
66#define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val)
67#define bfin_read_TIMER10_COUNTER() bfin_read32(TIMER10_COUNTER)
68#define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val)
69#define bfin_read_TIMER10_PERIOD() bfin_read32(TIMER10_PERIOD)
70#define bfin_write_TIMER10_PERIOD(val) bfin_write32(TIMER10_PERIOD, val)
71#define bfin_read_TIMER10_WIDTH() bfin_read32(TIMER10_WIDTH)
72#define bfin_write_TIMER10_WIDTH(val) bfin_write32(TIMER10_WIDTH, val)
73
74/* Timer Groubfin_read_() of 3 */
75
76#define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)
77#define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val)
78#define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)
79#define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val)
80#define bfin_read_TIMER_STATUS1() bfin_read32(TIMER_STATUS1)
81#define bfin_write_TIMER_STATUS1(val) bfin_write32(TIMER_STATUS1, val)
82
83/* SPORT0 Registers */
84
85#define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1)
86#define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val)
87#define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2)
88#define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val)
89#define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV)
90#define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val)
91#define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV)
92#define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val)
93#define bfin_read_SPORT0_TX() bfin_read32(SPORT0_TX)
94#define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val)
95#define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX)
96#define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val)
97#define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1)
98#define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1, val)
99#define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2)
100#define bfin_write_SPORT0_RCR2(val) bfin_write16(SPORT0_RCR2, val)
101#define bfin_read_SPORT0_RCLKDIV() bfin_read16(SPORT0_RCLKDIV)
102#define bfin_write_SPORT0_RCLKDIV(val) bfin_write16(SPORT0_RCLKDIV, val)
103#define bfin_read_SPORT0_RFSDIV() bfin_read16(SPORT0_RFSDIV)
104#define bfin_write_SPORT0_RFSDIV(val) bfin_write16(SPORT0_RFSDIV, val)
105#define bfin_read_SPORT0_STAT() bfin_read16(SPORT0_STAT)
106#define bfin_write_SPORT0_STAT(val) bfin_write16(SPORT0_STAT, val)
107#define bfin_read_SPORT0_CHNL() bfin_read16(SPORT0_CHNL)
108#define bfin_write_SPORT0_CHNL(val) bfin_write16(SPORT0_CHNL, val)
109#define bfin_read_SPORT0_MCMC1() bfin_read16(SPORT0_MCMC1)
110#define bfin_write_SPORT0_MCMC1(val) bfin_write16(SPORT0_MCMC1, val)
111#define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
112#define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val)
113#define bfin_read_SPORT0_MTCS0() bfin_read32(SPORT0_MTCS0)
114#define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0, val)
115#define bfin_read_SPORT0_MTCS1() bfin_read32(SPORT0_MTCS1)
116#define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1, val)
117#define bfin_read_SPORT0_MTCS2() bfin_read32(SPORT0_MTCS2)
118#define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2, val)
119#define bfin_read_SPORT0_MTCS3() bfin_read32(SPORT0_MTCS3)
120#define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3, val)
121#define bfin_read_SPORT0_MRCS0() bfin_read32(SPORT0_MRCS0)
122#define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0, val)
123#define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1)
124#define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
125#define bfin_read_SPORT0_MRCS2() bfin_read32(SPORT0_MRCS2)
126#define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2, val)
127#define bfin_read_SPORT0_MRCS3() bfin_read32(SPORT0_MRCS3)
128#define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3, val)
129
130/* EPPI0 Registers */
131
132#define bfin_read_EPPI0_STATUS() bfin_read16(EPPI0_STATUS)
133#define bfin_write_EPPI0_STATUS(val) bfin_write16(EPPI0_STATUS, val)
134#define bfin_read_EPPI0_HCOUNT() bfin_read16(EPPI0_HCOUNT)
135#define bfin_write_EPPI0_HCOUNT(val) bfin_write16(EPPI0_HCOUNT, val)
136#define bfin_read_EPPI0_HDELAY() bfin_read16(EPPI0_HDELAY)
137#define bfin_write_EPPI0_HDELAY(val) bfin_write16(EPPI0_HDELAY, val)
138#define bfin_read_EPPI0_VCOUNT() bfin_read16(EPPI0_VCOUNT)
139#define bfin_write_EPPI0_VCOUNT(val) bfin_write16(EPPI0_VCOUNT, val)
140#define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY)
141#define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val)
142#define bfin_read_EPPI0_FRAME() bfin_read16(EPPI0_FRAME)
143#define bfin_write_EPPI0_FRAME(val) bfin_write16(EPPI0_FRAME, val)
144#define bfin_read_EPPI0_LINE() bfin_read16(EPPI0_LINE)
145#define bfin_write_EPPI0_LINE(val) bfin_write16(EPPI0_LINE, val)
146#define bfin_read_EPPI0_CLKDIV() bfin_read16(EPPI0_CLKDIV)
147#define bfin_write_EPPI0_CLKDIV(val) bfin_write16(EPPI0_CLKDIV, val)
148#define bfin_read_EPPI0_CONTROL() bfin_read32(EPPI0_CONTROL)
149#define bfin_write_EPPI0_CONTROL(val) bfin_write32(EPPI0_CONTROL, val)
150#define bfin_read_EPPI0_FS1W_HBL() bfin_read32(EPPI0_FS1W_HBL)
151#define bfin_write_EPPI0_FS1W_HBL(val) bfin_write32(EPPI0_FS1W_HBL, val)
152#define bfin_read_EPPI0_FS1P_AVPL() bfin_read32(EPPI0_FS1P_AVPL)
153#define bfin_write_EPPI0_FS1P_AVPL(val) bfin_write32(EPPI0_FS1P_AVPL, val)
154#define bfin_read_EPPI0_FS2W_LVB() bfin_read32(EPPI0_FS2W_LVB)
155#define bfin_write_EPPI0_FS2W_LVB(val) bfin_write32(EPPI0_FS2W_LVB, val)
156#define bfin_read_EPPI0_FS2P_LAVF() bfin_read32(EPPI0_FS2P_LAVF)
157#define bfin_write_EPPI0_FS2P_LAVF(val) bfin_write32(EPPI0_FS2P_LAVF, val)
158#define bfin_read_EPPI0_CLIP() bfin_read32(EPPI0_CLIP)
159#define bfin_write_EPPI0_CLIP(val) bfin_write32(EPPI0_CLIP, val)
160
161/* UART2 Registers */
162
163#define bfin_read_UART2_DLL() bfin_read16(UART2_DLL)
164#define bfin_write_UART2_DLL(val) bfin_write16(UART2_DLL, val)
165#define bfin_read_UART2_DLH() bfin_read16(UART2_DLH)
166#define bfin_write_UART2_DLH(val) bfin_write16(UART2_DLH, val)
167#define bfin_read_UART2_GCTL() bfin_read16(UART2_GCTL)
168#define bfin_write_UART2_GCTL(val) bfin_write16(UART2_GCTL, val)
169#define bfin_read_UART2_LCR() bfin_read16(UART2_LCR)
170#define bfin_write_UART2_LCR(val) bfin_write16(UART2_LCR, val)
171#define bfin_read_UART2_MCR() bfin_read16(UART2_MCR)
172#define bfin_write_UART2_MCR(val) bfin_write16(UART2_MCR, val)
173#define bfin_read_UART2_LSR() bfin_read16(UART2_LSR)
174#define bfin_write_UART2_LSR(val) bfin_write16(UART2_LSR, val)
175#define bfin_read_UART2_MSR() bfin_read16(UART2_MSR)
176#define bfin_write_UART2_MSR(val) bfin_write16(UART2_MSR, val)
177#define bfin_read_UART2_SCR() bfin_read16(UART2_SCR)
178#define bfin_write_UART2_SCR(val) bfin_write16(UART2_SCR, val)
179#define bfin_read_UART2_IER_SET() bfin_read16(UART2_IER_SET)
180#define bfin_write_UART2_IER_SET(val) bfin_write16(UART2_IER_SET, val)
181#define bfin_read_UART2_IER_CLEAR() bfin_read16(UART2_IER_CLEAR)
182#define bfin_write_UART2_IER_CLEAR(val) bfin_write16(UART2_IER_CLEAR, val)
183#define bfin_read_UART2_RBR() bfin_read16(UART2_RBR)
184#define bfin_write_UART2_RBR(val) bfin_write16(UART2_RBR, val)
185
186/* Two Wire Interface Registers (TWI1) */
187
188/* SPI2 Registers */
189
190#define bfin_read_SPI2_CTL() bfin_read16(SPI2_CTL)
191#define bfin_write_SPI2_CTL(val) bfin_write16(SPI2_CTL, val)
192#define bfin_read_SPI2_FLG() bfin_read16(SPI2_FLG)
193#define bfin_write_SPI2_FLG(val) bfin_write16(SPI2_FLG, val)
194#define bfin_read_SPI2_STAT() bfin_read16(SPI2_STAT)
195#define bfin_write_SPI2_STAT(val) bfin_write16(SPI2_STAT, val)
196#define bfin_read_SPI2_TDBR() bfin_read16(SPI2_TDBR)
197#define bfin_write_SPI2_TDBR(val) bfin_write16(SPI2_TDBR, val)
198#define bfin_read_SPI2_RDBR() bfin_read16(SPI2_RDBR)
199#define bfin_write_SPI2_RDBR(val) bfin_write16(SPI2_RDBR, val)
200#define bfin_read_SPI2_BAUD() bfin_read16(SPI2_BAUD)
201#define bfin_write_SPI2_BAUD(val) bfin_write16(SPI2_BAUD, val)
202#define bfin_read_SPI2_SHADOW() bfin_read16(SPI2_SHADOW)
203#define bfin_write_SPI2_SHADOW(val) bfin_write16(SPI2_SHADOW, val)
204
205/* ATAPI Registers */
206
207#define bfin_read_ATAPI_CONTROL() bfin_read16(ATAPI_CONTROL)
208#define bfin_write_ATAPI_CONTROL(val) bfin_write16(ATAPI_CONTROL, val)
209#define bfin_read_ATAPI_STATUS() bfin_read16(ATAPI_STATUS)
210#define bfin_write_ATAPI_STATUS(val) bfin_write16(ATAPI_STATUS, val)
211#define bfin_read_ATAPI_DEV_ADDR() bfin_read16(ATAPI_DEV_ADDR)
212#define bfin_write_ATAPI_DEV_ADDR(val) bfin_write16(ATAPI_DEV_ADDR, val)
213#define bfin_read_ATAPI_DEV_TXBUF() bfin_read16(ATAPI_DEV_TXBUF)
214#define bfin_write_ATAPI_DEV_TXBUF(val) bfin_write16(ATAPI_DEV_TXBUF, val)
215#define bfin_read_ATAPI_DEV_RXBUF() bfin_read16(ATAPI_DEV_RXBUF)
216#define bfin_write_ATAPI_DEV_RXBUF(val) bfin_write16(ATAPI_DEV_RXBUF, val)
217#define bfin_read_ATAPI_INT_MASK() bfin_read16(ATAPI_INT_MASK)
218#define bfin_write_ATAPI_INT_MASK(val) bfin_write16(ATAPI_INT_MASK, val)
219#define bfin_read_ATAPI_INT_STATUS() bfin_read16(ATAPI_INT_STATUS)
220#define bfin_write_ATAPI_INT_STATUS(val) bfin_write16(ATAPI_INT_STATUS, val)
221#define bfin_read_ATAPI_XFER_LEN() bfin_read16(ATAPI_XFER_LEN)
222#define bfin_write_ATAPI_XFER_LEN(val) bfin_write16(ATAPI_XFER_LEN, val)
223#define bfin_read_ATAPI_LINE_STATUS() bfin_read16(ATAPI_LINE_STATUS)
224#define bfin_write_ATAPI_LINE_STATUS(val) bfin_write16(ATAPI_LINE_STATUS, val)
225#define bfin_read_ATAPI_SM_STATE() bfin_read16(ATAPI_SM_STATE)
226#define bfin_write_ATAPI_SM_STATE(val) bfin_write16(ATAPI_SM_STATE, val)
227#define bfin_read_ATAPI_TERMINATE() bfin_read16(ATAPI_TERMINATE)
228#define bfin_write_ATAPI_TERMINATE(val) bfin_write16(ATAPI_TERMINATE, val)
229#define bfin_read_ATAPI_PIO_TFRCNT() bfin_read16(ATAPI_PIO_TFRCNT)
230#define bfin_write_ATAPI_PIO_TFRCNT(val) bfin_write16(ATAPI_PIO_TFRCNT, val)
231#define bfin_read_ATAPI_DMA_TFRCNT() bfin_read16(ATAPI_DMA_TFRCNT)
232#define bfin_write_ATAPI_DMA_TFRCNT(val) bfin_write16(ATAPI_DMA_TFRCNT, val)
233#define bfin_read_ATAPI_UMAIN_TFRCNT() bfin_read16(ATAPI_UMAIN_TFRCNT)
234#define bfin_write_ATAPI_UMAIN_TFRCNT(val) bfin_write16(ATAPI_UMAIN_TFRCNT, val)
235#define bfin_read_ATAPI_UDMAOUT_TFRCNT() bfin_read16(ATAPI_UDMAOUT_TFRCNT)
236#define bfin_write_ATAPI_UDMAOUT_TFRCNT(val) bfin_write16(ATAPI_UDMAOUT_TFRCNT, val)
237#define bfin_read_ATAPI_REG_TIM_0() bfin_read16(ATAPI_REG_TIM_0)
238#define bfin_write_ATAPI_REG_TIM_0(val) bfin_write16(ATAPI_REG_TIM_0, val)
239#define bfin_read_ATAPI_PIO_TIM_0() bfin_read16(ATAPI_PIO_TIM_0)
240#define bfin_write_ATAPI_PIO_TIM_0(val) bfin_write16(ATAPI_PIO_TIM_0, val)
241#define bfin_read_ATAPI_PIO_TIM_1() bfin_read16(ATAPI_PIO_TIM_1)
242#define bfin_write_ATAPI_PIO_TIM_1(val) bfin_write16(ATAPI_PIO_TIM_1, val)
243#define bfin_read_ATAPI_MULTI_TIM_0() bfin_read16(ATAPI_MULTI_TIM_0)
244#define bfin_write_ATAPI_MULTI_TIM_0(val) bfin_write16(ATAPI_MULTI_TIM_0, val)
245#define bfin_read_ATAPI_MULTI_TIM_1() bfin_read16(ATAPI_MULTI_TIM_1)
246#define bfin_write_ATAPI_MULTI_TIM_1(val) bfin_write16(ATAPI_MULTI_TIM_1, val)
247#define bfin_read_ATAPI_MULTI_TIM_2() bfin_read16(ATAPI_MULTI_TIM_2)
248#define bfin_write_ATAPI_MULTI_TIM_2(val) bfin_write16(ATAPI_MULTI_TIM_2, val)
249#define bfin_read_ATAPI_ULTRA_TIM_0() bfin_read16(ATAPI_ULTRA_TIM_0)
250#define bfin_write_ATAPI_ULTRA_TIM_0(val) bfin_write16(ATAPI_ULTRA_TIM_0, val)
251#define bfin_read_ATAPI_ULTRA_TIM_1() bfin_read16(ATAPI_ULTRA_TIM_1)
252#define bfin_write_ATAPI_ULTRA_TIM_1(val) bfin_write16(ATAPI_ULTRA_TIM_1, val)
253#define bfin_read_ATAPI_ULTRA_TIM_2() bfin_read16(ATAPI_ULTRA_TIM_2)
254#define bfin_write_ATAPI_ULTRA_TIM_2(val) bfin_write16(ATAPI_ULTRA_TIM_2, val)
255#define bfin_read_ATAPI_ULTRA_TIM_3() bfin_read16(ATAPI_ULTRA_TIM_3)
256#define bfin_write_ATAPI_ULTRA_TIM_3(val) bfin_write16(ATAPI_ULTRA_TIM_3, val)
257
258/* SDH Registers */
259
260#define bfin_read_SDH_PWR_CTL() bfin_read16(SDH_PWR_CTL)
261#define bfin_write_SDH_PWR_CTL(val) bfin_write16(SDH_PWR_CTL, val)
262#define bfin_read_SDH_CLK_CTL() bfin_read16(SDH_CLK_CTL)
263#define bfin_write_SDH_CLK_CTL(val) bfin_write16(SDH_CLK_CTL, val)
264#define bfin_read_SDH_ARGUMENT() bfin_read32(SDH_ARGUMENT)
265#define bfin_write_SDH_ARGUMENT(val) bfin_write32(SDH_ARGUMENT, val)
266#define bfin_read_SDH_COMMAND() bfin_read16(SDH_COMMAND)
267#define bfin_write_SDH_COMMAND(val) bfin_write16(SDH_COMMAND, val)
268#define bfin_read_SDH_RESP_CMD() bfin_read16(SDH_RESP_CMD)
269#define bfin_write_SDH_RESP_CMD(val) bfin_write16(SDH_RESP_CMD, val)
270#define bfin_read_SDH_RESPONSE0() bfin_read32(SDH_RESPONSE0)
271#define bfin_write_SDH_RESPONSE0(val) bfin_write32(SDH_RESPONSE0, val)
272#define bfin_read_SDH_RESPONSE1() bfin_read32(SDH_RESPONSE1)
273#define bfin_write_SDH_RESPONSE1(val) bfin_write32(SDH_RESPONSE1, val)
274#define bfin_read_SDH_RESPONSE2() bfin_read32(SDH_RESPONSE2)
275#define bfin_write_SDH_RESPONSE2(val) bfin_write32(SDH_RESPONSE2, val)
276#define bfin_read_SDH_RESPONSE3() bfin_read32(SDH_RESPONSE3)
277#define bfin_write_SDH_RESPONSE3(val) bfin_write32(SDH_RESPONSE3, val)
278#define bfin_read_SDH_DATA_TIMER() bfin_read32(SDH_DATA_TIMER)
279#define bfin_write_SDH_DATA_TIMER(val) bfin_write32(SDH_DATA_TIMER, val)
280#define bfin_read_SDH_DATA_LGTH() bfin_read16(SDH_DATA_LGTH)
281#define bfin_write_SDH_DATA_LGTH(val) bfin_write16(SDH_DATA_LGTH, val)
282#define bfin_read_SDH_DATA_CTL() bfin_read16(SDH_DATA_CTL)
283#define bfin_write_SDH_DATA_CTL(val) bfin_write16(SDH_DATA_CTL, val)
284#define bfin_read_SDH_DATA_CNT() bfin_read16(SDH_DATA_CNT)
285#define bfin_write_SDH_DATA_CNT(val) bfin_write16(SDH_DATA_CNT, val)
286#define bfin_read_SDH_STATUS() bfin_read32(SDH_STATUS)
287#define bfin_write_SDH_STATUS(val) bfin_write32(SDH_STATUS, val)
288#define bfin_read_SDH_STATUS_CLR() bfin_read16(SDH_STATUS_CLR)
289#define bfin_write_SDH_STATUS_CLR(val) bfin_write16(SDH_STATUS_CLR, val)
290#define bfin_read_SDH_MASK0() bfin_read32(SDH_MASK0)
291#define bfin_write_SDH_MASK0(val) bfin_write32(SDH_MASK0, val)
292#define bfin_read_SDH_MASK1() bfin_read32(SDH_MASK1)
293#define bfin_write_SDH_MASK1(val) bfin_write32(SDH_MASK1, val)
294#define bfin_read_SDH_FIFO_CNT() bfin_read16(SDH_FIFO_CNT)
295#define bfin_write_SDH_FIFO_CNT(val) bfin_write16(SDH_FIFO_CNT, val)
296#define bfin_read_SDH_FIFO() bfin_read32(SDH_FIFO)
297#define bfin_write_SDH_FIFO(val) bfin_write32(SDH_FIFO, val)
298#define bfin_read_SDH_E_STATUS() bfin_read16(SDH_E_STATUS)
299#define bfin_write_SDH_E_STATUS(val) bfin_write16(SDH_E_STATUS, val)
300#define bfin_read_SDH_E_MASK() bfin_read16(SDH_E_MASK)
301#define bfin_write_SDH_E_MASK(val) bfin_write16(SDH_E_MASK, val)
302#define bfin_read_SDH_CFG() bfin_read16(SDH_CFG)
303#define bfin_write_SDH_CFG(val) bfin_write16(SDH_CFG, val)
304#define bfin_read_SDH_RD_WAIT_EN() bfin_read16(SDH_RD_WAIT_EN)
305#define bfin_write_SDH_RD_WAIT_EN(val) bfin_write16(SDH_RD_WAIT_EN, val)
306#define bfin_read_SDH_PID0() bfin_read16(SDH_PID0)
307#define bfin_write_SDH_PID0(val) bfin_write16(SDH_PID0, val)
308#define bfin_read_SDH_PID1() bfin_read16(SDH_PID1)
309#define bfin_write_SDH_PID1(val) bfin_write16(SDH_PID1, val)
310#define bfin_read_SDH_PID2() bfin_read16(SDH_PID2)
311#define bfin_write_SDH_PID2(val) bfin_write16(SDH_PID2, val)
312#define bfin_read_SDH_PID3() bfin_read16(SDH_PID3)
313#define bfin_write_SDH_PID3(val) bfin_write16(SDH_PID3, val)
314#define bfin_read_SDH_PID4() bfin_read16(SDH_PID4)
315#define bfin_write_SDH_PID4(val) bfin_write16(SDH_PID4, val)
316#define bfin_read_SDH_PID5() bfin_read16(SDH_PID5)
317#define bfin_write_SDH_PID5(val) bfin_write16(SDH_PID5, val)
318#define bfin_read_SDH_PID6() bfin_read16(SDH_PID6)
319#define bfin_write_SDH_PID6(val) bfin_write16(SDH_PID6, val)
320#define bfin_read_SDH_PID7() bfin_read16(SDH_PID7)
321#define bfin_write_SDH_PID7(val) bfin_write16(SDH_PID7, val)
322
323/* HOST Port Registers */
324
325#define bfin_read_HOST_CONTROL() bfin_read16(HOST_CONTROL)
326#define bfin_write_HOST_CONTROL(val) bfin_write16(HOST_CONTROL, val)
327#define bfin_read_HOST_STATUS() bfin_read16(HOST_STATUS)
328#define bfin_write_HOST_STATUS(val) bfin_write16(HOST_STATUS, val)
329#define bfin_read_HOST_TIMEOUT() bfin_read16(HOST_TIMEOUT)
330#define bfin_write_HOST_TIMEOUT(val) bfin_write16(HOST_TIMEOUT, val)
331
332/* USB Control Registers */
333
334#define bfin_read_USB_FADDR() bfin_read16(USB_FADDR)
335#define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val)
336#define bfin_read_USB_POWER() bfin_read16(USB_POWER)
337#define bfin_write_USB_POWER(val) bfin_write16(USB_POWER, val)
338#define bfin_read_USB_INTRTX() bfin_read16(USB_INTRTX)
339#define bfin_write_USB_INTRTX(val) bfin_write16(USB_INTRTX, val)
340#define bfin_read_USB_INTRRX() bfin_read16(USB_INTRRX)
341#define bfin_write_USB_INTRRX(val) bfin_write16(USB_INTRRX, val)
342#define bfin_read_USB_INTRTXE() bfin_read16(USB_INTRTXE)
343#define bfin_write_USB_INTRTXE(val) bfin_write16(USB_INTRTXE, val)
344#define bfin_read_USB_INTRRXE() bfin_read16(USB_INTRRXE)
345#define bfin_write_USB_INTRRXE(val) bfin_write16(USB_INTRRXE, val)
346#define bfin_read_USB_INTRUSB() bfin_read16(USB_INTRUSB)
347#define bfin_write_USB_INTRUSB(val) bfin_write16(USB_INTRUSB, val)
348#define bfin_read_USB_INTRUSBE() bfin_read16(USB_INTRUSBE)
349#define bfin_write_USB_INTRUSBE(val) bfin_write16(USB_INTRUSBE, val)
350#define bfin_read_USB_FRAME() bfin_read16(USB_FRAME)
351#define bfin_write_USB_FRAME(val) bfin_write16(USB_FRAME, val)
352#define bfin_read_USB_INDEX() bfin_read16(USB_INDEX)
353#define bfin_write_USB_INDEX(val) bfin_write16(USB_INDEX, val)
354#define bfin_read_USB_TESTMODE() bfin_read16(USB_TESTMODE)
355#define bfin_write_USB_TESTMODE(val) bfin_write16(USB_TESTMODE, val)
356#define bfin_read_USB_GLOBINTR() bfin_read16(USB_GLOBINTR)
357#define bfin_write_USB_GLOBINTR(val) bfin_write16(USB_GLOBINTR, val)
358#define bfin_read_USB_GLOBAL_CTL() bfin_read16(USB_GLOBAL_CTL)
359#define bfin_write_USB_GLOBAL_CTL(val) bfin_write16(USB_GLOBAL_CTL, val)
360
361/* USB Packet Control Registers */
362
363#define bfin_read_USB_TX_MAX_PACKET() bfin_read16(USB_TX_MAX_PACKET)
364#define bfin_write_USB_TX_MAX_PACKET(val) bfin_write16(USB_TX_MAX_PACKET, val)
365#define bfin_read_USB_CSR0() bfin_read16(USB_CSR0)
366#define bfin_write_USB_CSR0(val) bfin_write16(USB_CSR0, val)
367#define bfin_read_USB_TXCSR() bfin_read16(USB_TXCSR)
368#define bfin_write_USB_TXCSR(val) bfin_write16(USB_TXCSR, val)
369#define bfin_read_USB_RX_MAX_PACKET() bfin_read16(USB_RX_MAX_PACKET)
370#define bfin_write_USB_RX_MAX_PACKET(val) bfin_write16(USB_RX_MAX_PACKET, val)
371#define bfin_read_USB_RXCSR() bfin_read16(USB_RXCSR)
372#define bfin_write_USB_RXCSR(val) bfin_write16(USB_RXCSR, val)
373#define bfin_read_USB_COUNT0() bfin_read16(USB_COUNT0)
374#define bfin_write_USB_COUNT0(val) bfin_write16(USB_COUNT0, val)
375#define bfin_read_USB_RXCOUNT() bfin_read16(USB_RXCOUNT)
376#define bfin_write_USB_RXCOUNT(val) bfin_write16(USB_RXCOUNT, val)
377#define bfin_read_USB_TXTYPE() bfin_read16(USB_TXTYPE)
378#define bfin_write_USB_TXTYPE(val) bfin_write16(USB_TXTYPE, val)
379#define bfin_read_USB_NAKLIMIT0() bfin_read16(USB_NAKLIMIT0)
380#define bfin_write_USB_NAKLIMIT0(val) bfin_write16(USB_NAKLIMIT0, val)
381#define bfin_read_USB_TXINTERVAL() bfin_read16(USB_TXINTERVAL)
382#define bfin_write_USB_TXINTERVAL(val) bfin_write16(USB_TXINTERVAL, val)
383#define bfin_read_USB_RXTYPE() bfin_read16(USB_RXTYPE)
384#define bfin_write_USB_RXTYPE(val) bfin_write16(USB_RXTYPE, val)
385#define bfin_read_USB_RXINTERVAL() bfin_read16(USB_RXINTERVAL)
386#define bfin_write_USB_RXINTERVAL(val) bfin_write16(USB_RXINTERVAL, val)
387#define bfin_read_USB_TXCOUNT() bfin_read16(USB_TXCOUNT)
388#define bfin_write_USB_TXCOUNT(val) bfin_write16(USB_TXCOUNT, val)
389
390/* USB Endbfin_read_()oint FIFO Registers */
391
392#define bfin_read_USB_EP0_FIFO() bfin_read16(USB_EP0_FIFO)
393#define bfin_write_USB_EP0_FIFO(val) bfin_write16(USB_EP0_FIFO, val)
394#define bfin_read_USB_EP1_FIFO() bfin_read16(USB_EP1_FIFO)
395#define bfin_write_USB_EP1_FIFO(val) bfin_write16(USB_EP1_FIFO, val)
396#define bfin_read_USB_EP2_FIFO() bfin_read16(USB_EP2_FIFO)
397#define bfin_write_USB_EP2_FIFO(val) bfin_write16(USB_EP2_FIFO, val)
398#define bfin_read_USB_EP3_FIFO() bfin_read16(USB_EP3_FIFO)
399#define bfin_write_USB_EP3_FIFO(val) bfin_write16(USB_EP3_FIFO, val)
400#define bfin_read_USB_EP4_FIFO() bfin_read16(USB_EP4_FIFO)
401#define bfin_write_USB_EP4_FIFO(val) bfin_write16(USB_EP4_FIFO, val)
402#define bfin_read_USB_EP5_FIFO() bfin_read16(USB_EP5_FIFO)
403#define bfin_write_USB_EP5_FIFO(val) bfin_write16(USB_EP5_FIFO, val)
404#define bfin_read_USB_EP6_FIFO() bfin_read16(USB_EP6_FIFO)
405#define bfin_write_USB_EP6_FIFO(val) bfin_write16(USB_EP6_FIFO, val)
406#define bfin_read_USB_EP7_FIFO() bfin_read16(USB_EP7_FIFO)
407#define bfin_write_USB_EP7_FIFO(val) bfin_write16(USB_EP7_FIFO, val)
408
409/* USB OTG Control Registers */
410
411#define bfin_read_USB_OTG_DEV_CTL() bfin_read16(USB_OTG_DEV_CTL)
412#define bfin_write_USB_OTG_DEV_CTL(val) bfin_write16(USB_OTG_DEV_CTL, val)
413#define bfin_read_USB_OTG_VBUS_IRQ() bfin_read16(USB_OTG_VBUS_IRQ)
414#define bfin_write_USB_OTG_VBUS_IRQ(val) bfin_write16(USB_OTG_VBUS_IRQ, val)
415#define bfin_read_USB_OTG_VBUS_MASK() bfin_read16(USB_OTG_VBUS_MASK)
416#define bfin_write_USB_OTG_VBUS_MASK(val) bfin_write16(USB_OTG_VBUS_MASK, val)
417
418/* USB Phy Control Registers */
419
420#define bfin_read_USB_LINKINFO() bfin_read16(USB_LINKINFO)
421#define bfin_write_USB_LINKINFO(val) bfin_write16(USB_LINKINFO, val)
422#define bfin_read_USB_VPLEN() bfin_read16(USB_VPLEN)
423#define bfin_write_USB_VPLEN(val) bfin_write16(USB_VPLEN, val)
424#define bfin_read_USB_HS_EOF1() bfin_read16(USB_HS_EOF1)
425#define bfin_write_USB_HS_EOF1(val) bfin_write16(USB_HS_EOF1, val)
426#define bfin_read_USB_FS_EOF1() bfin_read16(USB_FS_EOF1)
427#define bfin_write_USB_FS_EOF1(val) bfin_write16(USB_FS_EOF1, val)
428#define bfin_read_USB_LS_EOF1() bfin_read16(USB_LS_EOF1)
429#define bfin_write_USB_LS_EOF1(val) bfin_write16(USB_LS_EOF1, val)
430
431/* (APHY_CNTRL is for ADI usage only) */
432
433#define bfin_read_USB_APHY_CNTRL() bfin_read16(USB_APHY_CNTRL)
434#define bfin_write_USB_APHY_CNTRL(val) bfin_write16(USB_APHY_CNTRL, val)
435
436/* (APHY_CALIB is for ADI usage only) */
437
438#define bfin_read_USB_APHY_CALIB() bfin_read16(USB_APHY_CALIB)
439#define bfin_write_USB_APHY_CALIB(val) bfin_write16(USB_APHY_CALIB, val)
440#define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2)
441#define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val)
442
443/* (PHY_TEST is for ADI usage only) */
444
445#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST)
446#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val)
447#define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL)
448#define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val)
449#define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
450#define bfin_write_USB_SRP_CLKDIV(val) bfin_write16(USB_SRP_CLKDIV, val)
451
452/* USB Endbfin_read_()oint 0 Control Registers */
453
454#define bfin_read_USB_EP_NI0_TXMAXP() bfin_read16(USB_EP_NI0_TXMAXP)
455#define bfin_write_USB_EP_NI0_TXMAXP(val) bfin_write16(USB_EP_NI0_TXMAXP, val)
456#define bfin_read_USB_EP_NI0_TXCSR() bfin_read16(USB_EP_NI0_TXCSR)
457#define bfin_write_USB_EP_NI0_TXCSR(val) bfin_write16(USB_EP_NI0_TXCSR, val)
458#define bfin_read_USB_EP_NI0_RXMAXP() bfin_read16(USB_EP_NI0_RXMAXP)
459#define bfin_write_USB_EP_NI0_RXMAXP(val) bfin_write16(USB_EP_NI0_RXMAXP, val)
460#define bfin_read_USB_EP_NI0_RXCSR() bfin_read16(USB_EP_NI0_RXCSR)
461#define bfin_write_USB_EP_NI0_RXCSR(val) bfin_write16(USB_EP_NI0_RXCSR, val)
462#define bfin_read_USB_EP_NI0_RXCOUNT() bfin_read16(USB_EP_NI0_RXCOUNT)
463#define bfin_write_USB_EP_NI0_RXCOUNT(val) bfin_write16(USB_EP_NI0_RXCOUNT, val)
464#define bfin_read_USB_EP_NI0_TXTYPE() bfin_read16(USB_EP_NI0_TXTYPE)
465#define bfin_write_USB_EP_NI0_TXTYPE(val) bfin_write16(USB_EP_NI0_TXTYPE, val)
466#define bfin_read_USB_EP_NI0_TXINTERVAL() bfin_read16(USB_EP_NI0_TXINTERVAL)
467#define bfin_write_USB_EP_NI0_TXINTERVAL(val) bfin_write16(USB_EP_NI0_TXINTERVAL, val)
468#define bfin_read_USB_EP_NI0_RXTYPE() bfin_read16(USB_EP_NI0_RXTYPE)
469#define bfin_write_USB_EP_NI0_RXTYPE(val) bfin_write16(USB_EP_NI0_RXTYPE, val)
470#define bfin_read_USB_EP_NI0_RXINTERVAL() bfin_read16(USB_EP_NI0_RXINTERVAL)
471#define bfin_write_USB_EP_NI0_RXINTERVAL(val) bfin_write16(USB_EP_NI0_RXINTERVAL, val)
472
473/* USB Endbfin_read_()oint 1 Control Registers */
474
475#define bfin_read_USB_EP_NI0_TXCOUNT() bfin_read16(USB_EP_NI0_TXCOUNT)
476#define bfin_write_USB_EP_NI0_TXCOUNT(val) bfin_write16(USB_EP_NI0_TXCOUNT, val)
477#define bfin_read_USB_EP_NI1_TXMAXP() bfin_read16(USB_EP_NI1_TXMAXP)
478#define bfin_write_USB_EP_NI1_TXMAXP(val) bfin_write16(USB_EP_NI1_TXMAXP, val)
479#define bfin_read_USB_EP_NI1_TXCSR() bfin_read16(USB_EP_NI1_TXCSR)
480#define bfin_write_USB_EP_NI1_TXCSR(val) bfin_write16(USB_EP_NI1_TXCSR, val)
481#define bfin_read_USB_EP_NI1_RXMAXP() bfin_read16(USB_EP_NI1_RXMAXP)
482#define bfin_write_USB_EP_NI1_RXMAXP(val) bfin_write16(USB_EP_NI1_RXMAXP, val)
483#define bfin_read_USB_EP_NI1_RXCSR() bfin_read16(USB_EP_NI1_RXCSR)
484#define bfin_write_USB_EP_NI1_RXCSR(val) bfin_write16(USB_EP_NI1_RXCSR, val)
485#define bfin_read_USB_EP_NI1_RXCOUNT() bfin_read16(USB_EP_NI1_RXCOUNT)
486#define bfin_write_USB_EP_NI1_RXCOUNT(val) bfin_write16(USB_EP_NI1_RXCOUNT, val)
487#define bfin_read_USB_EP_NI1_TXTYPE() bfin_read16(USB_EP_NI1_TXTYPE)
488#define bfin_write_USB_EP_NI1_TXTYPE(val) bfin_write16(USB_EP_NI1_TXTYPE, val)
489#define bfin_read_USB_EP_NI1_TXINTERVAL() bfin_read16(USB_EP_NI1_TXINTERVAL)
490#define bfin_write_USB_EP_NI1_TXINTERVAL(val) bfin_write16(USB_EP_NI1_TXINTERVAL, val)
491#define bfin_read_USB_EP_NI1_RXTYPE() bfin_read16(USB_EP_NI1_RXTYPE)
492#define bfin_write_USB_EP_NI1_RXTYPE(val) bfin_write16(USB_EP_NI1_RXTYPE, val)
493#define bfin_read_USB_EP_NI1_RXINTERVAL() bfin_read16(USB_EP_NI1_RXINTERVAL)
494#define bfin_write_USB_EP_NI1_RXINTERVAL(val) bfin_write16(USB_EP_NI1_RXINTERVAL, val)
495
496/* USB Endbfin_read_()oint 2 Control Registers */
497
498#define bfin_read_USB_EP_NI1_TXCOUNT() bfin_read16(USB_EP_NI1_TXCOUNT)
499#define bfin_write_USB_EP_NI1_TXCOUNT(val) bfin_write16(USB_EP_NI1_TXCOUNT, val)
500#define bfin_read_USB_EP_NI2_TXMAXP() bfin_read16(USB_EP_NI2_TXMAXP)
501#define bfin_write_USB_EP_NI2_TXMAXP(val) bfin_write16(USB_EP_NI2_TXMAXP, val)
502#define bfin_read_USB_EP_NI2_TXCSR() bfin_read16(USB_EP_NI2_TXCSR)
503#define bfin_write_USB_EP_NI2_TXCSR(val) bfin_write16(USB_EP_NI2_TXCSR, val)
504#define bfin_read_USB_EP_NI2_RXMAXP() bfin_read16(USB_EP_NI2_RXMAXP)
505#define bfin_write_USB_EP_NI2_RXMAXP(val) bfin_write16(USB_EP_NI2_RXMAXP, val)
506#define bfin_read_USB_EP_NI2_RXCSR() bfin_read16(USB_EP_NI2_RXCSR)
507#define bfin_write_USB_EP_NI2_RXCSR(val) bfin_write16(USB_EP_NI2_RXCSR, val)
508#define bfin_read_USB_EP_NI2_RXCOUNT() bfin_read16(USB_EP_NI2_RXCOUNT)
509#define bfin_write_USB_EP_NI2_RXCOUNT(val) bfin_write16(USB_EP_NI2_RXCOUNT, val)
510#define bfin_read_USB_EP_NI2_TXTYPE() bfin_read16(USB_EP_NI2_TXTYPE)
511#define bfin_write_USB_EP_NI2_TXTYPE(val) bfin_write16(USB_EP_NI2_TXTYPE, val)
512#define bfin_read_USB_EP_NI2_TXINTERVAL() bfin_read16(USB_EP_NI2_TXINTERVAL)
513#define bfin_write_USB_EP_NI2_TXINTERVAL(val) bfin_write16(USB_EP_NI2_TXINTERVAL, val)
514#define bfin_read_USB_EP_NI2_RXTYPE() bfin_read16(USB_EP_NI2_RXTYPE)
515#define bfin_write_USB_EP_NI2_RXTYPE(val) bfin_write16(USB_EP_NI2_RXTYPE, val)
516#define bfin_read_USB_EP_NI2_RXINTERVAL() bfin_read16(USB_EP_NI2_RXINTERVAL)
517#define bfin_write_USB_EP_NI2_RXINTERVAL(val) bfin_write16(USB_EP_NI2_RXINTERVAL, val)
518
519/* USB Endbfin_read_()oint 3 Control Registers */
520
521#define bfin_read_USB_EP_NI2_TXCOUNT() bfin_read16(USB_EP_NI2_TXCOUNT)
522#define bfin_write_USB_EP_NI2_TXCOUNT(val) bfin_write16(USB_EP_NI2_TXCOUNT, val)
523#define bfin_read_USB_EP_NI3_TXMAXP() bfin_read16(USB_EP_NI3_TXMAXP)
524#define bfin_write_USB_EP_NI3_TXMAXP(val) bfin_write16(USB_EP_NI3_TXMAXP, val)
525#define bfin_read_USB_EP_NI3_TXCSR() bfin_read16(USB_EP_NI3_TXCSR)
526#define bfin_write_USB_EP_NI3_TXCSR(val) bfin_write16(USB_EP_NI3_TXCSR, val)
527#define bfin_read_USB_EP_NI3_RXMAXP() bfin_read16(USB_EP_NI3_RXMAXP)
528#define bfin_write_USB_EP_NI3_RXMAXP(val) bfin_write16(USB_EP_NI3_RXMAXP, val)
529#define bfin_read_USB_EP_NI3_RXCSR() bfin_read16(USB_EP_NI3_RXCSR)
530#define bfin_write_USB_EP_NI3_RXCSR(val) bfin_write16(USB_EP_NI3_RXCSR, val)
531#define bfin_read_USB_EP_NI3_RXCOUNT() bfin_read16(USB_EP_NI3_RXCOUNT)
532#define bfin_write_USB_EP_NI3_RXCOUNT(val) bfin_write16(USB_EP_NI3_RXCOUNT, val)
533#define bfin_read_USB_EP_NI3_TXTYPE() bfin_read16(USB_EP_NI3_TXTYPE)
534#define bfin_write_USB_EP_NI3_TXTYPE(val) bfin_write16(USB_EP_NI3_TXTYPE, val)
535#define bfin_read_USB_EP_NI3_TXINTERVAL() bfin_read16(USB_EP_NI3_TXINTERVAL)
536#define bfin_write_USB_EP_NI3_TXINTERVAL(val) bfin_write16(USB_EP_NI3_TXINTERVAL, val)
537#define bfin_read_USB_EP_NI3_RXTYPE() bfin_read16(USB_EP_NI3_RXTYPE)
538#define bfin_write_USB_EP_NI3_RXTYPE(val) bfin_write16(USB_EP_NI3_RXTYPE, val)
539#define bfin_read_USB_EP_NI3_RXINTERVAL() bfin_read16(USB_EP_NI3_RXINTERVAL)
540#define bfin_write_USB_EP_NI3_RXINTERVAL(val) bfin_write16(USB_EP_NI3_RXINTERVAL, val)
541
542/* USB Endbfin_read_()oint 4 Control Registers */
543
544#define bfin_read_USB_EP_NI3_TXCOUNT() bfin_read16(USB_EP_NI3_TXCOUNT)
545#define bfin_write_USB_EP_NI3_TXCOUNT(val) bfin_write16(USB_EP_NI3_TXCOUNT, val)
546#define bfin_read_USB_EP_NI4_TXMAXP() bfin_read16(USB_EP_NI4_TXMAXP)
547#define bfin_write_USB_EP_NI4_TXMAXP(val) bfin_write16(USB_EP_NI4_TXMAXP, val)
548#define bfin_read_USB_EP_NI4_TXCSR() bfin_read16(USB_EP_NI4_TXCSR)
549#define bfin_write_USB_EP_NI4_TXCSR(val) bfin_write16(USB_EP_NI4_TXCSR, val)
550#define bfin_read_USB_EP_NI4_RXMAXP() bfin_read16(USB_EP_NI4_RXMAXP)
551#define bfin_write_USB_EP_NI4_RXMAXP(val) bfin_write16(USB_EP_NI4_RXMAXP, val)
552#define bfin_read_USB_EP_NI4_RXCSR() bfin_read16(USB_EP_NI4_RXCSR)
553#define bfin_write_USB_EP_NI4_RXCSR(val) bfin_write16(USB_EP_NI4_RXCSR, val)
554#define bfin_read_USB_EP_NI4_RXCOUNT() bfin_read16(USB_EP_NI4_RXCOUNT)
555#define bfin_write_USB_EP_NI4_RXCOUNT(val) bfin_write16(USB_EP_NI4_RXCOUNT, val)
556#define bfin_read_USB_EP_NI4_TXTYPE() bfin_read16(USB_EP_NI4_TXTYPE)
557#define bfin_write_USB_EP_NI4_TXTYPE(val) bfin_write16(USB_EP_NI4_TXTYPE, val)
558#define bfin_read_USB_EP_NI4_TXINTERVAL() bfin_read16(USB_EP_NI4_TXINTERVAL)
559#define bfin_write_USB_EP_NI4_TXINTERVAL(val) bfin_write16(USB_EP_NI4_TXINTERVAL, val)
560#define bfin_read_USB_EP_NI4_RXTYPE() bfin_read16(USB_EP_NI4_RXTYPE)
561#define bfin_write_USB_EP_NI4_RXTYPE(val) bfin_write16(USB_EP_NI4_RXTYPE, val)
562#define bfin_read_USB_EP_NI4_RXINTERVAL() bfin_read16(USB_EP_NI4_RXINTERVAL)
563#define bfin_write_USB_EP_NI4_RXINTERVAL(val) bfin_write16(USB_EP_NI4_RXINTERVAL, val)
564
565/* USB Endbfin_read_()oint 5 Control Registers */
566
567#define bfin_read_USB_EP_NI4_TXCOUNT() bfin_read16(USB_EP_NI4_TXCOUNT)
568#define bfin_write_USB_EP_NI4_TXCOUNT(val) bfin_write16(USB_EP_NI4_TXCOUNT, val)
569#define bfin_read_USB_EP_NI5_TXMAXP() bfin_read16(USB_EP_NI5_TXMAXP)
570#define bfin_write_USB_EP_NI5_TXMAXP(val) bfin_write16(USB_EP_NI5_TXMAXP, val)
571#define bfin_read_USB_EP_NI5_TXCSR() bfin_read16(USB_EP_NI5_TXCSR)
572#define bfin_write_USB_EP_NI5_TXCSR(val) bfin_write16(USB_EP_NI5_TXCSR, val)
573#define bfin_read_USB_EP_NI5_RXMAXP() bfin_read16(USB_EP_NI5_RXMAXP)
574#define bfin_write_USB_EP_NI5_RXMAXP(val) bfin_write16(USB_EP_NI5_RXMAXP, val)
575#define bfin_read_USB_EP_NI5_RXCSR() bfin_read16(USB_EP_NI5_RXCSR)
576#define bfin_write_USB_EP_NI5_RXCSR(val) bfin_write16(USB_EP_NI5_RXCSR, val)
577#define bfin_read_USB_EP_NI5_RXCOUNT() bfin_read16(USB_EP_NI5_RXCOUNT)
578#define bfin_write_USB_EP_NI5_RXCOUNT(val) bfin_write16(USB_EP_NI5_RXCOUNT, val)
579#define bfin_read_USB_EP_NI5_TXTYPE() bfin_read16(USB_EP_NI5_TXTYPE)
580#define bfin_write_USB_EP_NI5_TXTYPE(val) bfin_write16(USB_EP_NI5_TXTYPE, val)
581#define bfin_read_USB_EP_NI5_TXINTERVAL() bfin_read16(USB_EP_NI5_TXINTERVAL)
582#define bfin_write_USB_EP_NI5_TXINTERVAL(val) bfin_write16(USB_EP_NI5_TXINTERVAL, val)
583#define bfin_read_USB_EP_NI5_RXTYPE() bfin_read16(USB_EP_NI5_RXTYPE)
584#define bfin_write_USB_EP_NI5_RXTYPE(val) bfin_write16(USB_EP_NI5_RXTYPE, val)
585#define bfin_read_USB_EP_NI5_RXINTERVAL() bfin_read16(USB_EP_NI5_RXINTERVAL)
586#define bfin_write_USB_EP_NI5_RXINTERVAL(val) bfin_write16(USB_EP_NI5_RXINTERVAL, val)
587
588/* USB Endbfin_read_()oint 6 Control Registers */
589
590#define bfin_read_USB_EP_NI5_TXCOUNT() bfin_read16(USB_EP_NI5_TXCOUNT)
591#define bfin_write_USB_EP_NI5_TXCOUNT(val) bfin_write16(USB_EP_NI5_TXCOUNT, val)
592#define bfin_read_USB_EP_NI6_TXMAXP() bfin_read16(USB_EP_NI6_TXMAXP)
593#define bfin_write_USB_EP_NI6_TXMAXP(val) bfin_write16(USB_EP_NI6_TXMAXP, val)
594#define bfin_read_USB_EP_NI6_TXCSR() bfin_read16(USB_EP_NI6_TXCSR)
595#define bfin_write_USB_EP_NI6_TXCSR(val) bfin_write16(USB_EP_NI6_TXCSR, val)
596#define bfin_read_USB_EP_NI6_RXMAXP() bfin_read16(USB_EP_NI6_RXMAXP)
597#define bfin_write_USB_EP_NI6_RXMAXP(val) bfin_write16(USB_EP_NI6_RXMAXP, val)
598#define bfin_read_USB_EP_NI6_RXCSR() bfin_read16(USB_EP_NI6_RXCSR)
599#define bfin_write_USB_EP_NI6_RXCSR(val) bfin_write16(USB_EP_NI6_RXCSR, val)
600#define bfin_read_USB_EP_NI6_RXCOUNT() bfin_read16(USB_EP_NI6_RXCOUNT)
601#define bfin_write_USB_EP_NI6_RXCOUNT(val) bfin_write16(USB_EP_NI6_RXCOUNT, val)
602#define bfin_read_USB_EP_NI6_TXTYPE() bfin_read16(USB_EP_NI6_TXTYPE)
603#define bfin_write_USB_EP_NI6_TXTYPE(val) bfin_write16(USB_EP_NI6_TXTYPE, val)
604#define bfin_read_USB_EP_NI6_TXINTERVAL() bfin_read16(USB_EP_NI6_TXINTERVAL)
605#define bfin_write_USB_EP_NI6_TXINTERVAL(val) bfin_write16(USB_EP_NI6_TXINTERVAL, val)
606#define bfin_read_USB_EP_NI6_RXTYPE() bfin_read16(USB_EP_NI6_RXTYPE)
607#define bfin_write_USB_EP_NI6_RXTYPE(val) bfin_write16(USB_EP_NI6_RXTYPE, val)
608#define bfin_read_USB_EP_NI6_RXINTERVAL() bfin_read16(USB_EP_NI6_RXINTERVAL)
609#define bfin_write_USB_EP_NI6_RXINTERVAL(val) bfin_write16(USB_EP_NI6_RXINTERVAL, val)
610
611/* USB Endbfin_read_()oint 7 Control Registers */
612
613#define bfin_read_USB_EP_NI6_TXCOUNT() bfin_read16(USB_EP_NI6_TXCOUNT)
614#define bfin_write_USB_EP_NI6_TXCOUNT(val) bfin_write16(USB_EP_NI6_TXCOUNT, val)
615#define bfin_read_USB_EP_NI7_TXMAXP() bfin_read16(USB_EP_NI7_TXMAXP)
616#define bfin_write_USB_EP_NI7_TXMAXP(val) bfin_write16(USB_EP_NI7_TXMAXP, val)
617#define bfin_read_USB_EP_NI7_TXCSR() bfin_read16(USB_EP_NI7_TXCSR)
618#define bfin_write_USB_EP_NI7_TXCSR(val) bfin_write16(USB_EP_NI7_TXCSR, val)
619#define bfin_read_USB_EP_NI7_RXMAXP() bfin_read16(USB_EP_NI7_RXMAXP)
620#define bfin_write_USB_EP_NI7_RXMAXP(val) bfin_write16(USB_EP_NI7_RXMAXP, val)
621#define bfin_read_USB_EP_NI7_RXCSR() bfin_read16(USB_EP_NI7_RXCSR)
622#define bfin_write_USB_EP_NI7_RXCSR(val) bfin_write16(USB_EP_NI7_RXCSR, val)
623#define bfin_read_USB_EP_NI7_RXCOUNT() bfin_read16(USB_EP_NI7_RXCOUNT)
624#define bfin_write_USB_EP_NI7_RXCOUNT(val) bfin_write16(USB_EP_NI7_RXCOUNT, val)
625#define bfin_read_USB_EP_NI7_TXTYPE() bfin_read16(USB_EP_NI7_TXTYPE)
626#define bfin_write_USB_EP_NI7_TXTYPE(val) bfin_write16(USB_EP_NI7_TXTYPE, val)
627#define bfin_read_USB_EP_NI7_TXINTERVAL() bfin_read16(USB_EP_NI7_TXINTERVAL)
628#define bfin_write_USB_EP_NI7_TXINTERVAL(val) bfin_write16(USB_EP_NI7_TXINTERVAL, val)
629#define bfin_read_USB_EP_NI7_RXTYPE() bfin_read16(USB_EP_NI7_RXTYPE)
630#define bfin_write_USB_EP_NI7_RXTYPE(val) bfin_write16(USB_EP_NI7_RXTYPE, val)
631#define bfin_read_USB_EP_NI7_RXINTERVAL() bfin_read16(USB_EP_NI7_RXINTERVAL)
632#define bfin_write_USB_EP_NI7_RXINTERVAL(val) bfin_write16(USB_EP_NI7_RXINTERVAL, val)
633#define bfin_read_USB_EP_NI7_TXCOUNT() bfin_read16(USB_EP_NI7_TXCOUNT)
634#define bfin_write_USB_EP_NI7_TXCOUNT(val) bfin_write16(USB_EP_NI7_TXCOUNT, val)
635#define bfin_read_USB_DMA_INTERRUPT() bfin_read16(USB_DMA_INTERRUPT)
636#define bfin_write_USB_DMA_INTERRUPT(val) bfin_write16(USB_DMA_INTERRUPT, val)
637
638/* USB Channel 0 Config Registers */
639
640#define bfin_read_USB_DMA0CONTROL() bfin_read16(USB_DMA0CONTROL)
641#define bfin_write_USB_DMA0CONTROL(val) bfin_write16(USB_DMA0CONTROL, val)
642#define bfin_read_USB_DMA0ADDRLOW() bfin_read16(USB_DMA0ADDRLOW)
643#define bfin_write_USB_DMA0ADDRLOW(val) bfin_write16(USB_DMA0ADDRLOW, val)
644#define bfin_read_USB_DMA0ADDRHIGH() bfin_read16(USB_DMA0ADDRHIGH)
645#define bfin_write_USB_DMA0ADDRHIGH(val) bfin_write16(USB_DMA0ADDRHIGH, val)
646#define bfin_read_USB_DMA0COUNTLOW() bfin_read16(USB_DMA0COUNTLOW)
647#define bfin_write_USB_DMA0COUNTLOW(val) bfin_write16(USB_DMA0COUNTLOW, val)
648#define bfin_read_USB_DMA0COUNTHIGH() bfin_read16(USB_DMA0COUNTHIGH)
649#define bfin_write_USB_DMA0COUNTHIGH(val) bfin_write16(USB_DMA0COUNTHIGH, val)
650
651/* USB Channel 1 Config Registers */
652
653#define bfin_read_USB_DMA1CONTROL() bfin_read16(USB_DMA1CONTROL)
654#define bfin_write_USB_DMA1CONTROL(val) bfin_write16(USB_DMA1CONTROL, val)
655#define bfin_read_USB_DMA1ADDRLOW() bfin_read16(USB_DMA1ADDRLOW)
656#define bfin_write_USB_DMA1ADDRLOW(val) bfin_write16(USB_DMA1ADDRLOW, val)
657#define bfin_read_USB_DMA1ADDRHIGH() bfin_read16(USB_DMA1ADDRHIGH)
658#define bfin_write_USB_DMA1ADDRHIGH(val) bfin_write16(USB_DMA1ADDRHIGH, val)
659#define bfin_read_USB_DMA1COUNTLOW() bfin_read16(USB_DMA1COUNTLOW)
660#define bfin_write_USB_DMA1COUNTLOW(val) bfin_write16(USB_DMA1COUNTLOW, val)
661#define bfin_read_USB_DMA1COUNTHIGH() bfin_read16(USB_DMA1COUNTHIGH)
662#define bfin_write_USB_DMA1COUNTHIGH(val) bfin_write16(USB_DMA1COUNTHIGH, val)
663
664/* USB Channel 2 Config Registers */
665
666#define bfin_read_USB_DMA2CONTROL() bfin_read16(USB_DMA2CONTROL)
667#define bfin_write_USB_DMA2CONTROL(val) bfin_write16(USB_DMA2CONTROL, val)
668#define bfin_read_USB_DMA2ADDRLOW() bfin_read16(USB_DMA2ADDRLOW)
669#define bfin_write_USB_DMA2ADDRLOW(val) bfin_write16(USB_DMA2ADDRLOW, val)
670#define bfin_read_USB_DMA2ADDRHIGH() bfin_read16(USB_DMA2ADDRHIGH)
671#define bfin_write_USB_DMA2ADDRHIGH(val) bfin_write16(USB_DMA2ADDRHIGH, val)
672#define bfin_read_USB_DMA2COUNTLOW() bfin_read16(USB_DMA2COUNTLOW)
673#define bfin_write_USB_DMA2COUNTLOW(val) bfin_write16(USB_DMA2COUNTLOW, val)
674#define bfin_read_USB_DMA2COUNTHIGH() bfin_read16(USB_DMA2COUNTHIGH)
675#define bfin_write_USB_DMA2COUNTHIGH(val) bfin_write16(USB_DMA2COUNTHIGH, val)
676
677/* USB Channel 3 Config Registers */
678
679#define bfin_read_USB_DMA3CONTROL() bfin_read16(USB_DMA3CONTROL)
680#define bfin_write_USB_DMA3CONTROL(val) bfin_write16(USB_DMA3CONTROL, val)
681#define bfin_read_USB_DMA3ADDRLOW() bfin_read16(USB_DMA3ADDRLOW)
682#define bfin_write_USB_DMA3ADDRLOW(val) bfin_write16(USB_DMA3ADDRLOW, val)
683#define bfin_read_USB_DMA3ADDRHIGH() bfin_read16(USB_DMA3ADDRHIGH)
684#define bfin_write_USB_DMA3ADDRHIGH(val) bfin_write16(USB_DMA3ADDRHIGH, val)
685#define bfin_read_USB_DMA3COUNTLOW() bfin_read16(USB_DMA3COUNTLOW)
686#define bfin_write_USB_DMA3COUNTLOW(val) bfin_write16(USB_DMA3COUNTLOW, val)
687#define bfin_read_USB_DMA3COUNTHIGH() bfin_read16(USB_DMA3COUNTHIGH)
688#define bfin_write_USB_DMA3COUNTHIGH(val) bfin_write16(USB_DMA3COUNTHIGH, val)
689
690/* USB Channel 4 Config Registers */
691
692#define bfin_read_USB_DMA4CONTROL() bfin_read16(USB_DMA4CONTROL)
693#define bfin_write_USB_DMA4CONTROL(val) bfin_write16(USB_DMA4CONTROL, val)
694#define bfin_read_USB_DMA4ADDRLOW() bfin_read16(USB_DMA4ADDRLOW)
695#define bfin_write_USB_DMA4ADDRLOW(val) bfin_write16(USB_DMA4ADDRLOW, val)
696#define bfin_read_USB_DMA4ADDRHIGH() bfin_read16(USB_DMA4ADDRHIGH)
697#define bfin_write_USB_DMA4ADDRHIGH(val) bfin_write16(USB_DMA4ADDRHIGH, val)
698#define bfin_read_USB_DMA4COUNTLOW() bfin_read16(USB_DMA4COUNTLOW)
699#define bfin_write_USB_DMA4COUNTLOW(val) bfin_write16(USB_DMA4COUNTLOW, val)
700#define bfin_read_USB_DMA4COUNTHIGH() bfin_read16(USB_DMA4COUNTHIGH)
701#define bfin_write_USB_DMA4COUNTHIGH(val) bfin_write16(USB_DMA4COUNTHIGH, val)
702
703/* USB Channel 5 Config Registers */
704
705#define bfin_read_USB_DMA5CONTROL() bfin_read16(USB_DMA5CONTROL)
706#define bfin_write_USB_DMA5CONTROL(val) bfin_write16(USB_DMA5CONTROL, val)
707#define bfin_read_USB_DMA5ADDRLOW() bfin_read16(USB_DMA5ADDRLOW)
708#define bfin_write_USB_DMA5ADDRLOW(val) bfin_write16(USB_DMA5ADDRLOW, val)
709#define bfin_read_USB_DMA5ADDRHIGH() bfin_read16(USB_DMA5ADDRHIGH)
710#define bfin_write_USB_DMA5ADDRHIGH(val) bfin_write16(USB_DMA5ADDRHIGH, val)
711#define bfin_read_USB_DMA5COUNTLOW() bfin_read16(USB_DMA5COUNTLOW)
712#define bfin_write_USB_DMA5COUNTLOW(val) bfin_write16(USB_DMA5COUNTLOW, val)
713#define bfin_read_USB_DMA5COUNTHIGH() bfin_read16(USB_DMA5COUNTHIGH)
714#define bfin_write_USB_DMA5COUNTHIGH(val) bfin_write16(USB_DMA5COUNTHIGH, val)
715
716/* USB Channel 6 Config Registers */
717
718#define bfin_read_USB_DMA6CONTROL() bfin_read16(USB_DMA6CONTROL)
719#define bfin_write_USB_DMA6CONTROL(val) bfin_write16(USB_DMA6CONTROL, val)
720#define bfin_read_USB_DMA6ADDRLOW() bfin_read16(USB_DMA6ADDRLOW)
721#define bfin_write_USB_DMA6ADDRLOW(val) bfin_write16(USB_DMA6ADDRLOW, val)
722#define bfin_read_USB_DMA6ADDRHIGH() bfin_read16(USB_DMA6ADDRHIGH)
723#define bfin_write_USB_DMA6ADDRHIGH(val) bfin_write16(USB_DMA6ADDRHIGH, val)
724#define bfin_read_USB_DMA6COUNTLOW() bfin_read16(USB_DMA6COUNTLOW)
725#define bfin_write_USB_DMA6COUNTLOW(val) bfin_write16(USB_DMA6COUNTLOW, val)
726#define bfin_read_USB_DMA6COUNTHIGH() bfin_read16(USB_DMA6COUNTHIGH)
727#define bfin_write_USB_DMA6COUNTHIGH(val) bfin_write16(USB_DMA6COUNTHIGH, val)
728
729/* USB Channel 7 Config Registers */
730
731#define bfin_read_USB_DMA7CONTROL() bfin_read16(USB_DMA7CONTROL)
732#define bfin_write_USB_DMA7CONTROL(val) bfin_write16(USB_DMA7CONTROL, val)
733#define bfin_read_USB_DMA7ADDRLOW() bfin_read16(USB_DMA7ADDRLOW)
734#define bfin_write_USB_DMA7ADDRLOW(val) bfin_write16(USB_DMA7ADDRLOW, val)
735#define bfin_read_USB_DMA7ADDRHIGH() bfin_read16(USB_DMA7ADDRHIGH)
736#define bfin_write_USB_DMA7ADDRHIGH(val) bfin_write16(USB_DMA7ADDRHIGH, val)
737#define bfin_read_USB_DMA7COUNTLOW() bfin_read16(USB_DMA7COUNTLOW)
738#define bfin_write_USB_DMA7COUNTLOW(val) bfin_write16(USB_DMA7COUNTLOW, val)
739#define bfin_read_USB_DMA7COUNTHIGH() bfin_read16(USB_DMA7COUNTHIGH)
740#define bfin_write_USB_DMA7COUNTHIGH(val) bfin_write16(USB_DMA7COUNTHIGH, val)
741
742/* Keybfin_read_()ad Registers */
743
744#define bfin_read_KPAD_CTL() bfin_read16(KPAD_CTL)
745#define bfin_write_KPAD_CTL(val) bfin_write16(KPAD_CTL, val)
746#define bfin_read_KPAD_PRESCALE() bfin_read16(KPAD_PRESCALE)
747#define bfin_write_KPAD_PRESCALE(val) bfin_write16(KPAD_PRESCALE, val)
748#define bfin_read_KPAD_MSEL() bfin_read16(KPAD_MSEL)
749#define bfin_write_KPAD_MSEL(val) bfin_write16(KPAD_MSEL, val)
750#define bfin_read_KPAD_ROWCOL() bfin_read16(KPAD_ROWCOL)
751#define bfin_write_KPAD_ROWCOL(val) bfin_write16(KPAD_ROWCOL, val)
752#define bfin_read_KPAD_STAT() bfin_read16(KPAD_STAT)
753#define bfin_write_KPAD_STAT(val) bfin_write16(KPAD_STAT, val)
754#define bfin_read_KPAD_SOFTEVAL() bfin_read16(KPAD_SOFTEVAL)
755#define bfin_write_KPAD_SOFTEVAL(val) bfin_write16(KPAD_SOFTEVAL, val)
756
757/* Pixel Combfin_read_()ositor (PIXC) Registers */
758
759#define bfin_read_PIXC_CTL() bfin_read16(PIXC_CTL)
760#define bfin_write_PIXC_CTL(val) bfin_write16(PIXC_CTL, val)
761#define bfin_read_PIXC_PPL() bfin_read16(PIXC_PPL)
762#define bfin_write_PIXC_PPL(val) bfin_write16(PIXC_PPL, val)
763#define bfin_read_PIXC_LPF() bfin_read16(PIXC_LPF)
764#define bfin_write_PIXC_LPF(val) bfin_write16(PIXC_LPF, val)
765#define bfin_read_PIXC_AHSTART() bfin_read16(PIXC_AHSTART)
766#define bfin_write_PIXC_AHSTART(val) bfin_write16(PIXC_AHSTART, val)
767#define bfin_read_PIXC_AHEND() bfin_read16(PIXC_AHEND)
768#define bfin_write_PIXC_AHEND(val) bfin_write16(PIXC_AHEND, val)
769#define bfin_read_PIXC_AVSTART() bfin_read16(PIXC_AVSTART)
770#define bfin_write_PIXC_AVSTART(val) bfin_write16(PIXC_AVSTART, val)
771#define bfin_read_PIXC_AVEND() bfin_read16(PIXC_AVEND)
772#define bfin_write_PIXC_AVEND(val) bfin_write16(PIXC_AVEND, val)
773#define bfin_read_PIXC_ATRANSP() bfin_read16(PIXC_ATRANSP)
774#define bfin_write_PIXC_ATRANSP(val) bfin_write16(PIXC_ATRANSP, val)
775#define bfin_read_PIXC_BHSTART() bfin_read16(PIXC_BHSTART)
776#define bfin_write_PIXC_BHSTART(val) bfin_write16(PIXC_BHSTART, val)
777#define bfin_read_PIXC_BHEND() bfin_read16(PIXC_BHEND)
778#define bfin_write_PIXC_BHEND(val) bfin_write16(PIXC_BHEND, val)
779#define bfin_read_PIXC_BVSTART() bfin_read16(PIXC_BVSTART)
780#define bfin_write_PIXC_BVSTART(val) bfin_write16(PIXC_BVSTART, val)
781#define bfin_read_PIXC_BVEND() bfin_read16(PIXC_BVEND)
782#define bfin_write_PIXC_BVEND(val) bfin_write16(PIXC_BVEND, val)
783#define bfin_read_PIXC_BTRANSP() bfin_read16(PIXC_BTRANSP)
784#define bfin_write_PIXC_BTRANSP(val) bfin_write16(PIXC_BTRANSP, val)
785#define bfin_read_PIXC_INTRSTAT() bfin_read16(PIXC_INTRSTAT)
786#define bfin_write_PIXC_INTRSTAT(val) bfin_write16(PIXC_INTRSTAT, val)
787#define bfin_read_PIXC_RYCON() bfin_read32(PIXC_RYCON)
788#define bfin_write_PIXC_RYCON(val) bfin_write32(PIXC_RYCON, val)
789#define bfin_read_PIXC_GUCON() bfin_read32(PIXC_GUCON)
790#define bfin_write_PIXC_GUCON(val) bfin_write32(PIXC_GUCON, val)
791#define bfin_read_PIXC_BVCON() bfin_read32(PIXC_BVCON)
792#define bfin_write_PIXC_BVCON(val) bfin_write32(PIXC_BVCON, val)
793#define bfin_read_PIXC_CCBIAS() bfin_read32(PIXC_CCBIAS)
794#define bfin_write_PIXC_CCBIAS(val) bfin_write32(PIXC_CCBIAS, val)
795#define bfin_read_PIXC_TC() bfin_read32(PIXC_TC)
796#define bfin_write_PIXC_TC(val) bfin_write32(PIXC_TC, val)
797
798/* Handshake MDMA 0 Registers */
799
800#define bfin_read_HMDMA0_CONTROL() bfin_read16(HMDMA0_CONTROL)
801#define bfin_write_HMDMA0_CONTROL(val) bfin_write16(HMDMA0_CONTROL, val)
802#define bfin_read_HMDMA0_ECINIT() bfin_read16(HMDMA0_ECINIT)
803#define bfin_write_HMDMA0_ECINIT(val) bfin_write16(HMDMA0_ECINIT, val)
804#define bfin_read_HMDMA0_BCINIT() bfin_read16(HMDMA0_BCINIT)
805#define bfin_write_HMDMA0_BCINIT(val) bfin_write16(HMDMA0_BCINIT, val)
806#define bfin_read_HMDMA0_ECURGENT() bfin_read16(HMDMA0_ECURGENT)
807#define bfin_write_HMDMA0_ECURGENT(val) bfin_write16(HMDMA0_ECURGENT, val)
808#define bfin_read_HMDMA0_ECOVERFLOW() bfin_read16(HMDMA0_ECOVERFLOW)
809#define bfin_write_HMDMA0_ECOVERFLOW(val) bfin_write16(HMDMA0_ECOVERFLOW, val)
810#define bfin_read_HMDMA0_ECOUNT() bfin_read16(HMDMA0_ECOUNT)
811#define bfin_write_HMDMA0_ECOUNT(val) bfin_write16(HMDMA0_ECOUNT, val)
812#define bfin_read_HMDMA0_BCOUNT() bfin_read16(HMDMA0_BCOUNT)
813#define bfin_write_HMDMA0_BCOUNT(val) bfin_write16(HMDMA0_BCOUNT, val)
814
815/* Handshake MDMA 1 Registers */
816
817#define bfin_read_HMDMA1_CONTROL() bfin_read16(HMDMA1_CONTROL)
818#define bfin_write_HMDMA1_CONTROL(val) bfin_write16(HMDMA1_CONTROL, val)
819#define bfin_read_HMDMA1_ECINIT() bfin_read16(HMDMA1_ECINIT)
820#define bfin_write_HMDMA1_ECINIT(val) bfin_write16(HMDMA1_ECINIT, val)
821#define bfin_read_HMDMA1_BCINIT() bfin_read16(HMDMA1_BCINIT)
822#define bfin_write_HMDMA1_BCINIT(val) bfin_write16(HMDMA1_BCINIT, val)
823#define bfin_read_HMDMA1_ECURGENT() bfin_read16(HMDMA1_ECURGENT)
824#define bfin_write_HMDMA1_ECURGENT(val) bfin_write16(HMDMA1_ECURGENT, val)
825#define bfin_read_HMDMA1_ECOVERFLOW() bfin_read16(HMDMA1_ECOVERFLOW)
826#define bfin_write_HMDMA1_ECOVERFLOW(val) bfin_write16(HMDMA1_ECOVERFLOW, val)
827#define bfin_read_HMDMA1_ECOUNT() bfin_read16(HMDMA1_ECOUNT)
828#define bfin_write_HMDMA1_ECOUNT(val) bfin_write16(HMDMA1_ECOUNT, val)
829#define bfin_read_HMDMA1_BCOUNT() bfin_read16(HMDMA1_BCOUNT)
830#define bfin_write_HMDMA1_BCOUNT(val) bfin_write16(HMDMA1_BCOUNT, val)
831
832#endif /* _CDEF_BF548_H */
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