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Diffstat (limited to 'include/asm-blackfin/mach-bf548/bfin_serial_5xx.h')
-rw-r--r--include/asm-blackfin/mach-bf548/bfin_serial_5xx.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 3770aa38ee9f..7e6339f62a50 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -24,6 +24,8 @@
24#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 24#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR)) 25#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
26#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) 26#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
27#define UART_GET_MSR(uart) bfin_read16(((uart)->port.membase + OFFSET_MSR))
28#define UART_GET_MCR(uart) bfin_read16(((uart)->port.membase + OFFSET_MCR))
27 29
28#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) 30#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
29#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) 31#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
@@ -32,7 +34,9 @@
32#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) 34#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
33#define UART_PUT_LSR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LSR),v) 35#define UART_PUT_LSR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LSR),v)
34#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) 36#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
37#define UART_CLEAR_LSR(uart) bfin_write16(((uart)->port.membase + OFFSET_LSR), -1)
35#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) 38#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
39#define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v)
36 40
37#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) 41#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
38# define CONFIG_SERIAL_BFIN_CTSRTS 42# define CONFIG_SERIAL_BFIN_CTSRTS
@@ -68,10 +72,9 @@ struct bfin_serial_port {
68 unsigned int tx_dma_channel; 72 unsigned int tx_dma_channel;
69 unsigned int rx_dma_channel; 73 unsigned int rx_dma_channel;
70 struct work_struct tx_dma_workqueue; 74 struct work_struct tx_dma_workqueue;
71#else
72 struct work_struct cts_workqueue;
73#endif 75#endif
74#ifdef CONFIG_SERIAL_BFIN_CTSRTS 76#ifdef CONFIG_SERIAL_BFIN_CTSRTS
77 struct work_struct cts_workqueue;
75 int cts_pin; 78 int cts_pin;
76 int rts_pin; 79 int rts_pin;
77#endif 80#endif