diff options
Diffstat (limited to 'include/asm-blackfin/mach-bf548/bf548.h')
-rw-r--r-- | include/asm-blackfin/mach-bf548/bf548.h | 87 |
1 files changed, 0 insertions, 87 deletions
diff --git a/include/asm-blackfin/mach-bf548/bf548.h b/include/asm-blackfin/mach-bf548/bf548.h index 9498313a2cb7..50306a846628 100644 --- a/include/asm-blackfin/mach-bf548/bf548.h +++ b/include/asm-blackfin/mach-bf548/bf548.h | |||
@@ -106,93 +106,6 @@ | |||
106 | 106 | ||
107 | #define AMGCTLVAL (V_AMBEN | V_AMCKEN) | 107 | #define AMGCTLVAL (V_AMBEN | V_AMCKEN) |
108 | 108 | ||
109 | #define MAX_VC 650000000 | ||
110 | #define MIN_VC 50000000 | ||
111 | |||
112 | /********************************PLL Settings **************************************/ | ||
113 | #ifdef CONFIG_BFIN_KERNEL_CLOCK | ||
114 | #if (CONFIG_VCO_MULT < 0) | ||
115 | #error "VCO Multiplier is less than 0. Please select a different value" | ||
116 | #endif | ||
117 | |||
118 | #if (CONFIG_VCO_MULT == 0) | ||
119 | #error "VCO Multiplier should be greater than 0. Please select a different value" | ||
120 | #endif | ||
121 | |||
122 | #if (CONFIG_VCO_MULT > 64) | ||
123 | #error "VCO Multiplier is more than 64. Please select a different value" | ||
124 | #endif | ||
125 | |||
126 | #ifndef CONFIG_CLKIN_HALF | ||
127 | #define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) | ||
128 | #else | ||
129 | #define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2) | ||
130 | #endif | ||
131 | |||
132 | #ifndef CONFIG_PLL_BYPASS | ||
133 | #define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV) | ||
134 | #define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV) | ||
135 | #else | ||
136 | #define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ | ||
137 | #define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ | ||
138 | #endif | ||
139 | |||
140 | #if (CONFIG_SCLK_DIV < 1) | ||
141 | #error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value" | ||
142 | #endif | ||
143 | |||
144 | #if (CONFIG_SCLK_DIV > 15) | ||
145 | #error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value" | ||
146 | #endif | ||
147 | |||
148 | #if (CONFIG_CCLK_DIV != 1) | ||
149 | #if (CONFIG_CCLK_DIV != 2) | ||
150 | #if (CONFIG_CCLK_DIV != 4) | ||
151 | #if (CONFIG_CCLK_DIV != 8) | ||
152 | #error "CCLK DIV can be 1,2,4 or 8 only. Please select a proper value" | ||
153 | #endif | ||
154 | #endif | ||
155 | #endif | ||
156 | #endif | ||
157 | |||
158 | #if (CONFIG_VCO_HZ > MAX_VC) | ||
159 | #error "VCO selected is more than maximum value. Please change the VCO multipler" | ||
160 | #endif | ||
161 | |||
162 | #if (CONFIG_SCLK_HZ > 133000000) | ||
163 | #error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier" | ||
164 | #endif | ||
165 | |||
166 | #if (CONFIG_SCLK_HZ < 27000000) | ||
167 | #error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier" | ||
168 | #endif | ||
169 | |||
170 | #if (CONFIG_SCLK_HZ >= CONFIG_CCLK_HZ) | ||
171 | #if (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ) | ||
172 | #if (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ) | ||
173 | #error "Please select sclk less than cclk" | ||
174 | #endif | ||
175 | #endif | ||
176 | #endif | ||
177 | |||
178 | #if (CONFIG_CCLK_DIV == 1) | ||
179 | #define CONFIG_CCLK_ACT_DIV CCLK_DIV1 | ||
180 | #endif | ||
181 | #if (CONFIG_CCLK_DIV == 2) | ||
182 | #define CONFIG_CCLK_ACT_DIV CCLK_DIV2 | ||
183 | #endif | ||
184 | #if (CONFIG_CCLK_DIV == 4) | ||
185 | #define CONFIG_CCLK_ACT_DIV CCLK_DIV4 | ||
186 | #endif | ||
187 | #if (CONFIG_CCLK_DIV == 8) | ||
188 | #define CONFIG_CCLK_ACT_DIV CCLK_DIV8 | ||
189 | #endif | ||
190 | #ifndef CONFIG_CCLK_ACT_DIV | ||
191 | #define CONFIG_CCLK_ACT_DIV CONFIG_CCLK_DIV_not_defined_properly | ||
192 | #endif | ||
193 | |||
194 | #endif /* CONFIG_BFIN_KERNEL_CLOCK */ | ||
195 | |||
196 | #ifdef CONFIG_BF542 | 109 | #ifdef CONFIG_BF542 |
197 | #define CPU "BF542" | 110 | #define CPU "BF542" |
198 | #define CPUID 0x027c8000 | 111 | #define CPUID 0x027c8000 |