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Diffstat (limited to 'include/asm-blackfin/mach-bf537/cdefBF534.h')
-rw-r--r--include/asm-blackfin/mach-bf537/cdefBF534.h31
1 files changed, 27 insertions, 4 deletions
diff --git a/include/asm-blackfin/mach-bf537/cdefBF534.h b/include/asm-blackfin/mach-bf537/cdefBF534.h
index 048d26a61fd1..82de526f8097 100644
--- a/include/asm-blackfin/mach-bf537/cdefBF534.h
+++ b/include/asm-blackfin/mach-bf537/cdefBF534.h
@@ -44,7 +44,27 @@
44 44
45/* Clock and System Control (0xFFC00000 - 0xFFC000FF) */ 45/* Clock and System Control (0xFFC00000 - 0xFFC000FF) */
46#define bfin_read_PLL_CTL() bfin_read16(PLL_CTL) 46#define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
47#define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL,val) 47/* Writing to PLL_CTL initiates a PLL relock sequence. */
48static __inline__ void bfin_write_PLL_CTL(unsigned int val)
49{
50 unsigned long flags, iwr;
51
52 if (val == bfin_read_PLL_CTL())
53 return;
54
55 local_irq_save(flags);
56 /* Enable the PLL Wakeup bit in SIC IWR */
57 iwr = bfin_read32(SIC_IWR);
58 /* Only allow PPL Wakeup) */
59 bfin_write32(SIC_IWR, IWR_ENABLE(0));
60
61 bfin_write16(PLL_CTL, val);
62 SSYNC();
63 asm("IDLE;");
64
65 bfin_write32(SIC_IWR, iwr);
66 local_irq_restore(flags);
67}
48#define bfin_read_PLL_DIV() bfin_read16(PLL_DIV) 68#define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
49#define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val) 69#define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val)
50#define bfin_read_VR_CTL() bfin_read16(VR_CTL) 70#define bfin_read_VR_CTL() bfin_read16(VR_CTL)
@@ -53,6 +73,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
53{ 73{
54 unsigned long flags, iwr; 74 unsigned long flags, iwr;
55 75
76 if (val == bfin_read_VR_CTL())
77 return;
78
79 local_irq_save(flags);
56 /* Enable the PLL Wakeup bit in SIC IWR */ 80 /* Enable the PLL Wakeup bit in SIC IWR */
57 iwr = bfin_read32(SIC_IWR); 81 iwr = bfin_read32(SIC_IWR);
58 /* Only allow PPL Wakeup) */ 82 /* Only allow PPL Wakeup) */
@@ -60,11 +84,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
60 84
61 bfin_write16(VR_CTL, val); 85 bfin_write16(VR_CTL, val);
62 SSYNC(); 86 SSYNC();
63
64 local_irq_save(flags);
65 asm("IDLE;"); 87 asm("IDLE;");
66 local_irq_restore(flags); 88
67 bfin_write32(SIC_IWR, iwr); 89 bfin_write32(SIC_IWR, iwr);
90 local_irq_restore(flags);
68} 91}
69#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT) 92#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
70#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) 93#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val)