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Diffstat (limited to 'include/asm-blackfin/mach-bf533')
-rw-r--r--include/asm-blackfin/mach-bf533/cdefBF532.h31
1 files changed, 27 insertions, 4 deletions
diff --git a/include/asm-blackfin/mach-bf533/cdefBF532.h b/include/asm-blackfin/mach-bf533/cdefBF532.h
index c803e14b529c..154655452d4c 100644
--- a/include/asm-blackfin/mach-bf533/cdefBF532.h
+++ b/include/asm-blackfin/mach-bf533/cdefBF532.h
@@ -43,7 +43,27 @@
43 43
44/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */ 44/* Clock and System Control (0xFFC0 0400-0xFFC0 07FF) */
45#define bfin_read_PLL_CTL() bfin_read16(PLL_CTL) 45#define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
46#define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL,val) 46/* Writing to PLL_CTL initiates a PLL relock sequence. */
47static __inline__ void bfin_write_PLL_CTL(unsigned int val)
48{
49 unsigned long flags, iwr;
50
51 if (val == bfin_read_PLL_CTL())
52 return;
53
54 local_irq_save(flags);
55 /* Enable the PLL Wakeup bit in SIC IWR */
56 iwr = bfin_read32(SIC_IWR);
57 /* Only allow PPL Wakeup) */
58 bfin_write32(SIC_IWR, IWR_ENABLE(0));
59
60 bfin_write16(PLL_CTL, val);
61 SSYNC();
62 asm("IDLE;");
63
64 bfin_write32(SIC_IWR, iwr);
65 local_irq_restore(flags);
66}
47#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT) 67#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
48#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) 68#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val)
49#define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT) 69#define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
@@ -57,6 +77,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
57{ 77{
58 unsigned long flags, iwr; 78 unsigned long flags, iwr;
59 79
80 if (val == bfin_read_VR_CTL())
81 return;
82
83 local_irq_save(flags);
60 /* Enable the PLL Wakeup bit in SIC IWR */ 84 /* Enable the PLL Wakeup bit in SIC IWR */
61 iwr = bfin_read32(SIC_IWR); 85 iwr = bfin_read32(SIC_IWR);
62 /* Only allow PPL Wakeup) */ 86 /* Only allow PPL Wakeup) */
@@ -64,11 +88,10 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
64 88
65 bfin_write16(VR_CTL, val); 89 bfin_write16(VR_CTL, val);
66 SSYNC(); 90 SSYNC();
67
68 local_irq_save(flags);
69 asm("IDLE;"); 91 asm("IDLE;");
70 local_irq_restore(flags); 92
71 bfin_write32(SIC_IWR, iwr); 93 bfin_write32(SIC_IWR, iwr);
94 local_irq_restore(flags);
72} 95}
73 96
74/* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */ 97/* System Interrupt Controller (0xFFC0 0C00-0xFFC0 0FFF) */