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Diffstat (limited to 'include/asm-blackfin/mach-bf533/bfin_sir.h')
-rw-r--r--include/asm-blackfin/mach-bf533/bfin_sir.h120
1 files changed, 120 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf533/bfin_sir.h b/include/asm-blackfin/mach-bf533/bfin_sir.h
new file mode 100644
index 000000000000..cefcf8bb505b
--- /dev/null
+++ b/include/asm-blackfin/mach-bf533/bfin_sir.h
@@ -0,0 +1,120 @@
1/*
2 * Blackfin Infra-red Driver
3 *
4 * Copyright 2006-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 *
10 */
11
12#include <linux/serial.h>
13#include <asm/dma.h>
14#include <asm/portmux.h>
15
16#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
17#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
18#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
19#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
20#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
21#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
22#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
23
24#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
25#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
26#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
27#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
28#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
29#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
30
31#ifdef CONFIG_SIR_BFIN_DMA
32struct dma_rx_buf {
33 char *buf;
34 int head;
35 int tail;
36 };
37#endif /* CONFIG_SIR_BFIN_DMA */
38
39struct bfin_sir_port {
40 unsigned char __iomem *membase;
41 unsigned int irq;
42 unsigned int lsr;
43 unsigned long clk;
44 struct net_device *dev;
45#ifdef CONFIG_SIR_BFIN_DMA
46 int tx_done;
47 struct dma_rx_buf rx_dma_buf;
48 struct timer_list rx_dma_timer;
49 int rx_dma_nrows;
50#endif /* CONFIG_SIR_BFIN_DMA */
51 unsigned int tx_dma_channel;
52 unsigned int rx_dma_channel;
53};
54
55struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
56
57struct bfin_sir_port_res {
58 unsigned long base_addr;
59 int irq;
60 unsigned int rx_dma_channel;
61 unsigned int tx_dma_channel;
62};
63
64struct bfin_sir_port_res bfin_sir_port_resource[] = {
65#ifdef CONFIG_BFIN_SIR0
66 {
67 0xFFC00400,
68 IRQ_UART_RX,
69 CH_UART_RX,
70 CH_UART_TX,
71 },
72#endif
73};
74
75int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
76
77struct bfin_sir_self {
78 struct bfin_sir_port *sir_port;
79 spinlock_t lock;
80 unsigned int open;
81 int speed;
82 int newspeed;
83
84 struct sk_buff *txskb;
85 struct sk_buff *rxskb;
86 struct net_device_stats stats;
87 struct device *dev;
88 struct irlap_cb *irlap;
89 struct qos_info qos;
90
91 iobuff_t tx_buff;
92 iobuff_t rx_buff;
93
94 struct work_struct work;
95 int mtt;
96};
97
98static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
99{
100 unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
101 port->lsr |= (lsr & (BI|FE|PE|OE));
102 return lsr | port->lsr;
103}
104
105static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
106{
107 port->lsr = 0;
108 bfin_read16(port->membase + OFFSET_LSR);
109}
110
111#define DRIVER_NAME "bfin_sir"
112
113static void bfin_sir_hw_init(void)
114{
115#ifdef CONFIG_BFIN_SIR0
116 peripheral_request(P_UART0_TX, DRIVER_NAME);
117 peripheral_request(P_UART0_RX, DRIVER_NAME);
118#endif
119 SSYNC();
120}