diff options
Diffstat (limited to 'include/asm-blackfin/mach-bf527/cdefBF52x_base.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf527/cdefBF52x_base.h | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/include/asm-blackfin/mach-bf527/cdefBF52x_base.h b/include/asm-blackfin/mach-bf527/cdefBF52x_base.h index 3f4de5d9d4cb..50e14e7da3ee 100644 --- a/include/asm-blackfin/mach-bf527/cdefBF52x_base.h +++ b/include/asm-blackfin/mach-bf527/cdefBF52x_base.h | |||
| @@ -873,39 +873,6 @@ | |||
| 873 | 873 | ||
| 874 | 874 | ||
| 875 | /* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */ | 875 | /* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */ |
| 876 | #define bfin_read_TWI_CLKDIV() bfin_read16(TWI_CLKDIV) | ||
| 877 | #define bfin_write_TWI_CLKDIV(val) bfin_write16(TWI_CLKDIV, val) | ||
| 878 | #define bfin_read_TWI_CONTROL() bfin_read16(TWI_CONTROL) | ||
| 879 | #define bfin_write_TWI_CONTROL(val) bfin_write16(TWI_CONTROL, val) | ||
| 880 | #define bfin_read_TWI_SLAVE_CTL() bfin_read16(TWI_SLAVE_CTL) | ||
| 881 | #define bfin_write_TWI_SLAVE_CTL(val) bfin_write16(TWI_SLAVE_CTL, val) | ||
| 882 | #define bfin_read_TWI_SLAVE_STAT() bfin_read16(TWI_SLAVE_STAT) | ||
| 883 | #define bfin_write_TWI_SLAVE_STAT(val) bfin_write16(TWI_SLAVE_STAT, val) | ||
| 884 | #define bfin_read_TWI_SLAVE_ADDR() bfin_read16(TWI_SLAVE_ADDR) | ||
| 885 | #define bfin_write_TWI_SLAVE_ADDR(val) bfin_write16(TWI_SLAVE_ADDR, val) | ||
| 886 | #define bfin_read_TWI_MASTER_CTL() bfin_read16(TWI_MASTER_CTL) | ||
| 887 | #define bfin_write_TWI_MASTER_CTL(val) bfin_write16(TWI_MASTER_CTL, val) | ||
| 888 | #define bfin_read_TWI_MASTER_STAT() bfin_read16(TWI_MASTER_STAT) | ||
| 889 | #define bfin_write_TWI_MASTER_STAT(val) bfin_write16(TWI_MASTER_STAT, val) | ||
| 890 | #define bfin_read_TWI_MASTER_ADDR() bfin_read16(TWI_MASTER_ADDR) | ||
| 891 | #define bfin_write_TWI_MASTER_ADDR(val) bfin_write16(TWI_MASTER_ADDR, val) | ||
| 892 | #define bfin_read_TWI_INT_STAT() bfin_read16(TWI_INT_STAT) | ||
| 893 | #define bfin_write_TWI_INT_STAT(val) bfin_write16(TWI_INT_STAT, val) | ||
| 894 | #define bfin_read_TWI_INT_MASK() bfin_read16(TWI_INT_MASK) | ||
| 895 | #define bfin_write_TWI_INT_MASK(val) bfin_write16(TWI_INT_MASK, val) | ||
| 896 | #define bfin_read_TWI_FIFO_CTL() bfin_read16(TWI_FIFO_CTL) | ||
| 897 | #define bfin_write_TWI_FIFO_CTL(val) bfin_write16(TWI_FIFO_CTL, val) | ||
| 898 | #define bfin_read_TWI_FIFO_STAT() bfin_read16(TWI_FIFO_STAT) | ||
| 899 | #define bfin_write_TWI_FIFO_STAT(val) bfin_write16(TWI_FIFO_STAT, val) | ||
| 900 | #define bfin_read_TWI_XMT_DATA8() bfin_read16(TWI_XMT_DATA8) | ||
| 901 | #define bfin_write_TWI_XMT_DATA8(val) bfin_write16(TWI_XMT_DATA8, val) | ||
| 902 | #define bfin_read_TWI_XMT_DATA16() bfin_read16(TWI_XMT_DATA16) | ||
| 903 | #define bfin_write_TWI_XMT_DATA16(val) bfin_write16(TWI_XMT_DATA16, val) | ||
| 904 | #define bfin_read_TWI_RCV_DATA8() bfin_read16(TWI_RCV_DATA8) | ||
| 905 | #define bfin_write_TWI_RCV_DATA8(val) bfin_write16(TWI_RCV_DATA8, val) | ||
| 906 | #define bfin_read_TWI_RCV_DATA16() bfin_read16(TWI_RCV_DATA16) | ||
| 907 | #define bfin_write_TWI_RCV_DATA16(val) bfin_write16(TWI_RCV_DATA16, val) | ||
| 908 | |||
| 909 | 876 | ||
| 910 | /* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF) */ | 877 | /* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF) */ |
| 911 | #define bfin_read_PORTGIO() bfin_read16(PORTGIO) | 878 | #define bfin_read_PORTGIO() bfin_read16(PORTGIO) |