diff options
Diffstat (limited to 'include/asm-blackfin/mach-bf527/bfin_serial_5xx.h')
-rw-r--r-- | include/asm-blackfin/mach-bf527/bfin_serial_5xx.h | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h index 15dbc21eed8b..c0694ecd2ecd 100644 --- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h | |||
@@ -23,7 +23,6 @@ | |||
23 | #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) | 23 | #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) |
24 | #define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) | 24 | #define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) |
25 | #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) | 25 | #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) |
26 | #define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR)) | ||
27 | #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) | 26 | #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) |
28 | 27 | ||
29 | #define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) | 28 | #define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) |
@@ -58,6 +57,7 @@ | |||
58 | struct bfin_serial_port { | 57 | struct bfin_serial_port { |
59 | struct uart_port port; | 58 | struct uart_port port; |
60 | unsigned int old_status; | 59 | unsigned int old_status; |
60 | unsigned int lsr; | ||
61 | #ifdef CONFIG_SERIAL_BFIN_DMA | 61 | #ifdef CONFIG_SERIAL_BFIN_DMA |
62 | int tx_done; | 62 | int tx_done; |
63 | int tx_count; | 63 | int tx_count; |
@@ -67,15 +67,31 @@ struct bfin_serial_port { | |||
67 | unsigned int tx_dma_channel; | 67 | unsigned int tx_dma_channel; |
68 | unsigned int rx_dma_channel; | 68 | unsigned int rx_dma_channel; |
69 | struct work_struct tx_dma_workqueue; | 69 | struct work_struct tx_dma_workqueue; |
70 | #else | ||
71 | struct work_struct cts_workqueue; | ||
72 | #endif | 70 | #endif |
73 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | 71 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
72 | struct work_struct cts_workqueue; | ||
74 | int cts_pin; | 73 | int cts_pin; |
75 | int rts_pin; | 74 | int rts_pin; |
76 | #endif | 75 | #endif |
77 | }; | 76 | }; |
78 | 77 | ||
78 | /* The hardware clears the LSR bits upon read, so we need to cache | ||
79 | * some of the more fun bits in software so they don't get lost | ||
80 | * when checking the LSR in other code paths (TX). | ||
81 | */ | ||
82 | static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart) | ||
83 | { | ||
84 | unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR); | ||
85 | uart->lsr |= (lsr & (BI|FE|PE|OE)); | ||
86 | return lsr | uart->lsr; | ||
87 | } | ||
88 | |||
89 | static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart) | ||
90 | { | ||
91 | uart->lsr = 0; | ||
92 | bfin_write16(uart->port.membase + OFFSET_LSR, -1); | ||
93 | } | ||
94 | |||
79 | struct bfin_serial_port bfin_serial_ports[NR_PORTS]; | 95 | struct bfin_serial_port bfin_serial_ports[NR_PORTS]; |
80 | struct bfin_serial_res { | 96 | struct bfin_serial_res { |
81 | unsigned long uart_base_addr; | 97 | unsigned long uart_base_addr; |