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-rw-r--r--include/asm-blackfin/mach-bf527/bf527.h127
1 files changed, 0 insertions, 127 deletions
diff --git a/include/asm-blackfin/mach-bf527/bf527.h b/include/asm-blackfin/mach-bf527/bf527.h
deleted file mode 100644
index 056eb4b9cd25..000000000000
--- a/include/asm-blackfin/mach-bf527/bf527.h
+++ /dev/null
@@ -1,127 +0,0 @@
1/*
2 * File: include/asm-blackfin/mach-bf527/bf527.h
3 * Based on: include/asm-blackfin/mach-bf537/bf537.h
4 * Author: Michael Hennerich (michael.hennerich@analog.com)
5 *
6 * Created:
7 * Description: SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF527
8 *
9 * Modified:
10 * Copyright 2004-2007 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#ifndef __MACH_BF527_H__
31#define __MACH_BF527_H__
32
33#define SUPPORTED_REVID 2
34
35#define OFFSET_(x) ((x) & 0x0000FFFF)
36
37/*some misc defines*/
38#define IMASK_IVG15 0x8000
39#define IMASK_IVG14 0x4000
40#define IMASK_IVG13 0x2000
41#define IMASK_IVG12 0x1000
42
43#define IMASK_IVG11 0x0800
44#define IMASK_IVG10 0x0400
45#define IMASK_IVG9 0x0200
46#define IMASK_IVG8 0x0100
47
48#define IMASK_IVG7 0x0080
49#define IMASK_IVGTMR 0x0040
50#define IMASK_IVGHW 0x0020
51
52/***************************/
53
54#define BFIN_DSUBBANKS 4
55#define BFIN_DWAYS 2
56#define BFIN_DLINES 64
57#define BFIN_ISUBBANKS 4
58#define BFIN_IWAYS 4
59#define BFIN_ILINES 32
60
61#define WAY0_L 0x1
62#define WAY1_L 0x2
63#define WAY01_L 0x3
64#define WAY2_L 0x4
65#define WAY02_L 0x5
66#define WAY12_L 0x6
67#define WAY012_L 0x7
68
69#define WAY3_L 0x8
70#define WAY03_L 0x9
71#define WAY13_L 0xA
72#define WAY013_L 0xB
73
74#define WAY32_L 0xC
75#define WAY320_L 0xD
76#define WAY321_L 0xE
77#define WAYALL_L 0xF
78
79#define DMC_ENABLE (2<<2) /*yes, 2, not 1 */
80
81/********************************* EBIU Settings ************************************/
82#define AMBCTL0VAL ((CONFIG_BANK_1 << 16) | CONFIG_BANK_0)
83#define AMBCTL1VAL ((CONFIG_BANK_3 << 16) | CONFIG_BANK_2)
84
85#ifdef CONFIG_C_AMBEN_ALL
86#define V_AMBEN AMBEN_ALL
87#endif
88#ifdef CONFIG_C_AMBEN
89#define V_AMBEN 0x0
90#endif
91#ifdef CONFIG_C_AMBEN_B0
92#define V_AMBEN AMBEN_B0
93#endif
94#ifdef CONFIG_C_AMBEN_B0_B1
95#define V_AMBEN AMBEN_B0_B1
96#endif
97#ifdef CONFIG_C_AMBEN_B0_B1_B2
98#define V_AMBEN AMBEN_B0_B1_B2
99#endif
100#ifdef CONFIG_C_AMCKEN
101#define V_AMCKEN AMCKEN
102#else
103#define V_AMCKEN 0x0
104#endif
105#ifdef CONFIG_C_CDPRIO
106#define V_CDPRIO 0x100
107#else
108#define V_CDPRIO 0x0
109#endif
110
111#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO)
112
113#ifdef CONFIG_BF527
114#define CPU "BF527"
115#endif
116#ifdef CONFIG_BF525
117#define CPU "BF525"
118#endif
119#ifdef CONFIG_BF522
120#define CPU "BF522"
121#endif
122#ifndef CPU
123#define CPU "UNKNOWN"
124#define CPUID 0x0
125#endif
126
127#endif /* __MACH_BF527_H__ */