diff options
Diffstat (limited to 'include/asm-blackfin/cplb.h')
| -rw-r--r-- | include/asm-blackfin/cplb.h | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/include/asm-blackfin/cplb.h b/include/asm-blackfin/cplb.h index 654375c2b746..5b0da9a69b67 100644 --- a/include/asm-blackfin/cplb.h +++ b/include/asm-blackfin/cplb.h | |||
| @@ -74,32 +74,6 @@ | |||
| 74 | #define ASYNC_MEMORY_CPLB_COVERAGE ((ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \ | 74 | #define ASYNC_MEMORY_CPLB_COVERAGE ((ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \ |
| 75 | ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE) / SIZE_4M) | 75 | ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE) / SIZE_4M) |
| 76 | 76 | ||
| 77 | /* | ||
| 78 | * Number of required data CPLB switchtable entries | ||
| 79 | * MEMSIZE / 4 (we mostly install 4M page size CPLBs | ||
| 80 | * approx 16 for smaller 1MB page size CPLBs for allignment purposes | ||
| 81 | * 1 for L1 Data Memory | ||
| 82 | * possibly 1 for L2 Data Memory | ||
| 83 | * 1 for CONFIG_DEBUG_HUNT_FOR_ZERO | ||
| 84 | * 1 for ASYNC Memory | ||
| 85 | */ | ||
| 86 | |||
| 87 | |||
| 88 | #define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \ | ||
| 89 | + ASYNC_MEMORY_CPLB_COVERAGE) * 2) | ||
| 90 | |||
| 91 | /* | ||
| 92 | * Number of required instruction CPLB switchtable entries | ||
| 93 | * MEMSIZE / 4 (we mostly install 4M page size CPLBs | ||
| 94 | * approx 12 for smaller 1MB page size CPLBs for allignment purposes | ||
| 95 | * 1 for L1 Instruction Memory | ||
| 96 | * possibly 1 for L2 Instruction Memory | ||
| 97 | * 1 for CONFIG_DEBUG_HUNT_FOR_ZERO | ||
| 98 | */ | ||
| 99 | |||
| 100 | #define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2) | ||
| 101 | |||
| 102 | |||
| 103 | #define CPLB_ENABLE_ICACHE_P 0 | 77 | #define CPLB_ENABLE_ICACHE_P 0 |
| 104 | #define CPLB_ENABLE_DCACHE_P 1 | 78 | #define CPLB_ENABLE_DCACHE_P 1 |
| 105 | #define CPLB_ENABLE_DCACHE2_P 2 | 79 | #define CPLB_ENABLE_DCACHE2_P 2 |