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-rw-r--r--include/asm-arm/arch-at91rm9200/at91rm9200.h118
-rw-r--r--include/asm-arm/arch-at91rm9200/at91rm9200_sys.h3
-rw-r--r--include/asm-arm/arch-at91rm9200/at91rm9200_twi.h57
-rw-r--r--include/asm-arm/arch-at91rm9200/gpio.h18
-rw-r--r--include/asm-arm/arch-at91rm9200/hardware.h28
-rw-r--r--include/asm-arm/arch-at91rm9200/irqs.h2
-rw-r--r--include/asm-arm/arch-ep93xx/ep93xx-regs.h1
-rw-r--r--include/asm-arm/arch-ep93xx/platform.h6
-rw-r--r--include/asm-arm/arch-ixp4xx/platform.h5
-rw-r--r--include/asm-arm/arch-omap/board-ams-delta.h11
-rw-r--r--include/asm-arm/arch-omap/clock.h1
-rw-r--r--include/asm-arm/arch-omap/dma.h16
-rw-r--r--include/asm-arm/arch-omap/dmtimer.h2
-rw-r--r--include/asm-arm/arch-omap/gpmc.h4
-rw-r--r--include/asm-arm/arch-omap/irqs.h2
-rw-r--r--include/asm-arm/arch-omap/mux.h25
-rw-r--r--include/asm-arm/elf.h18
-rw-r--r--include/asm-arm/hardware/locomo.h33
-rw-r--r--include/asm-arm/hardware/sharpsl_pm.h1
-rw-r--r--include/asm-arm/mach/time.h2
-rw-r--r--include/asm-arm/page.h4
-rw-r--r--include/asm-arm/timeofday.h4
22 files changed, 245 insertions, 116 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200.h b/include/asm-arm/arch-at91rm9200/at91rm9200.h
index 58f40931a5c1..a5a86b1ff886 100644
--- a/include/asm-arm/arch-at91rm9200/at91rm9200.h
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200.h
@@ -19,67 +19,80 @@
19/* 19/*
20 * Peripheral identifiers/interrupts. 20 * Peripheral identifiers/interrupts.
21 */ 21 */
22#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ 22#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
23#define AT91_ID_SYS 1 /* System Peripheral */ 23#define AT91_ID_SYS 1 /* System Peripheral */
24#define AT91_ID_PIOA 2 /* Parallel IO Controller A */ 24#define AT91RM9200_ID_PIOA 2 /* Parallel IO Controller A */
25#define AT91_ID_PIOB 3 /* Parallel IO Controller B */ 25#define AT91RM9200_ID_PIOB 3 /* Parallel IO Controller B */
26#define AT91_ID_PIOC 4 /* Parallel IO Controller C */ 26#define AT91RM9200_ID_PIOC 4 /* Parallel IO Controller C */
27#define AT91_ID_PIOD 5 /* Parallel IO Controller D */ 27#define AT91RM9200_ID_PIOD 5 /* Parallel IO Controller D */
28#define AT91_ID_US0 6 /* USART 0 */ 28#define AT91RM9200_ID_US0 6 /* USART 0 */
29#define AT91_ID_US1 7 /* USART 1 */ 29#define AT91RM9200_ID_US1 7 /* USART 1 */
30#define AT91_ID_US2 8 /* USART 2 */ 30#define AT91RM9200_ID_US2 8 /* USART 2 */
31#define AT91_ID_US3 9 /* USART 3 */ 31#define AT91RM9200_ID_US3 9 /* USART 3 */
32#define AT91_ID_MCI 10 /* Multimedia Card Interface */ 32#define AT91RM9200_ID_MCI 10 /* Multimedia Card Interface */
33#define AT91_ID_UDP 11 /* USB Device Port */ 33#define AT91RM9200_ID_UDP 11 /* USB Device Port */
34#define AT91_ID_TWI 12 /* Two-Wire Interface */ 34#define AT91RM9200_ID_TWI 12 /* Two-Wire Interface */
35#define AT91_ID_SPI 13 /* Serial Peripheral Interface */ 35#define AT91RM9200_ID_SPI 13 /* Serial Peripheral Interface */
36#define AT91_ID_SSC0 14 /* Serial Synchronous Controller 0 */ 36#define AT91RM9200_ID_SSC0 14 /* Serial Synchronous Controller 0 */
37#define AT91_ID_SSC1 15 /* Serial Synchronous Controller 1 */ 37#define AT91RM9200_ID_SSC1 15 /* Serial Synchronous Controller 1 */
38#define AT91_ID_SSC2 16 /* Serial Synchronous Controller 2 */ 38#define AT91RM9200_ID_SSC2 16 /* Serial Synchronous Controller 2 */
39#define AT91_ID_TC0 17 /* Timer Counter 0 */ 39#define AT91RM9200_ID_TC0 17 /* Timer Counter 0 */
40#define AT91_ID_TC1 18 /* Timer Counter 1 */ 40#define AT91RM9200_ID_TC1 18 /* Timer Counter 1 */
41#define AT91_ID_TC2 19 /* Timer Counter 2 */ 41#define AT91RM9200_ID_TC2 19 /* Timer Counter 2 */
42#define AT91_ID_TC3 20 /* Timer Counter 3 */ 42#define AT91RM9200_ID_TC3 20 /* Timer Counter 3 */
43#define AT91_ID_TC4 21 /* Timer Counter 4 */ 43#define AT91RM9200_ID_TC4 21 /* Timer Counter 4 */
44#define AT91_ID_TC5 22 /* Timer Counter 5 */ 44#define AT91RM9200_ID_TC5 22 /* Timer Counter 5 */
45#define AT91_ID_UHP 23 /* USB Host port */ 45#define AT91RM9200_ID_UHP 23 /* USB Host port */
46#define AT91_ID_EMAC 24 /* Ethernet MAC */ 46#define AT91RM9200_ID_EMAC 24 /* Ethernet MAC */
47#define AT91_ID_IRQ0 25 /* Advanced Interrupt Controller (IRQ0) */ 47#define AT91RM9200_ID_IRQ0 25 /* Advanced Interrupt Controller (IRQ0) */
48#define AT91_ID_IRQ1 26 /* Advanced Interrupt Controller (IRQ1) */ 48#define AT91RM9200_ID_IRQ1 26 /* Advanced Interrupt Controller (IRQ1) */
49#define AT91_ID_IRQ2 27 /* Advanced Interrupt Controller (IRQ2) */ 49#define AT91RM9200_ID_IRQ2 27 /* Advanced Interrupt Controller (IRQ2) */
50#define AT91_ID_IRQ3 28 /* Advanced Interrupt Controller (IRQ3) */ 50#define AT91RM9200_ID_IRQ3 28 /* Advanced Interrupt Controller (IRQ3) */
51#define AT91_ID_IRQ4 29 /* Advanced Interrupt Controller (IRQ4) */ 51#define AT91RM9200_ID_IRQ4 29 /* Advanced Interrupt Controller (IRQ4) */
52#define AT91_ID_IRQ5 30 /* Advanced Interrupt Controller (IRQ5) */ 52#define AT91RM9200_ID_IRQ5 30 /* Advanced Interrupt Controller (IRQ5) */
53#define AT91_ID_IRQ6 31 /* Advanced Interrupt Controller (IRQ6) */ 53#define AT91RM9200_ID_IRQ6 31 /* Advanced Interrupt Controller (IRQ6) */
54 54
55 55
56/* 56/*
57 * Peripheral physical base addresses. 57 * Peripheral physical base addresses.
58 */ 58 */
59#define AT91_BASE_TCB0 0xfffa0000 59#define AT91RM9200_BASE_TCB0 0xfffa0000
60#define AT91_BASE_TC0 0xfffa0000 60#define AT91RM9200_BASE_TC0 0xfffa0000
61#define AT91_BASE_TC1 0xfffa0040 61#define AT91RM9200_BASE_TC1 0xfffa0040
62#define AT91_BASE_TC2 0xfffa0080 62#define AT91RM9200_BASE_TC2 0xfffa0080
63#define AT91_BASE_TCB1 0xfffa4000 63#define AT91RM9200_BASE_TCB1 0xfffa4000
64#define AT91_BASE_TC3 0xfffa4000 64#define AT91RM9200_BASE_TC3 0xfffa4000
65#define AT91_BASE_TC4 0xfffa4040 65#define AT91RM9200_BASE_TC4 0xfffa4040
66#define AT91_BASE_TC5 0xfffa4080 66#define AT91RM9200_BASE_TC5 0xfffa4080
67#define AT91_BASE_UDP 0xfffb0000 67#define AT91RM9200_BASE_UDP 0xfffb0000
68#define AT91_BASE_MCI 0xfffb4000 68#define AT91RM9200_BASE_MCI 0xfffb4000
69#define AT91_BASE_TWI 0xfffb8000 69#define AT91RM9200_BASE_TWI 0xfffb8000
70#define AT91_BASE_EMAC 0xfffbc000 70#define AT91RM9200_BASE_EMAC 0xfffbc000
71#define AT91_BASE_US0 0xfffc0000 71#define AT91RM9200_BASE_US0 0xfffc0000
72#define AT91_BASE_US1 0xfffc4000 72#define AT91RM9200_BASE_US1 0xfffc4000
73#define AT91_BASE_US2 0xfffc8000 73#define AT91RM9200_BASE_US2 0xfffc8000
74#define AT91_BASE_US3 0xfffcc000 74#define AT91RM9200_BASE_US3 0xfffcc000
75#define AT91_BASE_SSC0 0xfffd0000 75#define AT91RM9200_BASE_SSC0 0xfffd0000
76#define AT91_BASE_SSC1 0xfffd4000 76#define AT91RM9200_BASE_SSC1 0xfffd4000
77#define AT91_BASE_SSC2 0xfffd8000 77#define AT91RM9200_BASE_SSC2 0xfffd8000
78#define AT91_BASE_SPI 0xfffe0000 78#define AT91RM9200_BASE_SPI 0xfffe0000
79#define AT91_BASE_SYS 0xfffff000 79#define AT91_BASE_SYS 0xfffff000
80 80
81 81
82/* 82/*
83 * Internal Memory.
84 */
85#define AT91RM9200_ROM_BASE 0x00100000 /* Internal ROM base address */
86#define AT91RM9200_ROM_SIZE SZ_128K /* Internal ROM size (128Kb) */
87
88#define AT91RM9200_SRAM_BASE 0x00200000 /* Internal SRAM base address */
89#define AT91RM9200_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */
90
91#define AT91RM9200_UHP_BASE 0x00300000 /* USB Host controller */
92
93
94#if 0
95/*
83 * PIO pin definitions (peripheral A/B multiplexing). 96 * PIO pin definitions (peripheral A/B multiplexing).
84 */ 97 */
85#define AT91_PA0_MISO (1 << 0) /* A: SPI Master-In Slave-Out */ 98#define AT91_PA0_MISO (1 << 0) /* A: SPI Master-In Slave-Out */
@@ -257,5 +270,6 @@
257#define AT91_PD25_TPK13 (1 << 25) /* B: ETM Trace Packet Port 13 */ 270#define AT91_PD25_TPK13 (1 << 25) /* B: ETM Trace Packet Port 13 */
258#define AT91_PD26_TPK14 (1 << 26) /* B: ETM Trace Packet Port 14 */ 271#define AT91_PD26_TPK14 (1 << 26) /* B: ETM Trace Packet Port 14 */
259#define AT91_PD27_TPK15 (1 << 27) /* B: ETM Trace Packet Port 15 */ 272#define AT91_PD27_TPK15 (1 << 27) /* B: ETM Trace Packet Port 15 */
273#endif
260 274
261#endif 275#endif
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h b/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
index 0f4c12d5f0cd..73693fea76a2 100644
--- a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
@@ -80,6 +80,9 @@
80#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ 80#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
81#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ 81#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */
82 82
83#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */
84#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */
85#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */
83 86
84/* 87/*
85 * PIO Controllers. 88 * PIO Controllers.
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_twi.h b/include/asm-arm/arch-at91rm9200/at91rm9200_twi.h
new file mode 100644
index 000000000000..93547d7482bd
--- /dev/null
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200_twi.h
@@ -0,0 +1,57 @@
1/*
2 * include/asm-arm/arch-at91rm9200/at91rm9200_twi.h
3 *
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
6 *
7 * Two-wire Interface (TWI) registers.
8 * Based on AT91RM9200 datasheet revision E.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16#ifndef AT91RM9200_TWI_H
17#define AT91RM9200_TWI_H
18
19#define AT91_TWI_CR 0x00 /* Control Register */
20#define AT91_TWI_START (1 << 0) /* Send a Start Condition */
21#define AT91_TWI_STOP (1 << 1) /* Send a Stop Condition */
22#define AT91_TWI_MSEN (1 << 2) /* Master Transfer Enable */
23#define AT91_TWI_MSDIS (1 << 3) /* Master Transfer Disable */
24#define AT91_TWI_SWRST (1 << 7) /* Software Reset */
25
26#define AT91_TWI_MMR 0x04 /* Master Mode Register */
27#define AT91_TWI_IADRSZ (3 << 8) /* Internal Device Address Size */
28#define AT91_TWI_IADRSZ_NO (0 << 8)
29#define AT91_TWI_IADRSZ_1 (1 << 8)
30#define AT91_TWI_IADRSZ_2 (2 << 8)
31#define AT91_TWI_IADRSZ_3 (3 << 8)
32#define AT91_TWI_MREAD (1 << 12) /* Master Read Direction */
33#define AT91_TWI_DADR (0x7f << 16) /* Device Address */
34
35#define AT91_TWI_IADR 0x0c /* Internal Address Register */
36
37#define AT91_TWI_CWGR 0x10 /* Clock Waveform Generator Register */
38#define AT91_TWI_CLDIV (0xff << 0) /* Clock Low Divisor */
39#define AT91_TWI_CHDIV (0xff << 8) /* Clock High Divisor */
40#define AT91_TWI_CKDIV (7 << 16) /* Clock Divider */
41
42#define AT91_TWI_SR 0x20 /* Status Register */
43#define AT91_TWI_TXCOMP (1 << 0) /* Transmission Complete */
44#define AT91_TWI_RXRDY (1 << 1) /* Receive Holding Register Ready */
45#define AT91_TWI_TXRDY (1 << 2) /* Transmit Holding Register Ready */
46#define AT91_TWI_OVRE (1 << 6) /* Overrun Error */
47#define AT91_TWI_UNRE (1 << 7) /* Underrun Error */
48#define AT91_TWI_NACK (1 << 8) /* Not Acknowledged */
49
50#define AT91_TWI_IER 0x24 /* Interrupt Enable Register */
51#define AT91_TWI_IDR 0x28 /* Interrupt Disable Register */
52#define AT91_TWI_IMR 0x2c /* Interrupt Mask Register */
53#define AT91_TWI_RHR 0x30 /* Receive Holding Register */
54#define AT91_TWI_THR 0x34 /* Transmit Holding Register */
55
56#endif
57
diff --git a/include/asm-arm/arch-at91rm9200/gpio.h b/include/asm-arm/arch-at91rm9200/gpio.h
index dbde1baaf251..a011d27876a2 100644
--- a/include/asm-arm/arch-at91rm9200/gpio.h
+++ b/include/asm-arm/arch-at91rm9200/gpio.h
@@ -17,10 +17,9 @@
17 17
18#define PIN_BASE NR_AIC_IRQS 18#define PIN_BASE NR_AIC_IRQS
19 19
20#define PQFP_GPIO_BANKS 3 /* PQFP package has 3 banks */ 20#define MAX_GPIO_BANKS 4
21#define BGA_GPIO_BANKS 4 /* BGA package has 4 banks */
22 21
23/* these pin numbers double as IRQ numbers, like AT91_ID_* values */ 22/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
24 23
25#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) 24#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0)
26#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) 25#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1)
@@ -180,17 +179,18 @@
180 179
181#ifndef __ASSEMBLY__ 180#ifndef __ASSEMBLY__
182/* setup setup routines, called from board init or driver probe() */ 181/* setup setup routines, called from board init or driver probe() */
183extern int at91_set_A_periph(unsigned pin, int use_pullup); 182extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup);
184extern int at91_set_B_periph(unsigned pin, int use_pullup); 183extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup);
185extern int at91_set_gpio_input(unsigned pin, int use_pullup); 184extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup);
186extern int at91_set_gpio_output(unsigned pin, int value); 185extern int __init_or_module at91_set_gpio_output(unsigned pin, int value);
187extern int at91_set_deglitch(unsigned pin, int is_on); 186extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on);
188extern int at91_set_multi_drive(unsigned pin, int is_on); 187extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on);
189 188
190/* callable at any time */ 189/* callable at any time */
191extern int at91_set_gpio_value(unsigned pin, int value); 190extern int at91_set_gpio_value(unsigned pin, int value);
192extern int at91_get_gpio_value(unsigned pin); 191extern int at91_get_gpio_value(unsigned pin);
193 192
193/* callable only from core power-management code */
194extern void at91_gpio_suspend(void); 194extern void at91_gpio_suspend(void);
195extern void at91_gpio_resume(void); 195extern void at91_gpio_resume(void);
196#endif 196#endif
diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h
index 235d39d91107..6551b4d1ff7b 100644
--- a/include/asm-arm/arch-at91rm9200/hardware.h
+++ b/include/asm-arm/arch-at91rm9200/hardware.h
@@ -34,27 +34,14 @@
34 * Virtual to Physical Address mapping for IO devices. 34 * Virtual to Physical Address mapping for IO devices.
35 */ 35 */
36#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) 36#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
37#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91_BASE_SPI) 37#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91RM9200_BASE_SPI)
38#define AT91_VA_BASE_SSC2 AT91_IO_P2V(AT91_BASE_SSC2) 38#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC)
39#define AT91_VA_BASE_SSC1 AT91_IO_P2V(AT91_BASE_SSC1) 39#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91RM9200_BASE_TWI)
40#define AT91_VA_BASE_SSC0 AT91_IO_P2V(AT91_BASE_SSC0) 40#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91RM9200_BASE_MCI)
41#define AT91_VA_BASE_US3 AT91_IO_P2V(AT91_BASE_US3) 41#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91RM9200_BASE_UDP)
42#define AT91_VA_BASE_US2 AT91_IO_P2V(AT91_BASE_US2)
43#define AT91_VA_BASE_US1 AT91_IO_P2V(AT91_BASE_US1)
44#define AT91_VA_BASE_US0 AT91_IO_P2V(AT91_BASE_US0)
45#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91_BASE_EMAC)
46#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91_BASE_TWI)
47#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91_BASE_MCI)
48#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91_BASE_UDP)
49#define AT91_VA_BASE_TCB1 AT91_IO_P2V(AT91_BASE_TCB1)
50#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0)
51
52/* Internal SRAM */
53#define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */
54#define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */
55 42
56 /* Internal SRAM is mapped below the IO devices */ 43 /* Internal SRAM is mapped below the IO devices */
57#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE) 44#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE)
58 45
59/* Serial ports */ 46/* Serial ports */
60#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */ 47#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */
@@ -71,9 +58,6 @@
71/* Compact Flash */ 58/* Compact Flash */
72#define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */ 59#define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */
73 60
74/* Multi-Master Memory controller */
75#define AT91_UHP_BASE 0x00300000 /* USB Host controller */
76
77/* Clocks */ 61/* Clocks */
78#define AT91_SLOW_CLOCK 32768 /* slow clock */ 62#define AT91_SLOW_CLOCK 32768 /* slow clock */
79 63
diff --git a/include/asm-arm/arch-at91rm9200/irqs.h b/include/asm-arm/arch-at91rm9200/irqs.h
index f63842c2c093..763cb96c418b 100644
--- a/include/asm-arm/arch-at91rm9200/irqs.h
+++ b/include/asm-arm/arch-at91rm9200/irqs.h
@@ -32,7 +32,7 @@
32 32
33 33
34/* 34/*
35 * IRQ interrupt symbols are the AT91_ID_* symbols in at91rm9200.h 35 * IRQ interrupt symbols are the AT91xxx_ID_* symbols
36 * for IRQs handled directly through the AIC, or else the AT91_PIN_* 36 * for IRQs handled directly through the AIC, or else the AT91_PIN_*
37 * symbols in gpio.h for ones handled indirectly as GPIOs. 37 * symbols in gpio.h for ones handled indirectly as GPIOs.
38 * We make provision for 4 banks of GPIO. 38 * We make provision for 4 banks of GPIO.
diff --git a/include/asm-arm/arch-ep93xx/ep93xx-regs.h b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
index 8c322975f96e..593f562f85c3 100644
--- a/include/asm-arm/arch-ep93xx/ep93xx-regs.h
+++ b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
@@ -27,6 +27,7 @@
27#define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000) 27#define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000)
28 28
29#define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000) 29#define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000)
30#define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000)
30 31
31#define EP93XX_USB_BASE (EP93XX_AHB_VIRT_BASE + 0x00020000) 32#define EP93XX_USB_BASE (EP93XX_AHB_VIRT_BASE + 0x00020000)
32#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) 33#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000)
diff --git a/include/asm-arm/arch-ep93xx/platform.h b/include/asm-arm/arch-ep93xx/platform.h
index d7a34ce20293..b4a8deb8bdef 100644
--- a/include/asm-arm/arch-ep93xx/platform.h
+++ b/include/asm-arm/arch-ep93xx/platform.h
@@ -11,5 +11,11 @@ void ep93xx_init_devices(void);
11void ep93xx_clock_init(void); 11void ep93xx_clock_init(void);
12extern struct sys_timer ep93xx_timer; 12extern struct sys_timer ep93xx_timer;
13 13
14struct ep93xx_eth_data
15{
16 unsigned char dev_addr[6];
17 unsigned char phy_id;
18};
19
14 20
15#endif 21#endif
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
index 13aee17b0475..8d10a9187693 100644
--- a/include/asm-arm/arch-ixp4xx/platform.h
+++ b/include/asm-arm/arch-ixp4xx/platform.h
@@ -90,6 +90,11 @@ struct ixp4xx_i2c_pins {
90struct sys_timer; 90struct sys_timer;
91 91
92/* 92/*
93 * Frequency of clock used for primary clocksource
94 */
95extern unsigned long ixp4xx_timer_freq;
96
97/*
93 * Functions used by platform-level setup code 98 * Functions used by platform-level setup code
94 */ 99 */
95extern void ixp4xx_map_io(void); 100extern void ixp4xx_map_io(void);
diff --git a/include/asm-arm/arch-omap/board-ams-delta.h b/include/asm-arm/arch-omap/board-ams-delta.h
index 0070f6d3b75c..9aee15d97145 100644
--- a/include/asm-arm/arch-omap/board-ams-delta.h
+++ b/include/asm-arm/arch-omap/board-ams-delta.h
@@ -50,9 +50,20 @@
50#define AMS_DELTA_LATCH2_NAND_NWE 0x0020 50#define AMS_DELTA_LATCH2_NAND_NWE 0x0020
51#define AMS_DELTA_LATCH2_NAND_ALE 0x0040 51#define AMS_DELTA_LATCH2_NAND_ALE 0x0040
52#define AMS_DELTA_LATCH2_NAND_CLE 0x0080 52#define AMS_DELTA_LATCH2_NAND_CLE 0x0080
53#define AMD_DELTA_LATCH2_KEYBRD_PWR 0x0100
54#define AMD_DELTA_LATCH2_KEYBRD_DATA 0x0200
55#define AMD_DELTA_LATCH2_SCARD_RSTIN 0x0400
56#define AMD_DELTA_LATCH2_SCARD_CMDVCC 0x0800
53#define AMS_DELTA_LATCH2_MODEM_NRESET 0x1000 57#define AMS_DELTA_LATCH2_MODEM_NRESET 0x1000
54#define AMS_DELTA_LATCH2_MODEM_CODEC 0x2000 58#define AMS_DELTA_LATCH2_MODEM_CODEC 0x2000
55 59
60#define AMS_DELTA_GPIO_PIN_KEYBRD_DATA 0
61#define AMS_DELTA_GPIO_PIN_KEYBRD_CLK 1
62#define AMS_DELTA_GPIO_PIN_MODEM_IRQ 2
63#define AMS_DELTA_GPIO_PIN_HOOK_SWITCH 4
64#define AMS_DELTA_GPIO_PIN_SCARD_NOFF 6
65#define AMS_DELTA_GPIO_PIN_SCARD_IO 7
66#define AMS_DELTA_GPIO_PIN_CONFIG 11
56#define AMS_DELTA_GPIO_PIN_NAND_RB 12 67#define AMS_DELTA_GPIO_PIN_NAND_RB 12
57 68
58#ifndef __ASSEMBLY__ 69#ifndef __ASSEMBLY__
diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h
index f83003f5287b..fa6881049903 100644
--- a/include/asm-arm/arch-omap/clock.h
+++ b/include/asm-arm/arch-omap/clock.h
@@ -45,6 +45,7 @@ struct clk_functions {
45 struct clk * (*clk_get_parent)(struct clk *clk); 45 struct clk * (*clk_get_parent)(struct clk *clk);
46 void (*clk_allow_idle)(struct clk *clk); 46 void (*clk_allow_idle)(struct clk *clk);
47 void (*clk_deny_idle)(struct clk *clk); 47 void (*clk_deny_idle)(struct clk *clk);
48 void (*clk_disable_unused)(struct clk *clk);
48}; 49};
49 50
50extern unsigned int mpurate; 51extern unsigned int mpurate;
diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h
index 1b1b02307e77..d591d0585bba 100644
--- a/include/asm-arm/arch-omap/dma.h
+++ b/include/asm-arm/arch-omap/dma.h
@@ -331,6 +331,12 @@ enum omap_dma_color_mode {
331 OMAP_DMA_TRANSPARENT_COPY 331 OMAP_DMA_TRANSPARENT_COPY
332}; 332};
333 333
334enum omap_dma_write_mode {
335 OMAP_DMA_WRITE_NON_POSTED = 0,
336 OMAP_DMA_WRITE_POSTED,
337 OMAP_DMA_WRITE_LAST_NON_POSTED
338};
339
334struct omap_dma_channel_params { 340struct omap_dma_channel_params {
335 int data_type; /* data type 8,16,32 */ 341 int data_type; /* data type 8,16,32 */
336 int elem_count; /* number of elements in a frame */ 342 int elem_count; /* number of elements in a frame */
@@ -338,13 +344,13 @@ struct omap_dma_channel_params {
338 344
339 int src_port; /* Only on OMAP1 REVISIT: Is this needed? */ 345 int src_port; /* Only on OMAP1 REVISIT: Is this needed? */
340 int src_amode; /* constant , post increment, indexed , double indexed */ 346 int src_amode; /* constant , post increment, indexed , double indexed */
341 int src_start; /* source address : physical */ 347 unsigned long src_start; /* source address : physical */
342 int src_ei; /* source element index */ 348 int src_ei; /* source element index */
343 int src_fi; /* source frame index */ 349 int src_fi; /* source frame index */
344 350
345 int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */ 351 int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */
346 int dst_amode; /* constant , post increment, indexed , double indexed */ 352 int dst_amode; /* constant , post increment, indexed , double indexed */
347 int dst_start; /* source address : physical */ 353 unsigned long dst_start; /* source address : physical */
348 int dst_ei; /* source element index */ 354 int dst_ei; /* source element index */
349 int dst_fi; /* source frame index */ 355 int dst_fi; /* source frame index */
350 356
@@ -356,7 +362,7 @@ struct omap_dma_channel_params {
356}; 362};
357 363
358 364
359extern void omap_set_dma_priority(int dst_port, int priority); 365extern void omap_set_dma_priority(int lch, int dst_port, int priority);
360extern int omap_request_dma(int dev_id, const char *dev_name, 366extern int omap_request_dma(int dev_id, const char *dev_name,
361 void (* callback)(int lch, u16 ch_status, void *data), 367 void (* callback)(int lch, u16 ch_status, void *data),
362 void *data, int *dma_ch); 368 void *data, int *dma_ch);
@@ -371,6 +377,7 @@ extern void omap_set_dma_transfer_params(int lch, int data_type,
371 int dma_trigger, int src_or_dst_synch); 377 int dma_trigger, int src_or_dst_synch);
372extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, 378extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
373 u32 color); 379 u32 color);
380extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode);
374 381
375extern void omap_set_dma_src_params(int lch, int src_port, int src_amode, 382extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
376 unsigned long src_start, 383 unsigned long src_start,
@@ -394,6 +401,9 @@ extern void omap_set_dma_params(int lch,
394extern void omap_dma_link_lch (int lch_head, int lch_queue); 401extern void omap_dma_link_lch (int lch_head, int lch_queue);
395extern void omap_dma_unlink_lch (int lch_head, int lch_queue); 402extern void omap_dma_unlink_lch (int lch_head, int lch_queue);
396 403
404extern int omap_set_dma_callback(int lch,
405 void (* callback)(int lch, u16 ch_status, void *data),
406 void *data);
397extern dma_addr_t omap_get_dma_src_pos(int lch); 407extern dma_addr_t omap_get_dma_src_pos(int lch);
398extern dma_addr_t omap_get_dma_dst_pos(int lch); 408extern dma_addr_t omap_get_dma_dst_pos(int lch);
399extern int omap_get_dma_src_addr_counter(int lch); 409extern int omap_get_dma_src_addr_counter(int lch);
diff --git a/include/asm-arm/arch-omap/dmtimer.h b/include/asm-arm/arch-omap/dmtimer.h
index 7a289ff07404..b5f3a71b899d 100644
--- a/include/asm-arm/arch-omap/dmtimer.h
+++ b/include/asm-arm/arch-omap/dmtimer.h
@@ -52,6 +52,8 @@ int omap_dm_timer_init(void);
52struct omap_dm_timer *omap_dm_timer_request(void); 52struct omap_dm_timer *omap_dm_timer_request(void);
53struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); 53struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
54void omap_dm_timer_free(struct omap_dm_timer *timer); 54void omap_dm_timer_free(struct omap_dm_timer *timer);
55void omap_dm_timer_enable(struct omap_dm_timer *timer);
56void omap_dm_timer_disable(struct omap_dm_timer *timer);
55 57
56int omap_dm_timer_get_irq(struct omap_dm_timer *timer); 58int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
57 59
diff --git a/include/asm-arm/arch-omap/gpmc.h b/include/asm-arm/arch-omap/gpmc.h
index 1a0a5207822d..7c03ef6c14c4 100644
--- a/include/asm-arm/arch-omap/gpmc.h
+++ b/include/asm-arm/arch-omap/gpmc.h
@@ -85,7 +85,7 @@ extern void gpmc_cs_write_reg(int cs, int idx, u32 val);
85extern u32 gpmc_cs_read_reg(int cs, int idx); 85extern u32 gpmc_cs_read_reg(int cs, int idx);
86extern int gpmc_cs_calc_divider(int cs, unsigned int sync_clk); 86extern int gpmc_cs_calc_divider(int cs, unsigned int sync_clk);
87extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); 87extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t);
88extern unsigned long gpmc_cs_get_base_addr(int cs); 88extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
89 89extern void gpmc_cs_free(int cs);
90 90
91#endif 91#endif
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h
index 2542495d8a43..c5bb05a69b81 100644
--- a/include/asm-arm/arch-omap/irqs.h
+++ b/include/asm-arm/arch-omap/irqs.h
@@ -237,6 +237,7 @@
237#define INT_24XX_SDMA_IRQ1 13 237#define INT_24XX_SDMA_IRQ1 13
238#define INT_24XX_SDMA_IRQ2 14 238#define INT_24XX_SDMA_IRQ2 14
239#define INT_24XX_SDMA_IRQ3 15 239#define INT_24XX_SDMA_IRQ3 15
240#define INT_24XX_CAM_IRQ 24
240#define INT_24XX_DSS_IRQ 25 241#define INT_24XX_DSS_IRQ 25
241#define INT_24XX_GPIO_BANK1 29 242#define INT_24XX_GPIO_BANK1 29
242#define INT_24XX_GPIO_BANK2 30 243#define INT_24XX_GPIO_BANK2 30
@@ -261,6 +262,7 @@
261#define INT_24XX_UART1_IRQ 72 262#define INT_24XX_UART1_IRQ 72
262#define INT_24XX_UART2_IRQ 73 263#define INT_24XX_UART2_IRQ 73
263#define INT_24XX_UART3_IRQ 74 264#define INT_24XX_UART3_IRQ 74
265#define INT_24XX_MMC_IRQ 83
264 266
265/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and 267/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
266 * 16 MPUIO lines */ 268 * 16 MPUIO lines */
diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h
index 679869c5e68f..828cc5c114e1 100644
--- a/include/asm-arm/arch-omap/mux.h
+++ b/include/asm-arm/arch-omap/mux.h
@@ -320,6 +320,17 @@ enum omap1xxx_index {
320 P15_1610_UWIRE_CS3, 320 P15_1610_UWIRE_CS3,
321 N15_1610_UWIRE_CS1, 321 N15_1610_UWIRE_CS1,
322 322
323 /* OMAP-1610 SPI */
324 U19_1610_SPIF_SCK,
325 U18_1610_SPIF_DIN,
326 P20_1610_SPIF_DIN,
327 W21_1610_SPIF_DOUT,
328 R18_1610_SPIF_DOUT,
329 N14_1610_SPIF_CS0,
330 N15_1610_SPIF_CS1,
331 T19_1610_SPIF_CS2,
332 P15_1610_SPIF_CS3,
333
323 /* OMAP-1610 Flash */ 334 /* OMAP-1610 Flash */
324 L3_1610_FLASH_CS2B_OE, 335 L3_1610_FLASH_CS2B_OE,
325 M8_1610_FLASH_CS2B_WE, 336 M8_1610_FLASH_CS2B_WE,
@@ -461,6 +472,20 @@ enum omap24xx_index {
461 K15_24XX_UART3_TX, 472 K15_24XX_UART3_TX,
462 K14_24XX_UART3_RX, 473 K14_24XX_UART3_RX,
463 474
475 /* MMC/SDIO */
476 G19_24XX_MMC_CLKO,
477 H18_24XX_MMC_CMD,
478 F20_24XX_MMC_DAT0,
479 H14_24XX_MMC_DAT1,
480 E19_24XX_MMC_DAT2,
481 D19_24XX_MMC_DAT3,
482 F19_24XX_MMC_DAT_DIR0,
483 E20_24XX_MMC_DAT_DIR1,
484 F18_24XX_MMC_DAT_DIR2,
485 E18_24XX_MMC_DAT_DIR3,
486 G18_24XX_MMC_CMD_DIR,
487 H15_24XX_MMC_CLKI,
488
464 /* Keypad GPIO*/ 489 /* Keypad GPIO*/
465 T19_24XX_KBR0, 490 T19_24XX_KBR0,
466 R19_24XX_KBR1, 491 R19_24XX_KBR1,
diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h
index ae7baa6c73f7..17f0c656d272 100644
--- a/include/asm-arm/elf.h
+++ b/include/asm-arm/elf.h
@@ -8,9 +8,6 @@
8 8
9#include <asm/ptrace.h> 9#include <asm/ptrace.h>
10#include <asm/user.h> 10#include <asm/user.h>
11#ifdef __KERNEL
12#include <asm/procinfo.h>
13#endif
14 11
15typedef unsigned long elf_greg_t; 12typedef unsigned long elf_greg_t;
16typedef unsigned long elf_freg_t[3]; 13typedef unsigned long elf_freg_t[3];
@@ -32,11 +29,6 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG];
32typedef struct user_fp elf_fpregset_t; 29typedef struct user_fp elf_fpregset_t;
33 30
34/* 31/*
35 * This is used to ensure we don't load something for the wrong architecture.
36 */
37#define elf_check_arch(x) ( ((x)->e_machine == EM_ARM) && (ELF_PROC_OK((x))) )
38
39/*
40 * These are used to set parameters in the core dumps. 32 * These are used to set parameters in the core dumps.
41 */ 33 */
42#define ELF_CLASS ELFCLASS32 34#define ELF_CLASS ELFCLASS32
@@ -47,6 +39,14 @@ typedef struct user_fp elf_fpregset_t;
47#endif 39#endif
48#define ELF_ARCH EM_ARM 40#define ELF_ARCH EM_ARM
49 41
42#ifdef __KERNEL__
43#include <asm/procinfo.h>
44
45/*
46 * This is used to ensure we don't load something for the wrong architecture.
47 */
48#define elf_check_arch(x) ( ((x)->e_machine == EM_ARM) && (ELF_PROC_OK((x))) )
49
50#define USE_ELF_CORE_DUMP 50#define USE_ELF_CORE_DUMP
51#define ELF_EXEC_PAGESIZE 4096 51#define ELF_EXEC_PAGESIZE 4096
52 52
@@ -83,8 +83,6 @@ typedef struct user_fp elf_fpregset_t;
83extern char elf_platform[]; 83extern char elf_platform[];
84#define ELF_PLATFORM (elf_platform) 84#define ELF_PLATFORM (elf_platform)
85 85
86#ifdef __KERNEL__
87
88/* 86/*
89 * 32-bit code is always OK. Some cpus can do 26-bit, some can't. 87 * 32-bit code is always OK. Some cpus can do 26-bit, some can't.
90 */ 88 */
diff --git a/include/asm-arm/hardware/locomo.h b/include/asm-arm/hardware/locomo.h
index 22dfb1737768..adab77780ed3 100644
--- a/include/asm-arm/hardware/locomo.h
+++ b/include/asm-arm/hardware/locomo.h
@@ -54,17 +54,18 @@
54#define LOCOMO_DAC_SDAOEB 0x01 /* SDA pin output data */ 54#define LOCOMO_DAC_SDAOEB 0x01 /* SDA pin output data */
55 55
56/* SPI interface */ 56/* SPI interface */
57#define LOCOMO_SPIMD 0x60 /* SPI mode setting */ 57#define LOCOMO_SPI 0x60
58#define LOCOMO_SPICT 0x64 /* SPI mode control */ 58#define LOCOMO_SPIMD 0x00 /* SPI mode setting */
59#define LOCOMO_SPIST 0x68 /* SPI status */ 59#define LOCOMO_SPICT 0x04 /* SPI mode control */
60#define LOCOMO_SPIIS 0x70 /* SPI interrupt status */ 60#define LOCOMO_SPIST 0x08 /* SPI status */
61#define LOCOMO_SPIWE 0x74 /* SPI interrupt status write enable */ 61#define LOCOMO_SPIIS 0x10 /* SPI interrupt status */
62#define LOCOMO_SPIIE 0x78 /* SPI interrupt enable */ 62#define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */
63#define LOCOMO_SPIIR 0x7c /* SPI interrupt request */ 63#define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */
64#define LOCOMO_SPITD 0x80 /* SPI transfer data write */ 64#define LOCOMO_SPIIR 0x1c /* SPI interrupt request */
65#define LOCOMO_SPIRD 0x84 /* SPI receive data read */ 65#define LOCOMO_SPITD 0x20 /* SPI transfer data write */
66#define LOCOMO_SPITS 0x88 /* SPI transfer data shift */ 66#define LOCOMO_SPIRD 0x24 /* SPI receive data read */
67#define LOCOMO_SPIRS 0x8C /* SPI receive data shift */ 67#define LOCOMO_SPITS 0x28 /* SPI transfer data shift */
68#define LOCOMO_SPIRS 0x2C /* SPI receive data shift */
68#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */ 69#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */
69#define LOCOMO_SPI_OVRN (1 << 2) /* Over Run bit */ 70#define LOCOMO_SPI_OVRN (1 << 2) /* Over Run bit */
70#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */ 71#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */
@@ -161,6 +162,7 @@ extern struct bus_type locomo_bus_type;
161#define LOCOMO_DEVID_AUDIO 3 162#define LOCOMO_DEVID_AUDIO 3
162#define LOCOMO_DEVID_LED 4 163#define LOCOMO_DEVID_LED 4
163#define LOCOMO_DEVID_UART 5 164#define LOCOMO_DEVID_UART 5
165#define LOCOMO_DEVID_SPI 6
164 166
165struct locomo_dev { 167struct locomo_dev {
166 struct device dev; 168 struct device dev;
@@ -197,10 +199,11 @@ int locomo_driver_register(struct locomo_driver *);
197void locomo_driver_unregister(struct locomo_driver *); 199void locomo_driver_unregister(struct locomo_driver *);
198 200
199/* GPIO control functions */ 201/* GPIO control functions */
200void locomo_gpio_set_dir(struct locomo_dev *ldev, unsigned int bits, unsigned int dir); 202void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir);
201unsigned int locomo_gpio_read_level(struct locomo_dev *ldev, unsigned int bits); 203int locomo_gpio_read_level(struct device *dev, unsigned int bits);
202unsigned int locomo_gpio_read_output(struct locomo_dev *ldev, unsigned int bits); 204int locomo_gpio_read_output(struct device *dev, unsigned int bits);
203void locomo_gpio_write(struct locomo_dev *ldev, unsigned int bits, unsigned int set); 205void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set);
206
204 207
205/* M62332 control function */ 208/* M62332 control function */
206void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel); 209void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel);
diff --git a/include/asm-arm/hardware/sharpsl_pm.h b/include/asm-arm/hardware/sharpsl_pm.h
index ecf15b83956f..a836e76a14f7 100644
--- a/include/asm-arm/hardware/sharpsl_pm.h
+++ b/include/asm-arm/hardware/sharpsl_pm.h
@@ -25,6 +25,7 @@ struct sharpsl_charger_machinfo {
25 void (*measure_temp)(int); 25 void (*measure_temp)(int);
26 void (*presuspend)(void); 26 void (*presuspend)(void);
27 void (*postsuspend)(void); 27 void (*postsuspend)(void);
28 void (*earlyresume)(void);
28 unsigned long (*read_devdata)(int); 29 unsigned long (*read_devdata)(int);
29#define SHARPSL_BATT_VOLT 1 30#define SHARPSL_BATT_VOLT 1
30#define SHARPSL_BATT_TEMP 2 31#define SHARPSL_BATT_TEMP 2
diff --git a/include/asm-arm/mach/time.h b/include/asm-arm/mach/time.h
index dee0bc336fe8..1eb93f5c0d6c 100644
--- a/include/asm-arm/mach/time.h
+++ b/include/asm-arm/mach/time.h
@@ -38,7 +38,9 @@ struct sys_timer {
38 void (*init)(void); 38 void (*init)(void);
39 void (*suspend)(void); 39 void (*suspend)(void);
40 void (*resume)(void); 40 void (*resume)(void);
41#ifndef CONFIG_GENERIC_TIME
41 unsigned long (*offset)(void); 42 unsigned long (*offset)(void);
43#endif
42 44
43#ifdef CONFIG_NO_IDLE_HZ 45#ifdef CONFIG_NO_IDLE_HZ
44 struct dyn_tick_timer *dyn_tick; 46 struct dyn_tick_timer *dyn_tick;
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index af9c3fe7588c..7e85db77d99b 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -11,13 +11,13 @@
11#define _ASMARM_PAGE_H 11#define _ASMARM_PAGE_H
12 12
13 13
14#ifdef __KERNEL__
15
14/* PAGE_SHIFT determines the page size */ 16/* PAGE_SHIFT determines the page size */
15#define PAGE_SHIFT 12 17#define PAGE_SHIFT 12
16#define PAGE_SIZE (1UL << PAGE_SHIFT) 18#define PAGE_SIZE (1UL << PAGE_SHIFT)
17#define PAGE_MASK (~(PAGE_SIZE-1)) 19#define PAGE_MASK (~(PAGE_SIZE-1))
18 20
19#ifdef __KERNEL__
20
21/* to align the pointer to the (next) page boundary */ 21/* to align the pointer to the (next) page boundary */
22#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) 22#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
23 23
diff --git a/include/asm-arm/timeofday.h b/include/asm-arm/timeofday.h
new file mode 100644
index 000000000000..27254bd5b94f
--- /dev/null
+++ b/include/asm-arm/timeofday.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_ARM_TIMEOFDAY_H
2#define _ASM_ARM_TIMEOFDAY_H
3#include <asm-generic/timeofday.h>
4#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-13 12:56:05 -0500