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-rw-r--r--include/asm-arm/arch-pxa/entry-macro.S2
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h3
-rw-r--r--include/asm-arm/arch-pxa/regs-ssp.h1
-rw-r--r--include/asm-arm/kexec.h2
-rw-r--r--include/asm-arm/mach/arch.h2
-rw-r--r--include/asm-arm/unaligned.h8
6 files changed, 11 insertions, 7 deletions
diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S
index b7e730851461..c145bb01bc8f 100644
--- a/include/asm-arm/arch-pxa/entry-macro.S
+++ b/include/asm-arm/arch-pxa/entry-macro.S
@@ -35,7 +35,7 @@
351004: 351004:
36 mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2 36 mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2
37 mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2 37 mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2
38 ands \irqstat, \irqstat, \irqnr 38 ands \irqnr, \irqstat, \irqnr
39 beq 1003f 39 beq 1003f
40 rsb \irqstat, \irqnr, #0 40 rsb \irqstat, \irqnr, #0
41 and \irqstat, \irqstat, \irqnr 41 and \irqstat, \irqstat, \irqnr
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index ac175b4d10cb..2357a73340d4 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -520,6 +520,9 @@
520#define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ 520#define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
521 521
522#define GCR __REG(0x4050000C) /* Global Control Register */ 522#define GCR __REG(0x4050000C) /* Global Control Register */
523#ifdef CONFIG_PXA3xx
524#define GCR_CLKBPB (1 << 31) /* Internal clock enable */
525#endif
523#define GCR_nDMAEN (1 << 24) /* non DMA Enable */ 526#define GCR_nDMAEN (1 << 24) /* non DMA Enable */
524#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */ 527#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */
525#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */ 528#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */
diff --git a/include/asm-arm/arch-pxa/regs-ssp.h b/include/asm-arm/arch-pxa/regs-ssp.h
index 991cb688db75..0255328c3c18 100644
--- a/include/asm-arm/arch-pxa/regs-ssp.h
+++ b/include/asm-arm/arch-pxa/regs-ssp.h
@@ -85,6 +85,7 @@
85#define SSCR1_RSRE (1 << 20) /* Receive Service Request Enable */ 85#define SSCR1_RSRE (1 << 20) /* Receive Service Request Enable */
86#define SSCR1_TINTE (1 << 19) /* Receiver Time-out Interrupt enable */ 86#define SSCR1_TINTE (1 << 19) /* Receiver Time-out Interrupt enable */
87#define SSCR1_PINTE (1 << 18) /* Peripheral Trailing Byte Interupt Enable */ 87#define SSCR1_PINTE (1 << 18) /* Peripheral Trailing Byte Interupt Enable */
88#define SSCR1_IFS (1 << 16) /* Invert Frame Signal */
88#define SSCR1_STRF (1 << 15) /* Select FIFO or EFWR */ 89#define SSCR1_STRF (1 << 15) /* Select FIFO or EFWR */
89#define SSCR1_EFWR (1 << 14) /* Enable FIFO Write/Read */ 90#define SSCR1_EFWR (1 << 14) /* Enable FIFO Write/Read */
90 91
diff --git a/include/asm-arm/kexec.h b/include/asm-arm/kexec.h
index 1ee17b6951d0..47fe34d692da 100644
--- a/include/asm-arm/kexec.h
+++ b/include/asm-arm/kexec.h
@@ -8,7 +8,7 @@
8/* Maximum address we can reach in physical address mode */ 8/* Maximum address we can reach in physical address mode */
9#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) 9#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL)
10/* Maximum address we can use for the control code buffer */ 10/* Maximum address we can use for the control code buffer */
11#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE 11#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL)
12 12
13#define KEXEC_CONTROL_CODE_SIZE 4096 13#define KEXEC_CONTROL_CODE_SIZE 4096
14 14
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index c59fad18e73b..bcc8aed7c9a9 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -17,7 +17,7 @@ struct sys_timer;
17struct machine_desc { 17struct machine_desc {
18 /* 18 /*
19 * Note! The first four elements are used 19 * Note! The first four elements are used
20 * by assembler code in head-armv.S 20 * by assembler code in head.S, head-common.S
21 */ 21 */
22 unsigned int nr; /* architecture number */ 22 unsigned int nr; /* architecture number */
23 unsigned int phys_io; /* start of physical io */ 23 unsigned int phys_io; /* start of physical io */
diff --git a/include/asm-arm/unaligned.h b/include/asm-arm/unaligned.h
index 8431f6eed5c6..5db03cf3b905 100644
--- a/include/asm-arm/unaligned.h
+++ b/include/asm-arm/unaligned.h
@@ -40,16 +40,16 @@ extern int __bug_unaligned_x(const void *ptr);
40 */ 40 */
41 41
42#define __get_unaligned_2_le(__p) \ 42#define __get_unaligned_2_le(__p) \
43 (__p[0] | __p[1] << 8) 43 (unsigned int)(__p[0] | __p[1] << 8)
44 44
45#define __get_unaligned_2_be(__p) \ 45#define __get_unaligned_2_be(__p) \
46 (__p[0] << 8 | __p[1]) 46 (unsigned int)(__p[0] << 8 | __p[1])
47 47
48#define __get_unaligned_4_le(__p) \ 48#define __get_unaligned_4_le(__p) \
49 (__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24) 49 (unsigned int)(__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24)
50 50
51#define __get_unaligned_4_be(__p) \ 51#define __get_unaligned_4_be(__p) \
52 (__p[0] << 24 | __p[1] << 16 | __p[2] << 8 | __p[3]) 52 (unsigned int)(__p[0] << 24 | __p[1] << 16 | __p[2] << 8 | __p[3])
53 53
54#define __get_unaligned_8_le(__p) \ 54#define __get_unaligned_8_le(__p) \
55 ((unsigned long long)__get_unaligned_4_le((__p+4)) << 32 | \ 55 ((unsigned long long)__get_unaligned_4_le((__p+4)) << 32 | \