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-rw-r--r--include/asm-arm/arch-pxa/gpio.h48
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h13
2 files changed, 33 insertions, 28 deletions
diff --git a/include/asm-arm/arch-pxa/gpio.h b/include/asm-arm/arch-pxa/gpio.h
index 9dbc2dc794f7..bdbf5f9ffdd5 100644
--- a/include/asm-arm/arch-pxa/gpio.h
+++ b/include/asm-arm/arch-pxa/gpio.h
@@ -28,43 +28,35 @@
28#include <asm/irq.h> 28#include <asm/irq.h>
29#include <asm/hardware.h> 29#include <asm/hardware.h>
30 30
31static inline int gpio_request(unsigned gpio, const char *label) 31#include <asm-generic/gpio.h>
32{
33 return 0;
34}
35 32
36static inline void gpio_free(unsigned gpio)
37{
38 return;
39}
40 33
41extern int gpio_direction_input(unsigned gpio); 34/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
42extern int gpio_direction_output(unsigned gpio, int value); 35 * Those cases currently cause holes in the GPIO number space.
36 */
37#define NR_BUILTIN_GPIO 128
43 38
44static inline int __gpio_get_value(unsigned gpio) 39static inline int gpio_get_value(unsigned gpio)
45{ 40{
46 return GPLR(gpio) & GPIO_bit(gpio); 41 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
42 return GPLR(gpio) & GPIO_bit(gpio);
43 else
44 return __gpio_get_value(gpio);
47} 45}
48 46
49#define gpio_get_value(gpio) \ 47static inline void gpio_set_value(unsigned gpio, int value)
50 (__builtin_constant_p(gpio) ? \
51 __gpio_get_value(gpio) : \
52 pxa_gpio_get_value(gpio))
53
54static inline void __gpio_set_value(unsigned gpio, int value)
55{ 48{
56 if (value) 49 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
57 GPSR(gpio) = GPIO_bit(gpio); 50 if (value)
58 else 51 GPSR(gpio) = GPIO_bit(gpio);
59 GPCR(gpio) = GPIO_bit(gpio); 52 else
53 GPCR(gpio) = GPIO_bit(gpio);
54 } else {
55 __gpio_set_value(gpio, value);
56 }
60} 57}
61 58
62#define gpio_set_value(gpio,value) \ 59#define gpio_cansleep __gpio_cansleep
63 (__builtin_constant_p(gpio) ? \
64 __gpio_set_value(gpio, value) : \
65 pxa_gpio_set_value(gpio, value))
66
67#include <asm-generic/gpio.h> /* cansleep wrappers */
68 60
69#define gpio_to_irq(gpio) IRQ_GPIO(gpio) 61#define gpio_to_irq(gpio) IRQ_GPIO(gpio)
70#define irq_to_gpio(irq) IRQ_TO_GPIO(irq) 62#define irq_to_gpio(irq) IRQ_TO_GPIO(irq)
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 16ed24dbda4e..ac175b4d10cb 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1131,6 +1131,19 @@
1131 * General Purpose I/O 1131 * General Purpose I/O
1132 */ 1132 */
1133 1133
1134#define GPIO0_BASE ((void __iomem *)io_p2v(0x40E00000))
1135#define GPIO1_BASE ((void __iomem *)io_p2v(0x40E00004))
1136#define GPIO2_BASE ((void __iomem *)io_p2v(0x40E00008))
1137#define GPIO3_BASE ((void __iomem *)io_p2v(0x40E00100))
1138
1139#define GPLR_OFFSET 0x00
1140#define GPDR_OFFSET 0x0C
1141#define GPSR_OFFSET 0x18
1142#define GPCR_OFFSET 0x24
1143#define GRER_OFFSET 0x30
1144#define GFER_OFFSET 0x3C
1145#define GEDR_OFFSET 0x48
1146
1134#define GPLR0 __REG(0x40E00000) /* GPIO Pin-Level Register GPIO<31:0> */ 1147#define GPLR0 __REG(0x40E00000) /* GPIO Pin-Level Register GPIO<31:0> */
1135#define GPLR1 __REG(0x40E00004) /* GPIO Pin-Level Register GPIO<63:32> */ 1148#define GPLR1 __REG(0x40E00004) /* GPIO Pin-Level Register GPIO<63:32> */
1136#define GPLR2 __REG(0x40E00008) /* GPIO Pin-Level Register GPIO<80:64> */ 1149#define GPLR2 __REG(0x40E00008) /* GPIO Pin-Level Register GPIO<80:64> */