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-rw-r--r--include/asm-arm/arch-at91/at91_ecc.h38
-rw-r--r--include/asm-arm/arch-at91/board.h4
-rw-r--r--include/asm-arm/arch-pnx4008/irqs.h48
-rw-r--r--include/asm-arm/arch-pxa/idp.h10
-rw-r--r--include/asm-arm/arch-pxa/pcm990_baseboard.h14
-rw-r--r--include/asm-arm/arch-pxa/pxa25x-udc.h2
-rw-r--r--include/asm-arm/arch-sa1100/ide.h2
-rw-r--r--include/asm-arm/bitops.h9
-rw-r--r--include/asm-arm/cacheflush.h21
-rw-r--r--include/asm-arm/dma-mapping.h2
-rw-r--r--include/asm-arm/irq.h17
-rw-r--r--include/asm-arm/namei.h25
-rw-r--r--include/asm-arm/pci.h8
13 files changed, 72 insertions, 128 deletions
diff --git a/include/asm-arm/arch-at91/at91_ecc.h b/include/asm-arm/arch-at91/at91_ecc.h
deleted file mode 100644
index 1e5a8caca2d1..000000000000
--- a/include/asm-arm/arch-at91/at91_ecc.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * include/asm-arm/arch-at91/at91_ecc.h
3 *
4 * Error Corrected Code Controller (ECC) - System peripherals regsters.
5 * Based on AT91SAM9260 datasheet revision B.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#ifndef AT91_ECC_H
14#define AT91_ECC_H
15
16#define AT91_ECC_CR 0x00 /* Control register */
17#define AT91_ECC_RST (1 << 0) /* Reset parity */
18
19#define AT91_ECC_MR 0x04 /* Mode register */
20#define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */
21#define AT91_ECC_PAGESIZE_528 (0)
22#define AT91_ECC_PAGESIZE_1056 (1)
23#define AT91_ECC_PAGESIZE_2112 (2)
24#define AT91_ECC_PAGESIZE_4224 (3)
25
26#define AT91_ECC_SR 0x08 /* Status register */
27#define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */
28#define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */
29#define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */
30
31#define AT91_ECC_PR 0x0c /* Parity register */
32#define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */
33#define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */
34
35#define AT91_ECC_NPR 0x10 /* NParity register */
36#define AT91_ECC_NPARITY (0xffff << 0) /* NParity */
37
38#endif
diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h
index 94de788da76e..48bbd854f57d 100644
--- a/include/asm-arm/arch-at91/board.h
+++ b/include/asm-arm/arch-at91/board.h
@@ -89,7 +89,7 @@ struct at91_usbh_data {
89extern void __init at91_add_device_usbh(struct at91_usbh_data *data); 89extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
90 90
91 /* NAND / SmartMedia */ 91 /* NAND / SmartMedia */
92struct at91_nand_data { 92struct atmel_nand_data {
93 u8 enable_pin; /* chip enable */ 93 u8 enable_pin; /* chip enable */
94 u8 det_pin; /* card detect */ 94 u8 det_pin; /* card detect */
95 u8 rdy_pin; /* ready/busy */ 95 u8 rdy_pin; /* ready/busy */
@@ -98,7 +98,7 @@ struct at91_nand_data {
98 u8 bus_width_16; /* buswidth is 16 bit */ 98 u8 bus_width_16; /* buswidth is 16 bit */
99 struct mtd_partition* (*partition_info)(int, int*); 99 struct mtd_partition* (*partition_info)(int, int*);
100}; 100};
101extern void __init at91_add_device_nand(struct at91_nand_data *data); 101extern void __init at91_add_device_nand(struct atmel_nand_data *data);
102 102
103 /* I2C*/ 103 /* I2C*/
104extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices); 104extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices);
diff --git a/include/asm-arm/arch-pnx4008/irqs.h b/include/asm-arm/arch-pnx4008/irqs.h
index 13ec7ed0f501..a25d18f2d87a 100644
--- a/include/asm-arm/arch-pnx4008/irqs.h
+++ b/include/asm-arm/arch-pnx4008/irqs.h
@@ -135,30 +135,30 @@
135 135
136#define PNX4008_IRQ_TYPES \ 136#define PNX4008_IRQ_TYPES \
137{ /*IRQ #'s: */ \ 137{ /*IRQ #'s: */ \
138IRQT_LOW, IRQT_LOW, IRQT_LOW, IRQT_HIGH, /* 0, 1, 2, 3 */ \ 138IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 0, 1, 2, 3 */ \
139IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 4, 5, 6, 7 */ \ 139IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 4, 5, 6, 7 */ \
140IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 8, 9,10,11 */ \ 140IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 8, 9,10,11 */ \
141IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 12,13,14,15 */ \ 141IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 12,13,14,15 */ \
142IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 16,17,18,19 */ \ 142IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 16,17,18,19 */ \
143IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 20,21,22,23 */ \ 143IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 20,21,22,23 */ \
144IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 24,25,26,27 */ \ 144IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 24,25,26,27 */ \
145IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 28,29,30,31 */ \ 145IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 28,29,30,31 */ \
146IRQT_HIGH, IRQT_LOW, IRQT_HIGH, IRQT_HIGH, /* 32,33,34,35 */ \ 146IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 32,33,34,35 */ \
147IRQT_HIGH, IRQT_HIGH, IRQT_FALLING, IRQT_HIGH, /* 36,37,38,39 */ \ 147IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH, /* 36,37,38,39 */ \
148IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 40,41,42,43 */ \ 148IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 40,41,42,43 */ \
149IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 44,45,46,47 */ \ 149IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 44,45,46,47 */ \
150IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 48,49,50,51 */ \ 150IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 48,49,50,51 */ \
151IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 52,53,54,55 */ \ 151IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 52,53,54,55 */ \
152IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_HIGH, /* 56,57,58,59 */ \ 152IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 56,57,58,59 */ \
153IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 60,61,62,63 */ \ 153IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 60,61,62,63 */ \
154IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 64,65,66,67 */ \ 154IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 64,65,66,67 */ \
155IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 68,69,70,71 */ \ 155IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 68,69,70,71 */ \
156IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 72,73,74,75 */ \ 156IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 72,73,74,75 */ \
157IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 76,77,78,79 */ \ 157IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 76,77,78,79 */ \
158IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 80,81,82,83 */ \ 158IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 80,81,82,83 */ \
159IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 84,85,86,87 */ \ 159IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 84,85,86,87 */ \
160IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 88,89,90,91 */ \ 160IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 88,89,90,91 */ \
161IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 92,93,94,95 */ \ 161IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 92,93,94,95 */ \
162} 162}
163 163
164/* Start Enable Pin Interrupts - table 58 page 66 */ 164/* Start Enable Pin Interrupts - table 58 page 66 */
diff --git a/include/asm-arm/arch-pxa/idp.h b/include/asm-arm/arch-pxa/idp.h
index b6952534a4e1..21aa8ac35c1c 100644
--- a/include/asm-arm/arch-pxa/idp.h
+++ b/include/asm-arm/arch-pxa/idp.h
@@ -138,18 +138,18 @@
138#define TOUCH_PANEL_IRQ IRQ_GPIO(5) 138#define TOUCH_PANEL_IRQ IRQ_GPIO(5)
139#define IDE_IRQ IRQ_GPIO(21) 139#define IDE_IRQ IRQ_GPIO(21)
140 140
141#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING 141#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
142 142
143#define ETHERNET_IRQ IRQ_GPIO(4) 143#define ETHERNET_IRQ IRQ_GPIO(4)
144#define ETHERNET_IRQ_EDGE IRQT_RISING 144#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
145 145
146#define IDE_IRQ_EDGE IRQT_RISING 146#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
147 147
148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) 148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7)
149#define PCMCIA_S0_CD_VALID_EDGE IRQT_BOTHEDGE 149#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
150 150
151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) 151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8)
152#define PCMCIA_S1_CD_VALID_EDGE IRQT_BOTHEDGE 152#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
153 153
154#define PCMCIA_S0_RDYINT IRQ_GPIO(19) 154#define PCMCIA_S0_RDYINT IRQ_GPIO(19)
155#define PCMCIA_S1_RDYINT IRQ_GPIO(22) 155#define PCMCIA_S1_RDYINT IRQ_GPIO(22)
diff --git a/include/asm-arm/arch-pxa/pcm990_baseboard.h b/include/asm-arm/arch-pxa/pcm990_baseboard.h
index b699d0d7bdb2..2e2013179063 100644
--- a/include/asm-arm/arch-pxa/pcm990_baseboard.h
+++ b/include/asm-arm/arch-pxa/pcm990_baseboard.h
@@ -29,14 +29,14 @@
29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ 29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
30#define PCM990_CTRL_INT_IRQ_GPIO 9 30#define PCM990_CTRL_INT_IRQ_GPIO 9
31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) 31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO)
32#define PCM990_CTRL_INT_IRQ_EDGE IRQT_RISING 32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ 33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
34#define PCM990_CTRL_BASE 0xea000000 34#define PCM990_CTRL_BASE 0xea000000
35#define PCM990_CTRL_SIZE (1*1024*1024) 35#define PCM990_CTRL_SIZE (1*1024*1024)
36 36
37#define PCM990_CTRL_PWR_IRQ_GPIO 14 37#define PCM990_CTRL_PWR_IRQ_GPIO 14
38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) 38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO)
39#define PCM990_CTRL_PWR_IRQ_EDGE IRQT_RISING 39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
40 40
41/* visible CPLD (U7) registers */ 41/* visible CPLD (U7) registers */
42#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ 42#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */
@@ -133,7 +133,7 @@
133 */ 133 */
134#define PCM990_IDE_IRQ_GPIO 13 134#define PCM990_IDE_IRQ_GPIO 13
135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) 135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO)
136#define PCM990_IDE_IRQ_EDGE IRQT_RISING 136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ 137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
138#define PCM990_IDE_PLD_BASE 0xee000000 138#define PCM990_IDE_PLD_BASE 0xee000000
139#define PCM990_IDE_PLD_SIZE (1*1024*1024) 139#define PCM990_IDE_PLD_SIZE (1*1024*1024)
@@ -189,11 +189,11 @@
189 */ 189 */
190#define PCM990_CF_IRQ_GPIO 11 190#define PCM990_CF_IRQ_GPIO 11
191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) 191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO)
192#define PCM990_CF_IRQ_EDGE IRQT_RISING 192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
193 193
194#define PCM990_CF_CD_GPIO 12 194#define PCM990_CF_CD_GPIO 12
195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) 195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO)
196#define PCM990_CF_CD_EDGE IRQT_RISING 196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
197 197
198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ 198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
199#define PCM990_CF_PLD_BASE 0xef000000 199#define PCM990_CF_PLD_BASE 0xef000000
@@ -259,14 +259,14 @@
259 */ 259 */
260#define PCM990_AC97_IRQ_GPIO 10 260#define PCM990_AC97_IRQ_GPIO 10
261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) 261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO)
262#define PCM990_AC97_IRQ_EDGE IRQT_RISING 262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
263 263
264/* 264/*
265 * MMC phyCORE 265 * MMC phyCORE
266 */ 266 */
267#define PCM990_MMC0_IRQ_GPIO 9 267#define PCM990_MMC0_IRQ_GPIO 9
268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) 268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO)
269#define PCM990_MMC0_IRQ_EDGE IRQT_FALLING 269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
270 270
271/* 271/*
272 * USB phyCore 272 * USB phyCore
diff --git a/include/asm-arm/arch-pxa/pxa25x-udc.h b/include/asm-arm/arch-pxa/pxa25x-udc.h
index 840305916b6d..1b80a4805a60 100644
--- a/include/asm-arm/arch-pxa/pxa25x-udc.h
+++ b/include/asm-arm/arch-pxa/pxa25x-udc.h
@@ -2,7 +2,7 @@
2#define _ASM_ARCH_PXA25X_UDC_H 2#define _ASM_ARCH_PXA25X_UDC_H
3 3
4#ifdef _ASM_ARCH_PXA27X_UDC_H 4#ifdef _ASM_ARCH_PXA27X_UDC_H
5#error You can't include both PXA25x and PXA27x UDC support 5#error "You can't include both PXA25x and PXA27x UDC support"
6#endif 6#endif
7 7
8#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */ 8#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */
diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h
index b14cbda01dc3..193f6c15f4dd 100644
--- a/include/asm-arm/arch-sa1100/ide.h
+++ b/include/asm-arm/arch-sa1100/ide.h
@@ -61,7 +61,7 @@ ide_init_default_hwifs(void)
61 61
62 /* Enable GPIO as interrupt line */ 62 /* Enable GPIO as interrupt line */
63 GPDR &= ~LART_GPIO_IDE; 63 GPDR &= ~LART_GPIO_IDE;
64 set_irq_type(LART_IRQ_IDE, IRQT_RISING); 64 set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING);
65 65
66 /* set PCMCIA interface timing */ 66 /* set PCMCIA interface timing */
67 MECR = 0x00060006; 67 MECR = 0x00060006;
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h
index 5c60bfc1a84d..9a1db20e032a 100644
--- a/include/asm-arm/bitops.h
+++ b/include/asm-arm/bitops.h
@@ -277,9 +277,16 @@ static inline int constant_fls(int x)
277 * the clz instruction for much better code efficiency. 277 * the clz instruction for much better code efficiency.
278 */ 278 */
279 279
280#define fls(x) \ 280#define __fls(x) \
281 ( __builtin_constant_p(x) ? constant_fls(x) : \ 281 ( __builtin_constant_p(x) ? constant_fls(x) : \
282 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) ) 282 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
283
284/* Implement fls() in C so that 64-bit args are suitably truncated */
285static inline int fls(int x)
286{
287 return __fls(x);
288}
289
283#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) 290#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
284#define __ffs(x) (ffs(x) - 1) 291#define __ffs(x) (ffs(x) - 1)
285#define ffz(x) __ffs( ~(x) ) 292#define ffz(x) __ffs( ~(x) )
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index 70b0fe724b62..e68a1cbcc852 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -424,9 +424,9 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
424} 424}
425 425
426#define flush_dcache_mmap_lock(mapping) \ 426#define flush_dcache_mmap_lock(mapping) \
427 write_lock_irq(&(mapping)->tree_lock) 427 spin_lock_irq(&(mapping)->tree_lock)
428#define flush_dcache_mmap_unlock(mapping) \ 428#define flush_dcache_mmap_unlock(mapping) \
429 write_unlock_irq(&(mapping)->tree_lock) 429 spin_unlock_irq(&(mapping)->tree_lock)
430 430
431#define flush_icache_user_range(vma,page,addr,len) \ 431#define flush_icache_user_range(vma,page,addr,len) \
432 flush_dcache_page(page) 432 flush_dcache_page(page)
@@ -459,15 +459,19 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
459#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0) 459#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0)
460 460
461#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT) 461#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT)
462 462/*
463 * VIVT caches only
464 */
463#define cache_is_vivt() 1 465#define cache_is_vivt() 1
464#define cache_is_vipt() 0 466#define cache_is_vipt() 0
465#define cache_is_vipt_nonaliasing() 0 467#define cache_is_vipt_nonaliasing() 0
466#define cache_is_vipt_aliasing() 0 468#define cache_is_vipt_aliasing() 0
467#define icache_is_vivt_asid_tagged() 0 469#define icache_is_vivt_asid_tagged() 0
468 470
469#elif defined(CONFIG_CPU_CACHE_VIPT) 471#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT)
470 472/*
473 * VIPT caches only
474 */
471#define cache_is_vivt() 0 475#define cache_is_vivt() 0
472#define cache_is_vipt() 1 476#define cache_is_vipt() 1
473#define cache_is_vipt_nonaliasing() \ 477#define cache_is_vipt_nonaliasing() \
@@ -489,7 +493,12 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
489 }) 493 })
490 494
491#else 495#else
492 496/*
497 * VIVT or VIPT caches. Note that this is unreliable since ARM926
498 * and V6 CPUs satisfy the "(val & (15 << 25)) == (14 << 25)" test.
499 * There's no way to tell from the CacheType register what type (!)
500 * the cache is.
501 */
493#define cache_is_vivt() \ 502#define cache_is_vivt() \
494 ({ \ 503 ({ \
495 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ 504 unsigned int __val = read_cpuid(CPUID_CACHETYPE); \
diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h
index e99406a7bece..f41335ba6337 100644
--- a/include/asm-arm/dma-mapping.h
+++ b/include/asm-arm/dma-mapping.h
@@ -56,7 +56,7 @@ static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
56/* 56/*
57 * DMA errors are defined by all-bits-set in the DMA address. 57 * DMA errors are defined by all-bits-set in the DMA address.
58 */ 58 */
59static inline int dma_mapping_error(dma_addr_t dma_addr) 59static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
60{ 60{
61 return dma_addr == ~0; 61 return dma_addr == ~0;
62} 62}
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index 1b882a255e35..9cb01907e43b 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -19,23 +19,6 @@
19#define NO_IRQ ((unsigned int)(-1)) 19#define NO_IRQ ((unsigned int)(-1))
20#endif 20#endif
21 21
22
23/*
24 * Migration helpers
25 */
26#define __IRQT_FALEDGE IRQ_TYPE_EDGE_FALLING
27#define __IRQT_RISEDGE IRQ_TYPE_EDGE_RISING
28#define __IRQT_LOWLVL IRQ_TYPE_LEVEL_LOW
29#define __IRQT_HIGHLVL IRQ_TYPE_LEVEL_HIGH
30
31#define IRQT_NOEDGE (0)
32#define IRQT_RISING (__IRQT_RISEDGE)
33#define IRQT_FALLING (__IRQT_FALEDGE)
34#define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE)
35#define IRQT_LOW (__IRQT_LOWLVL)
36#define IRQT_HIGH (__IRQT_HIGHLVL)
37#define IRQT_PROBE IRQ_TYPE_PROBE
38
39#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
40struct irqaction; 23struct irqaction;
41extern void migrate_irqs(void); 24extern void migrate_irqs(void);
diff --git a/include/asm-arm/namei.h b/include/asm-arm/namei.h
deleted file mode 100644
index a402d3b9d0f7..000000000000
--- a/include/asm-arm/namei.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * linux/include/asm-arm/namei.h
3 *
4 * Routines to handle famous /usr/gnemul
5 * Derived from the Sparc version of this file
6 *
7 * Included from linux/fs/namei.c
8 */
9
10#ifndef __ASMARM_NAMEI_H
11#define __ASMARM_NAMEI_H
12
13#define ARM_BSD_EMUL "usr/gnemul/bsd/"
14
15static inline char *__emul_prefix(void)
16{
17 switch (current->personality) {
18 case PER_BSD:
19 return ARM_BSD_EMUL;
20 default:
21 return NULL;
22 }
23}
24
25#endif /* __ASMARM_NAMEI_H */
diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h
index 75feb1574a69..2d84792f2e12 100644
--- a/include/asm-arm/pci.h
+++ b/include/asm-arm/pci.h
@@ -78,6 +78,14 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res)
78 return root; 78 return root;
79} 79}
80 80
81/*
82 * Dummy implementation; always return 0.
83 */
84static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
85{
86 return 0;
87}
88
81#endif /* __KERNEL__ */ 89#endif /* __KERNEL__ */
82 90
83#endif 91#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-14 20:19:34 -0500