diff options
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-omap/gpmc.h | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/include/asm-arm/arch-omap/gpmc.h b/include/asm-arm/arch-omap/gpmc.h new file mode 100644 index 000000000000..1a0a5207822d --- /dev/null +++ b/include/asm-arm/arch-omap/gpmc.h | |||
@@ -0,0 +1,91 @@ | |||
1 | /* | ||
2 | * General-Purpose Memory Controller for OMAP2 | ||
3 | * | ||
4 | * Copyright (C) 2005-2006 Nokia Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __OMAP2_GPMC_H | ||
12 | #define __OMAP2_GPMC_H | ||
13 | |||
14 | #define GPMC_CS_CONFIG1 0x00 | ||
15 | #define GPMC_CS_CONFIG2 0x04 | ||
16 | #define GPMC_CS_CONFIG3 0x08 | ||
17 | #define GPMC_CS_CONFIG4 0x0c | ||
18 | #define GPMC_CS_CONFIG5 0x10 | ||
19 | #define GPMC_CS_CONFIG6 0x14 | ||
20 | #define GPMC_CS_CONFIG7 0x18 | ||
21 | #define GPMC_CS_NAND_COMMAND 0x1c | ||
22 | #define GPMC_CS_NAND_ADDRESS 0x20 | ||
23 | #define GPMC_CS_NAND_DATA 0x24 | ||
24 | |||
25 | #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) | ||
26 | #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 20) | ||
27 | #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) | ||
28 | #define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) | ||
29 | #define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27) | ||
30 | #define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27) | ||
31 | #define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25) | ||
32 | #define GPMC_CONFIG1_PAGE_LEN(val) ((val & 3) << 23) | ||
33 | #define GPMC_CONFIG1_WAIT_READ_MON (1 << 22) | ||
34 | #define GPMC_CONFIG1_WAIT_WRITE_MON (1 << 21) | ||
35 | #define GPMC_CONFIG1_WAIT_MON_IIME(val) ((val & 3) << 18) | ||
36 | #define GPMC_CONFIG1_WAIT_PIN_SEL(val) ((val & 3) << 16) | ||
37 | #define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12) | ||
38 | #define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1) | ||
39 | #define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10) | ||
40 | #define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0) | ||
41 | #define GPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(1) | ||
42 | #define GPMC_CONFIG1_MUXADDDATA (1 << 9) | ||
43 | #define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4) | ||
44 | #define GPMC_CONFIG1_FCLK_DIV(val) (val & 3) | ||
45 | #define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1)) | ||
46 | #define GPMC_CONFIG1_FCLK_DIV3 (GPMC_CONFIG1_FCLK_DIV(2)) | ||
47 | #define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3)) | ||
48 | |||
49 | /* | ||
50 | * Note that all values in this struct are in nanoseconds, while | ||
51 | * the register values are in gpmc_fck cycles. | ||
52 | */ | ||
53 | struct gpmc_timings { | ||
54 | /* Minimum clock period for synchronous mode */ | ||
55 | u16 sync_clk; | ||
56 | |||
57 | /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */ | ||
58 | u16 cs_on; /* Assertion time */ | ||
59 | u16 cs_rd_off; /* Read deassertion time */ | ||
60 | u16 cs_wr_off; /* Write deassertion time */ | ||
61 | |||
62 | /* ADV signal timings corresponding to GPMC_CONFIG3 */ | ||
63 | u16 adv_on; /* Assertion time */ | ||
64 | u16 adv_rd_off; /* Read deassertion time */ | ||
65 | u16 adv_wr_off; /* Write deassertion time */ | ||
66 | |||
67 | /* WE signals timings corresponding to GPMC_CONFIG4 */ | ||
68 | u16 we_on; /* WE assertion time */ | ||
69 | u16 we_off; /* WE deassertion time */ | ||
70 | |||
71 | /* OE signals timings corresponding to GPMC_CONFIG4 */ | ||
72 | u16 oe_on; /* OE assertion time */ | ||
73 | u16 oe_off; /* OE deassertion time */ | ||
74 | |||
75 | /* Access time and cycle time timings corresponding to GPMC_CONFIG5 */ | ||
76 | u16 page_burst_access; /* Multiple access word delay */ | ||
77 | u16 access; /* Start-cycle to first data valid delay */ | ||
78 | u16 rd_cycle; /* Total read cycle time */ | ||
79 | u16 wr_cycle; /* Total write cycle time */ | ||
80 | }; | ||
81 | |||
82 | extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); | ||
83 | |||
84 | extern void gpmc_cs_write_reg(int cs, int idx, u32 val); | ||
85 | extern u32 gpmc_cs_read_reg(int cs, int idx); | ||
86 | extern int gpmc_cs_calc_divider(int cs, unsigned int sync_clk); | ||
87 | extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); | ||
88 | extern unsigned long gpmc_cs_get_base_addr(int cs); | ||
89 | |||
90 | |||
91 | #endif | ||