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-rw-r--r--include/asm-arm/arch-at91/at91_dbgu.h13
-rw-r--r--include/asm-arm/arch-at91/uncompress.h4
2 files changed, 14 insertions, 3 deletions
diff --git a/include/asm-arm/arch-at91/at91_dbgu.h b/include/asm-arm/arch-at91/at91_dbgu.h
index b0369e176f7b..8019ffd0ad3b 100644
--- a/include/asm-arm/arch-at91/at91_dbgu.h
+++ b/include/asm-arm/arch-at91/at91_dbgu.h
@@ -16,6 +16,7 @@
16#ifndef AT91_DBGU_H 16#ifndef AT91_DBGU_H
17#define AT91_DBGU_H 17#define AT91_DBGU_H
18 18
19#ifdef AT91_DBGU
19#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */ 20#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */
20#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */ 21#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */
21#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */ 22#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */
@@ -30,6 +31,15 @@
30 31
31#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ 32#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */
32#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ 33#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */
34#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */
35#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
36
37#endif /* AT91_DBGU */
38
39/*
40 * Some AT91 parts that don't have full DEBUG units still support the ID
41 * and extensions register.
42 */
33#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */ 43#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */
34#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */ 44#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */
35#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ 45#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */
@@ -53,7 +63,4 @@
53#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ 63#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
54#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ 64#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */
55 65
56#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */
57#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
58
59#endif 66#endif
diff --git a/include/asm-arm/arch-at91/uncompress.h b/include/asm-arm/arch-at91/uncompress.h
index 30ac587b3b41..272a7e0dc6cf 100644
--- a/include/asm-arm/arch-at91/uncompress.h
+++ b/include/asm-arm/arch-at91/uncompress.h
@@ -33,20 +33,24 @@
33 */ 33 */
34static void putc(int c) 34static void putc(int c)
35{ 35{
36#ifdef AT91_DBGU
36 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ 37 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
37 38
38 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) 39 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY))
39 barrier(); 40 barrier();
40 __raw_writel(c, sys + AT91_DBGU_THR); 41 __raw_writel(c, sys + AT91_DBGU_THR);
42#endif
41} 43}
42 44
43static inline void flush(void) 45static inline void flush(void)
44{ 46{
47#ifdef AT91_DBGU
45 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ 48 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
46 49
47 /* wait for transmission to complete */ 50 /* wait for transmission to complete */
48 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) 51 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
49 barrier(); 52 barrier();
53#endif
50} 54}
51 55
52#define arch_decomp_setup() 56#define arch_decomp_setup()