diff options
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/plat-s3c/debug-macro.S | 75 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c/regs-serial.h | 232 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c/regs-timer.h | 115 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c/uncompress.h | 2 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c24xx/cpu.h | 54 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c24xx/devs.h | 49 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c24xx/irq.h | 109 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c24xx/pm.h | 73 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c24xx/s3c2400.h | 31 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c24xx/s3c2410.h | 31 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c24xx/s3c2440.h | 17 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c24xx/s3c2442.h | 17 | ||||
-rw-r--r-- | include/asm-arm/plat-s3c24xx/s3c2443.h | 32 |
13 files changed, 1 insertions, 836 deletions
diff --git a/include/asm-arm/plat-s3c/debug-macro.S b/include/asm-arm/plat-s3c/debug-macro.S deleted file mode 100644 index 84c40b847da8..000000000000 --- a/include/asm-arm/plat-s3c/debug-macro.S +++ /dev/null | |||
@@ -1,75 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c/debug-macro.S | ||
2 | * | ||
3 | * Copyright 2005, 2007 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <asm/plat-s3c/regs-serial.h> | ||
13 | |||
14 | /* The S3C2440 implementations are used by default as they are the | ||
15 | * most widely re-used */ | ||
16 | |||
17 | .macro fifo_level_s3c2440 rd, rx | ||
18 | ldr \rd, [ \rx, # S3C2410_UFSTAT ] | ||
19 | and \rd, \rd, #S3C2440_UFSTAT_TXMASK | ||
20 | .endm | ||
21 | |||
22 | #ifndef fifo_level | ||
23 | #define fifo_level fifo_level_s3c2410 | ||
24 | #endif | ||
25 | |||
26 | .macro fifo_full_s3c2440 rd, rx | ||
27 | ldr \rd, [ \rx, # S3C2410_UFSTAT ] | ||
28 | tst \rd, #S3C2440_UFSTAT_TXFULL | ||
29 | .endm | ||
30 | |||
31 | #ifndef fifo_full | ||
32 | #define fifo_full fifo_full_s3c2440 | ||
33 | #endif | ||
34 | |||
35 | .macro senduart,rd,rx | ||
36 | strb \rd, [\rx, # S3C2410_UTXH ] | ||
37 | .endm | ||
38 | |||
39 | .macro busyuart, rd, rx | ||
40 | ldr \rd, [ \rx, # S3C2410_UFCON ] | ||
41 | tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? | ||
42 | beq 1001f @ | ||
43 | @ FIFO enabled... | ||
44 | 1003: | ||
45 | fifo_full \rd, \rx | ||
46 | bne 1003b | ||
47 | b 1002f | ||
48 | |||
49 | 1001: | ||
50 | @ busy waiting for non fifo | ||
51 | ldr \rd, [ \rx, # S3C2410_UTRSTAT ] | ||
52 | tst \rd, #S3C2410_UTRSTAT_TXFE | ||
53 | beq 1001b | ||
54 | |||
55 | 1002: @ exit busyuart | ||
56 | .endm | ||
57 | |||
58 | .macro waituart,rd,rx | ||
59 | ldr \rd, [ \rx, # S3C2410_UFCON ] | ||
60 | tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? | ||
61 | beq 1001f @ | ||
62 | @ FIFO enabled... | ||
63 | 1003: | ||
64 | fifo_level \rd, \rx | ||
65 | teq \rd, #0 | ||
66 | bne 1003b | ||
67 | b 1002f | ||
68 | 1001: | ||
69 | @ idle waiting for non fifo | ||
70 | ldr \rd, [ \rx, # S3C2410_UTRSTAT ] | ||
71 | tst \rd, #S3C2410_UTRSTAT_TXFE | ||
72 | beq 1001b | ||
73 | |||
74 | 1002: @ exit busyuart | ||
75 | .endm | ||
diff --git a/include/asm-arm/plat-s3c/regs-serial.h b/include/asm-arm/plat-s3c/regs-serial.h deleted file mode 100644 index a0daa647b92c..000000000000 --- a/include/asm-arm/plat-s3c/regs-serial.h +++ /dev/null | |||
@@ -1,232 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/regs-serial.h | ||
2 | * | ||
3 | * From linux/include/asm-arm/hardware/serial_s3c2410.h | ||
4 | * | ||
5 | * Internal header file for Samsung S3C2410 serial ports (UART0-2) | ||
6 | * | ||
7 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
8 | * | ||
9 | * Additional defines, (c) 2003 Simtec Electronics (linux@simtec.co.uk) | ||
10 | * | ||
11 | * Adapted from: | ||
12 | * | ||
13 | * Internal header file for MX1ADS serial ports (UART1 & 2) | ||
14 | * | ||
15 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
16 | * | ||
17 | * This program is free software; you can redistribute it and/or modify | ||
18 | * it under the terms of the GNU General Public License as published by | ||
19 | * the Free Software Foundation; either version 2 of the License, or | ||
20 | * (at your option) any later version. | ||
21 | * | ||
22 | * This program is distributed in the hope that it will be useful, | ||
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
25 | * GNU General Public License for more details. | ||
26 | * | ||
27 | * You should have received a copy of the GNU General Public License | ||
28 | * along with this program; if not, write to the Free Software | ||
29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
30 | */ | ||
31 | |||
32 | #ifndef __ASM_ARM_REGS_SERIAL_H | ||
33 | #define __ASM_ARM_REGS_SERIAL_H | ||
34 | |||
35 | #define S3C24XX_VA_UART0 (S3C_VA_UART) | ||
36 | #define S3C24XX_VA_UART1 (S3C_VA_UART + 0x4000 ) | ||
37 | #define S3C24XX_VA_UART2 (S3C_VA_UART + 0x8000 ) | ||
38 | #define S3C24XX_VA_UART3 (S3C_VA_UART + 0xC000 ) | ||
39 | |||
40 | #define S3C2410_PA_UART0 (S3C24XX_PA_UART) | ||
41 | #define S3C2410_PA_UART1 (S3C24XX_PA_UART + 0x4000 ) | ||
42 | #define S3C2410_PA_UART2 (S3C24XX_PA_UART + 0x8000 ) | ||
43 | #define S3C2443_PA_UART3 (S3C24XX_PA_UART + 0xC000 ) | ||
44 | |||
45 | #define S3C2410_URXH (0x24) | ||
46 | #define S3C2410_UTXH (0x20) | ||
47 | #define S3C2410_ULCON (0x00) | ||
48 | #define S3C2410_UCON (0x04) | ||
49 | #define S3C2410_UFCON (0x08) | ||
50 | #define S3C2410_UMCON (0x0C) | ||
51 | #define S3C2410_UBRDIV (0x28) | ||
52 | #define S3C2410_UTRSTAT (0x10) | ||
53 | #define S3C2410_UERSTAT (0x14) | ||
54 | #define S3C2410_UFSTAT (0x18) | ||
55 | #define S3C2410_UMSTAT (0x1C) | ||
56 | |||
57 | #define S3C2410_LCON_CFGMASK ((0xF<<3)|(0x3)) | ||
58 | |||
59 | #define S3C2410_LCON_CS5 (0x0) | ||
60 | #define S3C2410_LCON_CS6 (0x1) | ||
61 | #define S3C2410_LCON_CS7 (0x2) | ||
62 | #define S3C2410_LCON_CS8 (0x3) | ||
63 | #define S3C2410_LCON_CSMASK (0x3) | ||
64 | |||
65 | #define S3C2410_LCON_PNONE (0x0) | ||
66 | #define S3C2410_LCON_PEVEN (0x5 << 3) | ||
67 | #define S3C2410_LCON_PODD (0x4 << 3) | ||
68 | #define S3C2410_LCON_PMASK (0x7 << 3) | ||
69 | |||
70 | #define S3C2410_LCON_STOPB (1<<2) | ||
71 | #define S3C2410_LCON_IRM (1<<6) | ||
72 | |||
73 | #define S3C2440_UCON_CLKMASK (3<<10) | ||
74 | #define S3C2440_UCON_PCLK (0<<10) | ||
75 | #define S3C2440_UCON_UCLK (1<<10) | ||
76 | #define S3C2440_UCON_PCLK2 (2<<10) | ||
77 | #define S3C2440_UCON_FCLK (3<<10) | ||
78 | #define S3C2443_UCON_EPLL (3<<10) | ||
79 | |||
80 | #define S3C2440_UCON2_FCLK_EN (1<<15) | ||
81 | #define S3C2440_UCON0_DIVMASK (15 << 12) | ||
82 | #define S3C2440_UCON1_DIVMASK (15 << 12) | ||
83 | #define S3C2440_UCON2_DIVMASK (7 << 12) | ||
84 | #define S3C2440_UCON_DIVSHIFT (12) | ||
85 | |||
86 | #define S3C2412_UCON_CLKMASK (3<<10) | ||
87 | #define S3C2412_UCON_UCLK (1<<10) | ||
88 | #define S3C2412_UCON_USYSCLK (3<<10) | ||
89 | #define S3C2412_UCON_PCLK (0<<10) | ||
90 | #define S3C2412_UCON_PCLK2 (2<<10) | ||
91 | |||
92 | #define S3C2410_UCON_UCLK (1<<10) | ||
93 | #define S3C2410_UCON_SBREAK (1<<4) | ||
94 | |||
95 | #define S3C2410_UCON_TXILEVEL (1<<9) | ||
96 | #define S3C2410_UCON_RXILEVEL (1<<8) | ||
97 | #define S3C2410_UCON_TXIRQMODE (1<<2) | ||
98 | #define S3C2410_UCON_RXIRQMODE (1<<0) | ||
99 | #define S3C2410_UCON_RXFIFO_TOI (1<<7) | ||
100 | #define S3C2443_UCON_RXERR_IRQEN (1<<6) | ||
101 | #define S3C2443_UCON_LOOPBACK (1<<5) | ||
102 | |||
103 | #define S3C2410_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
104 | S3C2410_UCON_RXILEVEL | \ | ||
105 | S3C2410_UCON_TXIRQMODE | \ | ||
106 | S3C2410_UCON_RXIRQMODE | \ | ||
107 | S3C2410_UCON_RXFIFO_TOI) | ||
108 | |||
109 | #define S3C2410_UFCON_FIFOMODE (1<<0) | ||
110 | #define S3C2410_UFCON_TXTRIG0 (0<<6) | ||
111 | #define S3C2410_UFCON_RXTRIG8 (1<<4) | ||
112 | #define S3C2410_UFCON_RXTRIG12 (2<<4) | ||
113 | |||
114 | /* S3C2440 FIFO trigger levels */ | ||
115 | #define S3C2440_UFCON_RXTRIG1 (0<<4) | ||
116 | #define S3C2440_UFCON_RXTRIG8 (1<<4) | ||
117 | #define S3C2440_UFCON_RXTRIG16 (2<<4) | ||
118 | #define S3C2440_UFCON_RXTRIG32 (3<<4) | ||
119 | |||
120 | #define S3C2440_UFCON_TXTRIG0 (0<<6) | ||
121 | #define S3C2440_UFCON_TXTRIG16 (1<<6) | ||
122 | #define S3C2440_UFCON_TXTRIG32 (2<<6) | ||
123 | #define S3C2440_UFCON_TXTRIG48 (3<<6) | ||
124 | |||
125 | #define S3C2410_UFCON_RESETBOTH (3<<1) | ||
126 | #define S3C2410_UFCON_RESETTX (1<<2) | ||
127 | #define S3C2410_UFCON_RESETRX (1<<1) | ||
128 | |||
129 | #define S3C2410_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
130 | S3C2410_UFCON_TXTRIG0 | \ | ||
131 | S3C2410_UFCON_RXTRIG8 ) | ||
132 | |||
133 | #define S3C2410_UMCOM_AFC (1<<4) | ||
134 | #define S3C2410_UMCOM_RTS_LOW (1<<0) | ||
135 | |||
136 | #define S3C2412_UMCON_AFC_63 (0<<5) /* same as s3c2443 */ | ||
137 | #define S3C2412_UMCON_AFC_56 (1<<5) | ||
138 | #define S3C2412_UMCON_AFC_48 (2<<5) | ||
139 | #define S3C2412_UMCON_AFC_40 (3<<5) | ||
140 | #define S3C2412_UMCON_AFC_32 (4<<5) | ||
141 | #define S3C2412_UMCON_AFC_24 (5<<5) | ||
142 | #define S3C2412_UMCON_AFC_16 (6<<5) | ||
143 | #define S3C2412_UMCON_AFC_8 (7<<5) | ||
144 | |||
145 | #define S3C2410_UFSTAT_TXFULL (1<<9) | ||
146 | #define S3C2410_UFSTAT_RXFULL (1<<8) | ||
147 | #define S3C2410_UFSTAT_TXMASK (15<<4) | ||
148 | #define S3C2410_UFSTAT_TXSHIFT (4) | ||
149 | #define S3C2410_UFSTAT_RXMASK (15<<0) | ||
150 | #define S3C2410_UFSTAT_RXSHIFT (0) | ||
151 | |||
152 | /* UFSTAT S3C2443 same as S3C2440 */ | ||
153 | #define S3C2440_UFSTAT_TXFULL (1<<14) | ||
154 | #define S3C2440_UFSTAT_RXFULL (1<<6) | ||
155 | #define S3C2440_UFSTAT_TXSHIFT (8) | ||
156 | #define S3C2440_UFSTAT_RXSHIFT (0) | ||
157 | #define S3C2440_UFSTAT_TXMASK (63<<8) | ||
158 | #define S3C2440_UFSTAT_RXMASK (63) | ||
159 | |||
160 | #define S3C2410_UTRSTAT_TXE (1<<2) | ||
161 | #define S3C2410_UTRSTAT_TXFE (1<<1) | ||
162 | #define S3C2410_UTRSTAT_RXDR (1<<0) | ||
163 | |||
164 | #define S3C2410_UERSTAT_OVERRUN (1<<0) | ||
165 | #define S3C2410_UERSTAT_FRAME (1<<2) | ||
166 | #define S3C2410_UERSTAT_BREAK (1<<3) | ||
167 | #define S3C2443_UERSTAT_PARITY (1<<1) | ||
168 | |||
169 | #define S3C2410_UERSTAT_ANY (S3C2410_UERSTAT_OVERRUN | \ | ||
170 | S3C2410_UERSTAT_FRAME | \ | ||
171 | S3C2410_UERSTAT_BREAK) | ||
172 | |||
173 | #define S3C2410_UMSTAT_CTS (1<<0) | ||
174 | #define S3C2410_UMSTAT_DeltaCTS (1<<2) | ||
175 | |||
176 | #define S3C2443_DIVSLOT (0x2C) | ||
177 | |||
178 | #ifndef __ASSEMBLY__ | ||
179 | |||
180 | /* struct s3c24xx_uart_clksrc | ||
181 | * | ||
182 | * this structure defines a named clock source that can be used for the | ||
183 | * uart, so that the best clock can be selected for the requested baud | ||
184 | * rate. | ||
185 | * | ||
186 | * min_baud and max_baud define the range of baud-rates this clock is | ||
187 | * acceptable for, if they are both zero, it is assumed any baud rate that | ||
188 | * can be generated from this clock will be used. | ||
189 | * | ||
190 | * divisor gives the divisor from the clock to the one seen by the uart | ||
191 | */ | ||
192 | |||
193 | struct s3c24xx_uart_clksrc { | ||
194 | const char *name; | ||
195 | unsigned int divisor; | ||
196 | unsigned int min_baud; | ||
197 | unsigned int max_baud; | ||
198 | }; | ||
199 | |||
200 | /* configuration structure for per-machine configurations for the | ||
201 | * serial port | ||
202 | * | ||
203 | * the pointer is setup by the machine specific initialisation from the | ||
204 | * arch/arm/mach-s3c2410/ directory. | ||
205 | */ | ||
206 | |||
207 | struct s3c2410_uartcfg { | ||
208 | unsigned char hwport; /* hardware port number */ | ||
209 | unsigned char unused; | ||
210 | unsigned short flags; | ||
211 | upf_t uart_flags; /* default uart flags */ | ||
212 | |||
213 | unsigned long ucon; /* value of ucon for port */ | ||
214 | unsigned long ulcon; /* value of ulcon for port */ | ||
215 | unsigned long ufcon; /* value of ufcon for port */ | ||
216 | |||
217 | struct s3c24xx_uart_clksrc *clocks; | ||
218 | unsigned int clocks_size; | ||
219 | }; | ||
220 | |||
221 | /* s3c24xx_uart_devs | ||
222 | * | ||
223 | * this is exported from the core as we cannot use driver_register(), | ||
224 | * or platform_add_device() before the console_initcall() | ||
225 | */ | ||
226 | |||
227 | extern struct platform_device *s3c24xx_uart_devs[3]; | ||
228 | |||
229 | #endif /* __ASSEMBLY__ */ | ||
230 | |||
231 | #endif /* __ASM_ARM_REGS_SERIAL_H */ | ||
232 | |||
diff --git a/include/asm-arm/plat-s3c/regs-timer.h b/include/asm-arm/plat-s3c/regs-timer.h deleted file mode 100644 index cc0eedd53e38..000000000000 --- a/include/asm-arm/plat-s3c/regs-timer.h +++ /dev/null | |||
@@ -1,115 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/regs-timer.h | ||
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://www.simtec.co.uk/products/SWLINUX/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2410 Timer configuration | ||
11 | */ | ||
12 | |||
13 | |||
14 | #ifndef __ASM_ARCH_REGS_TIMER_H | ||
15 | #define __ASM_ARCH_REGS_TIMER_H | ||
16 | |||
17 | #define S3C_TIMERREG(x) (S3C_VA_TIMER + (x)) | ||
18 | #define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c)) | ||
19 | |||
20 | #define S3C2410_TCFG0 S3C_TIMERREG(0x00) | ||
21 | #define S3C2410_TCFG1 S3C_TIMERREG(0x04) | ||
22 | #define S3C2410_TCON S3C_TIMERREG(0x08) | ||
23 | |||
24 | #define S3C2410_TCFG_PRESCALER0_MASK (255<<0) | ||
25 | #define S3C2410_TCFG_PRESCALER1_MASK (255<<8) | ||
26 | #define S3C2410_TCFG_PRESCALER1_SHIFT (8) | ||
27 | #define S3C2410_TCFG_DEADZONE_MASK (255<<16) | ||
28 | #define S3C2410_TCFG_DEADZONE_SHIFT (16) | ||
29 | |||
30 | #define S3C2410_TCFG1_MUX4_DIV2 (0<<16) | ||
31 | #define S3C2410_TCFG1_MUX4_DIV4 (1<<16) | ||
32 | #define S3C2410_TCFG1_MUX4_DIV8 (2<<16) | ||
33 | #define S3C2410_TCFG1_MUX4_DIV16 (3<<16) | ||
34 | #define S3C2410_TCFG1_MUX4_TCLK1 (4<<16) | ||
35 | #define S3C2410_TCFG1_MUX4_MASK (15<<16) | ||
36 | #define S3C2410_TCFG1_MUX4_SHIFT (16) | ||
37 | |||
38 | #define S3C2410_TCFG1_MUX3_DIV2 (0<<12) | ||
39 | #define S3C2410_TCFG1_MUX3_DIV4 (1<<12) | ||
40 | #define S3C2410_TCFG1_MUX3_DIV8 (2<<12) | ||
41 | #define S3C2410_TCFG1_MUX3_DIV16 (3<<12) | ||
42 | #define S3C2410_TCFG1_MUX3_TCLK1 (4<<12) | ||
43 | #define S3C2410_TCFG1_MUX3_MASK (15<<12) | ||
44 | |||
45 | |||
46 | #define S3C2410_TCFG1_MUX2_DIV2 (0<<8) | ||
47 | #define S3C2410_TCFG1_MUX2_DIV4 (1<<8) | ||
48 | #define S3C2410_TCFG1_MUX2_DIV8 (2<<8) | ||
49 | #define S3C2410_TCFG1_MUX2_DIV16 (3<<8) | ||
50 | #define S3C2410_TCFG1_MUX2_TCLK1 (4<<8) | ||
51 | #define S3C2410_TCFG1_MUX2_MASK (15<<8) | ||
52 | |||
53 | |||
54 | #define S3C2410_TCFG1_MUX1_DIV2 (0<<4) | ||
55 | #define S3C2410_TCFG1_MUX1_DIV4 (1<<4) | ||
56 | #define S3C2410_TCFG1_MUX1_DIV8 (2<<4) | ||
57 | #define S3C2410_TCFG1_MUX1_DIV16 (3<<4) | ||
58 | #define S3C2410_TCFG1_MUX1_TCLK0 (4<<4) | ||
59 | #define S3C2410_TCFG1_MUX1_MASK (15<<4) | ||
60 | |||
61 | #define S3C2410_TCFG1_MUX0_DIV2 (0<<0) | ||
62 | #define S3C2410_TCFG1_MUX0_DIV4 (1<<0) | ||
63 | #define S3C2410_TCFG1_MUX0_DIV8 (2<<0) | ||
64 | #define S3C2410_TCFG1_MUX0_DIV16 (3<<0) | ||
65 | #define S3C2410_TCFG1_MUX0_TCLK0 (4<<0) | ||
66 | #define S3C2410_TCFG1_MUX0_MASK (15<<0) | ||
67 | |||
68 | #define S3C2410_TCFG1_MUX_DIV2 (0<<0) | ||
69 | #define S3C2410_TCFG1_MUX_DIV4 (1<<0) | ||
70 | #define S3C2410_TCFG1_MUX_DIV8 (2<<0) | ||
71 | #define S3C2410_TCFG1_MUX_DIV16 (3<<0) | ||
72 | #define S3C2410_TCFG1_MUX_TCLK (4<<0) | ||
73 | #define S3C2410_TCFG1_MUX_MASK (15<<0) | ||
74 | |||
75 | #define S3C2410_TCFG1_SHIFT(x) ((x) * 4) | ||
76 | |||
77 | /* for each timer, we have an count buffer, an compare buffer and | ||
78 | * an observation buffer | ||
79 | */ | ||
80 | |||
81 | /* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */ | ||
82 | |||
83 | #define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00) | ||
84 | #define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04) | ||
85 | #define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08)) | ||
86 | |||
87 | #define S3C2410_TCON_T4RELOAD (1<<22) | ||
88 | #define S3C2410_TCON_T4MANUALUPD (1<<21) | ||
89 | #define S3C2410_TCON_T4START (1<<20) | ||
90 | |||
91 | #define S3C2410_TCON_T3RELOAD (1<<19) | ||
92 | #define S3C2410_TCON_T3INVERT (1<<18) | ||
93 | #define S3C2410_TCON_T3MANUALUPD (1<<17) | ||
94 | #define S3C2410_TCON_T3START (1<<16) | ||
95 | |||
96 | #define S3C2410_TCON_T2RELOAD (1<<15) | ||
97 | #define S3C2410_TCON_T2INVERT (1<<14) | ||
98 | #define S3C2410_TCON_T2MANUALUPD (1<<13) | ||
99 | #define S3C2410_TCON_T2START (1<<12) | ||
100 | |||
101 | #define S3C2410_TCON_T1RELOAD (1<<11) | ||
102 | #define S3C2410_TCON_T1INVERT (1<<10) | ||
103 | #define S3C2410_TCON_T1MANUALUPD (1<<9) | ||
104 | #define S3C2410_TCON_T1START (1<<8) | ||
105 | |||
106 | #define S3C2410_TCON_T0DEADZONE (1<<4) | ||
107 | #define S3C2410_TCON_T0RELOAD (1<<3) | ||
108 | #define S3C2410_TCON_T0INVERT (1<<2) | ||
109 | #define S3C2410_TCON_T0MANUALUPD (1<<1) | ||
110 | #define S3C2410_TCON_T0START (1<<0) | ||
111 | |||
112 | #endif /* __ASM_ARCH_REGS_TIMER_H */ | ||
113 | |||
114 | |||
115 | |||
diff --git a/include/asm-arm/plat-s3c/uncompress.h b/include/asm-arm/plat-s3c/uncompress.h index 19b9eda39485..4df006b9cc10 100644 --- a/include/asm-arm/plat-s3c/uncompress.h +++ b/include/asm-arm/plat-s3c/uncompress.h | |||
@@ -27,7 +27,7 @@ static void arch_detect_cpu(void); | |||
27 | 27 | ||
28 | /* defines for UART registers */ | 28 | /* defines for UART registers */ |
29 | 29 | ||
30 | #include <asm/plat-s3c/regs-serial.h> | 30 | #include <plat/regs-serial.h> |
31 | #include <asm/plat-s3c/regs-watchdog.h> | 31 | #include <asm/plat-s3c/regs-watchdog.h> |
32 | 32 | ||
33 | /* working in physical space... */ | 33 | /* working in physical space... */ |
diff --git a/include/asm-arm/plat-s3c24xx/cpu.h b/include/asm-arm/plat-s3c24xx/cpu.h deleted file mode 100644 index 23e420e8bd5b..000000000000 --- a/include/asm-arm/plat-s3c24xx/cpu.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/cpu.h | ||
2 | * | ||
3 | * Copyright (c) 2004-2005 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Header file for S3C24XX CPU support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* todo - fix when rmk changes iodescs to use `void __iomem *` */ | ||
14 | |||
15 | #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } | ||
16 | |||
17 | #ifndef MHZ | ||
18 | #define MHZ (1000*1000) | ||
19 | #endif | ||
20 | |||
21 | #define print_mhz(m) ((m) / MHZ), ((m / 1000) % 1000) | ||
22 | |||
23 | /* forward declaration */ | ||
24 | struct s3c24xx_uart_resources; | ||
25 | struct platform_device; | ||
26 | struct s3c2410_uartcfg; | ||
27 | struct map_desc; | ||
28 | |||
29 | /* core initialisation functions */ | ||
30 | |||
31 | extern void s3c24xx_init_irq(void); | ||
32 | |||
33 | extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); | ||
34 | |||
35 | extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
36 | |||
37 | extern void s3c24xx_init_clocks(int xtal); | ||
38 | |||
39 | extern void s3c24xx_init_uartdevs(char *name, | ||
40 | struct s3c24xx_uart_resources *res, | ||
41 | struct s3c2410_uartcfg *cfg, int no); | ||
42 | |||
43 | /* timer for 2410/2440 */ | ||
44 | |||
45 | struct sys_timer; | ||
46 | extern struct sys_timer s3c24xx_timer; | ||
47 | |||
48 | /* system device classes */ | ||
49 | |||
50 | extern struct sysdev_class s3c2410_sysclass; | ||
51 | extern struct sysdev_class s3c2412_sysclass; | ||
52 | extern struct sysdev_class s3c2440_sysclass; | ||
53 | extern struct sysdev_class s3c2442_sysclass; | ||
54 | extern struct sysdev_class s3c2443_sysclass; | ||
diff --git a/include/asm-arm/plat-s3c24xx/devs.h b/include/asm-arm/plat-s3c24xx/devs.h deleted file mode 100644 index badaac9d64a8..000000000000 --- a/include/asm-arm/plat-s3c24xx/devs.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/devs.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Header file for s3c2410 standard platform devices | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | #include <linux/platform_device.h> | ||
13 | |||
14 | struct s3c24xx_uart_resources { | ||
15 | struct resource *resources; | ||
16 | unsigned long nr_resources; | ||
17 | }; | ||
18 | |||
19 | extern struct s3c24xx_uart_resources s3c2410_uart_resources[]; | ||
20 | |||
21 | extern struct platform_device *s3c24xx_uart_devs[]; | ||
22 | extern struct platform_device *s3c24xx_uart_src[]; | ||
23 | |||
24 | extern struct platform_device s3c_device_timer[]; | ||
25 | |||
26 | extern struct platform_device s3c_device_usb; | ||
27 | extern struct platform_device s3c_device_lcd; | ||
28 | extern struct platform_device s3c_device_wdt; | ||
29 | extern struct platform_device s3c_device_i2c; | ||
30 | extern struct platform_device s3c_device_iis; | ||
31 | extern struct platform_device s3c_device_rtc; | ||
32 | extern struct platform_device s3c_device_adc; | ||
33 | extern struct platform_device s3c_device_sdi; | ||
34 | extern struct platform_device s3c_device_hsmmc; | ||
35 | |||
36 | extern struct platform_device s3c_device_spi0; | ||
37 | extern struct platform_device s3c_device_spi1; | ||
38 | |||
39 | extern struct platform_device s3c_device_nand; | ||
40 | |||
41 | extern struct platform_device s3c_device_usbgadget; | ||
42 | |||
43 | /* s3c2440 specific devices */ | ||
44 | |||
45 | #ifdef CONFIG_CPU_S3C2440 | ||
46 | |||
47 | extern struct platform_device s3c_device_camif; | ||
48 | |||
49 | #endif | ||
diff --git a/include/asm-arm/plat-s3c24xx/irq.h b/include/asm-arm/plat-s3c24xx/irq.h deleted file mode 100644 index 45746a995343..000000000000 --- a/include/asm-arm/plat-s3c24xx/irq.h +++ /dev/null | |||
@@ -1,109 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/irq.h | ||
2 | * | ||
3 | * Copyright (c) 2004-2005 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Header file for S3C24XX CPU IRQ support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #define irqdbf(x...) | ||
14 | #define irqdbf2(x...) | ||
15 | |||
16 | #define EXTINT_OFF (IRQ_EINT4 - 4) | ||
17 | |||
18 | /* these are exported for arch/arm/mach-* usage */ | ||
19 | extern struct irq_chip s3c_irq_level_chip; | ||
20 | extern struct irq_chip s3c_irq_chip; | ||
21 | |||
22 | static inline void | ||
23 | s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit, | ||
24 | int subcheck) | ||
25 | { | ||
26 | unsigned long mask; | ||
27 | unsigned long submask; | ||
28 | |||
29 | submask = __raw_readl(S3C2410_INTSUBMSK); | ||
30 | mask = __raw_readl(S3C2410_INTMSK); | ||
31 | |||
32 | submask |= (1UL << (irqno - IRQ_S3CUART_RX0)); | ||
33 | |||
34 | /* check to see if we need to mask the parent IRQ */ | ||
35 | |||
36 | if ((submask & subcheck) == subcheck) { | ||
37 | __raw_writel(mask | parentbit, S3C2410_INTMSK); | ||
38 | } | ||
39 | |||
40 | /* write back masks */ | ||
41 | __raw_writel(submask, S3C2410_INTSUBMSK); | ||
42 | |||
43 | } | ||
44 | |||
45 | static inline void | ||
46 | s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit) | ||
47 | { | ||
48 | unsigned long mask; | ||
49 | unsigned long submask; | ||
50 | |||
51 | submask = __raw_readl(S3C2410_INTSUBMSK); | ||
52 | mask = __raw_readl(S3C2410_INTMSK); | ||
53 | |||
54 | submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0)); | ||
55 | mask &= ~parentbit; | ||
56 | |||
57 | /* write back masks */ | ||
58 | __raw_writel(submask, S3C2410_INTSUBMSK); | ||
59 | __raw_writel(mask, S3C2410_INTMSK); | ||
60 | } | ||
61 | |||
62 | |||
63 | static inline void | ||
64 | s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group) | ||
65 | { | ||
66 | unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0); | ||
67 | |||
68 | s3c_irqsub_mask(irqno, parentmask, group); | ||
69 | |||
70 | __raw_writel(bit, S3C2410_SUBSRCPND); | ||
71 | |||
72 | /* only ack parent if we've got all the irqs (seems we must | ||
73 | * ack, all and hope that the irq system retriggers ok when | ||
74 | * the interrupt goes off again) | ||
75 | */ | ||
76 | |||
77 | if (1) { | ||
78 | __raw_writel(parentmask, S3C2410_SRCPND); | ||
79 | __raw_writel(parentmask, S3C2410_INTPND); | ||
80 | } | ||
81 | } | ||
82 | |||
83 | static inline void | ||
84 | s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group) | ||
85 | { | ||
86 | unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0); | ||
87 | |||
88 | __raw_writel(bit, S3C2410_SUBSRCPND); | ||
89 | |||
90 | /* only ack parent if we've got all the irqs (seems we must | ||
91 | * ack, all and hope that the irq system retriggers ok when | ||
92 | * the interrupt goes off again) | ||
93 | */ | ||
94 | |||
95 | if (1) { | ||
96 | __raw_writel(parentmask, S3C2410_SRCPND); | ||
97 | __raw_writel(parentmask, S3C2410_INTPND); | ||
98 | } | ||
99 | } | ||
100 | |||
101 | /* exported for use in arch/arm/mach-s3c2410 */ | ||
102 | |||
103 | #ifdef CONFIG_PM | ||
104 | extern int s3c_irq_wake(unsigned int irqno, unsigned int state); | ||
105 | #else | ||
106 | #define s3c_irq_wake NULL | ||
107 | #endif | ||
108 | |||
109 | extern int s3c_irqext_type(unsigned int irq, unsigned int type); | ||
diff --git a/include/asm-arm/plat-s3c24xx/pm.h b/include/asm-arm/plat-s3c24xx/pm.h deleted file mode 100644 index cc623667e48a..000000000000 --- a/include/asm-arm/plat-s3c24xx/pm.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/pm.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics | ||
4 | * Written by Ben Dooks, <ben@simtec.co.uk> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | /* s3c2410_pm_init | ||
12 | * | ||
13 | * called from board at initialisation time to setup the power | ||
14 | * management | ||
15 | */ | ||
16 | |||
17 | #ifdef CONFIG_PM | ||
18 | |||
19 | extern __init int s3c2410_pm_init(void); | ||
20 | |||
21 | #else | ||
22 | |||
23 | static inline int s3c2410_pm_init(void) | ||
24 | { | ||
25 | return 0; | ||
26 | } | ||
27 | #endif | ||
28 | |||
29 | /* configuration for the IRQ mask over sleep */ | ||
30 | extern unsigned long s3c_irqwake_intmask; | ||
31 | extern unsigned long s3c_irqwake_eintmask; | ||
32 | |||
33 | /* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ | ||
34 | extern unsigned long s3c_irqwake_intallow; | ||
35 | extern unsigned long s3c_irqwake_eintallow; | ||
36 | |||
37 | /* per-cpu sleep functions */ | ||
38 | |||
39 | extern void (*pm_cpu_prep)(void); | ||
40 | extern void (*pm_cpu_sleep)(void); | ||
41 | |||
42 | /* Flags for PM Control */ | ||
43 | |||
44 | extern unsigned long s3c_pm_flags; | ||
45 | |||
46 | /* from sleep.S */ | ||
47 | |||
48 | extern int s3c2410_cpu_save(unsigned long *saveblk); | ||
49 | extern void s3c2410_cpu_suspend(void); | ||
50 | extern void s3c2410_cpu_resume(void); | ||
51 | |||
52 | extern unsigned long s3c2410_sleep_save_phys; | ||
53 | |||
54 | /* sleep save info */ | ||
55 | |||
56 | struct sleep_save { | ||
57 | void __iomem *reg; | ||
58 | unsigned long val; | ||
59 | }; | ||
60 | |||
61 | #define SAVE_ITEM(x) \ | ||
62 | { .reg = (x) } | ||
63 | |||
64 | extern void s3c2410_pm_do_save(struct sleep_save *ptr, int count); | ||
65 | extern void s3c2410_pm_do_restore(struct sleep_save *ptr, int count); | ||
66 | |||
67 | #ifdef CONFIG_PM | ||
68 | extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state); | ||
69 | extern int s3c24xx_irq_resume(struct sys_device *dev); | ||
70 | #else | ||
71 | #define s3c24xx_irq_suspend NULL | ||
72 | #define s3c24xx_irq_resume NULL | ||
73 | #endif | ||
diff --git a/include/asm-arm/plat-s3c24xx/s3c2400.h b/include/asm-arm/plat-s3c24xx/s3c2400.h deleted file mode 100644 index 3a5a16821af8..000000000000 --- a/include/asm-arm/plat-s3c24xx/s3c2400.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/s3c2400.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Header file for S3C2400 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | * Modifications: | ||
13 | * 09-Fev-2006 LCVR First version, based on s3c2410.h | ||
14 | */ | ||
15 | |||
16 | #ifdef CONFIG_CPU_S3C2400 | ||
17 | |||
18 | extern int s3c2400_init(void); | ||
19 | |||
20 | extern void s3c2400_map_io(struct map_desc *mach_desc, int size); | ||
21 | |||
22 | extern void s3c2400_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
23 | |||
24 | extern void s3c2400_init_clocks(int xtal); | ||
25 | |||
26 | #else | ||
27 | #define s3c2400_init_clocks NULL | ||
28 | #define s3c2400_init_uarts NULL | ||
29 | #define s3c2400_map_io NULL | ||
30 | #define s3c2400_init NULL | ||
31 | #endif | ||
diff --git a/include/asm-arm/plat-s3c24xx/s3c2410.h b/include/asm-arm/plat-s3c24xx/s3c2410.h deleted file mode 100644 index 3cd1ec677b3f..000000000000 --- a/include/asm-arm/plat-s3c24xx/s3c2410.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/s3c2410.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Header file for s3c2410 machine directory | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #ifdef CONFIG_CPU_S3C2410 | ||
15 | |||
16 | extern int s3c2410_init(void); | ||
17 | |||
18 | extern void s3c2410_map_io(struct map_desc *mach_desc, int size); | ||
19 | |||
20 | extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
21 | |||
22 | extern void s3c2410_init_clocks(int xtal); | ||
23 | |||
24 | #else | ||
25 | #define s3c2410_init_clocks NULL | ||
26 | #define s3c2410_init_uarts NULL | ||
27 | #define s3c2410_map_io NULL | ||
28 | #define s3c2410_init NULL | ||
29 | #endif | ||
30 | |||
31 | extern int s3c2410_baseclk_add(void); | ||
diff --git a/include/asm-arm/plat-s3c24xx/s3c2440.h b/include/asm-arm/plat-s3c24xx/s3c2440.h deleted file mode 100644 index 107853bf9481..000000000000 --- a/include/asm-arm/plat-s3c24xx/s3c2440.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/s3c2440.h | ||
2 | * | ||
3 | * Copyright (c) 2004-2005 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Header file for s3c2440 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifdef CONFIG_CPU_S3C2440 | ||
14 | extern int s3c2440_init(void); | ||
15 | #else | ||
16 | #define s3c2440_init NULL | ||
17 | #endif | ||
diff --git a/include/asm-arm/plat-s3c24xx/s3c2442.h b/include/asm-arm/plat-s3c24xx/s3c2442.h deleted file mode 100644 index 451a23a2092a..000000000000 --- a/include/asm-arm/plat-s3c24xx/s3c2442.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/s3c2442.h | ||
2 | * | ||
3 | * Copyright (c) 2006 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Header file for s3c2442 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifdef CONFIG_CPU_S3C2442 | ||
14 | extern int s3c2442_init(void); | ||
15 | #else | ||
16 | #define s3c2442_init NULL | ||
17 | #endif | ||
diff --git a/include/asm-arm/plat-s3c24xx/s3c2443.h b/include/asm-arm/plat-s3c24xx/s3c2443.h deleted file mode 100644 index 11d83b5c84e6..000000000000 --- a/include/asm-arm/plat-s3c24xx/s3c2443.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/s3c2443.h | ||
2 | * | ||
3 | * Copyright (c) 2004-2005 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * Header file for s3c2443 cpu support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifdef CONFIG_CPU_S3C2443 | ||
14 | |||
15 | struct s3c2410_uartcfg; | ||
16 | |||
17 | extern int s3c2443_init(void); | ||
18 | |||
19 | extern void s3c2443_map_io(struct map_desc *mach_desc, int size); | ||
20 | |||
21 | extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no); | ||
22 | |||
23 | extern void s3c2443_init_clocks(int xtal); | ||
24 | |||
25 | extern int s3c2443_baseclk_add(void); | ||
26 | |||
27 | #else | ||
28 | #define s3c2443_init_clocks NULL | ||
29 | #define s3c2443_init_uarts NULL | ||
30 | #define s3c2443_map_io NULL | ||
31 | #define s3c2443_init NULL | ||
32 | #endif | ||