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-rw-r--r--include/asm-arm/arch-pxa/irqs.h5
-rw-r--r--include/asm-arm/arch-pxa/magician.h49
-rw-r--r--include/asm-arm/arch-pxa/pxa3xx_nand.h18
-rw-r--r--include/asm-arm/arch-pxa/system.h2
-rw-r--r--include/asm-arm/arch-sa1100/ide.h6
-rw-r--r--include/asm-arm/plat-s3c/nand.h5
6 files changed, 32 insertions, 53 deletions
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h
index 50c77eacbd5e..b6c8fe377683 100644
--- a/include/asm-arm/arch-pxa/irqs.h
+++ b/include/asm-arm/arch-pxa/irqs.h
@@ -239,7 +239,7 @@
239/* ITE8152 irqs */ 239/* ITE8152 irqs */
240/* add IT8152 IRQs beyond BOARD_END */ 240/* add IT8152 IRQs beyond BOARD_END */
241#ifdef CONFIG_PCI_HOST_ITE8152 241#ifdef CONFIG_PCI_HOST_ITE8152
242#define IT8152_IRQ(x) (IRQ_GPIO(IRQ_BOARD_END) + 1 + (x)) 242#define IT8152_IRQ(x) (IRQ_BOARD_END + (x))
243 243
244/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ 244/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
245#define IT8152_LD_IRQ_COUNT 9 245#define IT8152_LD_IRQ_COUNT 9
@@ -253,6 +253,9 @@
253 253
254#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1) 254#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)
255 255
256#if NR_IRQS < (IT8152_LAST_IRQ+1)
256#undef NR_IRQS 257#undef NR_IRQS
257#define NR_IRQS (IT8152_LAST_IRQ+1) 258#define NR_IRQS (IT8152_LAST_IRQ+1)
258#endif 259#endif
260
261#endif /* CONFIG_PCI_HOST_ITE8152 */
diff --git a/include/asm-arm/arch-pxa/magician.h b/include/asm-arm/arch-pxa/magician.h
index b34fd5683e2d..169b374f9921 100644
--- a/include/asm-arm/arch-pxa/magician.h
+++ b/include/asm-arm/arch-pxa/magician.h
@@ -13,7 +13,6 @@
13#define _MAGICIAN_H_ 13#define _MAGICIAN_H_
14 14
15#include <asm/arch/irqs.h> 15#include <asm/arch/irqs.h>
16#include <asm/arch/pxa2xx-gpio.h>
17 16
18/* 17/*
19 * PXA GPIOs 18 * PXA GPIOs
@@ -64,54 +63,6 @@
64#define GPIO120_MAGICIAN_UNKNOWN 120 63#define GPIO120_MAGICIAN_UNKNOWN 120
65 64
66/* 65/*
67 * PXA GPIO alternate function mode & direction
68 */
69
70#define GPIO0_MAGICIAN_KEY_POWER_MD (0 | GPIO_IN)
71#define GPIO9_MAGICIAN_UNKNOWN_MD (9 | GPIO_IN)
72#define GPIO10_MAGICIAN_GSM_IRQ_MD (10 | GPIO_IN)
73#define GPIO11_MAGICIAN_GSM_OUT1_MD (11 | GPIO_OUT)
74#define GPIO13_MAGICIAN_CPLD_IRQ_MD (13 | GPIO_IN)
75#define GPIO18_MAGICIAN_UNKNOWN_MD (18 | GPIO_OUT)
76#define GPIO22_MAGICIAN_VIBRA_EN_MD (22 | GPIO_OUT)
77#define GPIO26_MAGICIAN_GSM_POWER_MD (26 | GPIO_OUT)
78#define GPIO27_MAGICIAN_USBC_PUEN_MD (27 | GPIO_OUT)
79#define GPIO30_MAGICIAN_nCHARGE_EN_MD (30 | GPIO_OUT)
80#define GPIO37_MAGICIAN_KEY_HANGUP_MD (37 | GPIO_OUT)
81#define GPIO38_MAGICIAN_KEY_CONTACTS_MD (38 | GPIO_OUT)
82#define GPIO40_MAGICIAN_GSM_OUT2_MD (40 | GPIO_OUT)
83#define GPIO48_MAGICIAN_UNKNOWN_MD (48 | GPIO_OUT)
84#define GPIO56_MAGICIAN_UNKNOWN_MD (56 | GPIO_OUT)
85#define GPIO57_MAGICIAN_CAM_RESET_MD (57 | GPIO_OUT)
86#define GPIO75_MAGICIAN_SAMSUNG_POWER_MD (75 | GPIO_OUT)
87#define GPIO83_MAGICIAN_nIR_EN_MD (83 | GPIO_OUT)
88#define GPIO86_MAGICIAN_GSM_RESET_MD (86 | GPIO_OUT)
89#define GPIO87_MAGICIAN_GSM_SELECT_MD (87 | GPIO_OUT)
90#define GPIO90_MAGICIAN_KEY_CALENDAR_MD (90 | GPIO_OUT)
91#define GPIO91_MAGICIAN_KEY_CAMERA_MD (91 | GPIO_OUT)
92#define GPIO93_MAGICIAN_KEY_UP_MD (93 | GPIO_IN)
93#define GPIO94_MAGICIAN_KEY_DOWN_MD (94 | GPIO_IN)
94#define GPIO95_MAGICIAN_KEY_LEFT_MD (95 | GPIO_IN)
95#define GPIO96_MAGICIAN_KEY_RIGHT_MD (96 | GPIO_IN)
96#define GPIO97_MAGICIAN_KEY_ENTER_MD (97 | GPIO_IN)
97#define GPIO98_MAGICIAN_KEY_RECORD_MD (98 | GPIO_IN)
98#define GPIO99_MAGICIAN_HEADPHONE_IN_MD (99 | GPIO_IN)
99#define GPIO100_MAGICIAN_KEY_VOL_UP_MD (100 | GPIO_IN)
100#define GPIO101_MAGICIAN_KEY_VOL_DOWN_MD (101 | GPIO_IN)
101#define GPIO102_MAGICIAN_KEY_PHONE_MD (102 | GPIO_IN)
102#define GPIO103_MAGICIAN_LED_KP_MD (103 | GPIO_OUT)
103#define GPIO104_MAGICIAN_LCD_POWER_1_MD (104 | GPIO_OUT)
104#define GPIO105_MAGICIAN_LCD_POWER_2_MD (105 | GPIO_OUT)
105#define GPIO106_MAGICIAN_LCD_POWER_3_MD (106 | GPIO_OUT)
106#define GPIO107_MAGICIAN_DS1WM_IRQ_MD (107 | GPIO_IN)
107#define GPIO108_MAGICIAN_GSM_READY_MD (108 | GPIO_IN)
108#define GPIO114_MAGICIAN_UNKNOWN_MD (114 | GPIO_OUT)
109#define GPIO115_MAGICIAN_nPEN_IRQ_MD (115 | GPIO_IN)
110#define GPIO116_MAGICIAN_nCAM_EN_MD (116 | GPIO_OUT)
111#define GPIO119_MAGICIAN_UNKNOWN_MD (119 | GPIO_OUT)
112#define GPIO120_MAGICIAN_UNKNOWN_MD (120 | GPIO_OUT)
113
114/*
115 * CPLD IRQs 66 * CPLD IRQs
116 */ 67 */
117 68
diff --git a/include/asm-arm/arch-pxa/pxa3xx_nand.h b/include/asm-arm/arch-pxa/pxa3xx_nand.h
new file mode 100644
index 000000000000..81a8937486cb
--- /dev/null
+++ b/include/asm-arm/arch-pxa/pxa3xx_nand.h
@@ -0,0 +1,18 @@
1#ifndef __ASM_ARCH_PXA3XX_NAND_H
2#define __ASM_ARCH_PXA3XX_NAND_H
3
4#include <linux/mtd/mtd.h>
5#include <linux/mtd/partitions.h>
6
7struct pxa3xx_nand_platform_data {
8
9 /* the data flash bus is shared between the Static Memory
10 * Controller and the Data Flash Controller, the arbiter
11 * controls the ownership of the bus
12 */
13 int enable_arbiter;
14
15 struct mtd_partition *parts;
16 unsigned int nr_parts;
17};
18#endif /* __ASM_ARCH_PXA3XX_NAND_H */
diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h
index 1d56a3ef89fd..a758a719180f 100644
--- a/include/asm-arm/arch-pxa/system.h
+++ b/include/asm-arm/arch-pxa/system.h
@@ -22,6 +22,8 @@ static inline void arch_idle(void)
22 22
23static inline void arch_reset(char mode) 23static inline void arch_reset(char mode)
24{ 24{
25 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
26
25 if (mode == 's') { 27 if (mode == 's') {
26 /* Jump into ROM at address 0 */ 28 /* Jump into ROM at address 0 */
27 cpu_reset(0); 29 cpu_reset(0);
diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h
index 98b10bcf9f1b..b14cbda01dc3 100644
--- a/include/asm-arm/arch-sa1100/ide.h
+++ b/include/asm-arm/arch-sa1100/ide.h
@@ -37,12 +37,12 @@ static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
37 37
38 memset(hw, 0, sizeof(*hw)); 38 memset(hw, 0, sizeof(*hw));
39 39
40 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { 40 for (i = 0; i <= 7; i++) {
41 hw->io_ports[i] = reg; 41 hw->io_ports_array[i] = reg;
42 reg += regincr; 42 reg += regincr;
43 } 43 }
44 44
45 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port; 45 hw->io_ports.ctl_addr = ctrl_port;
46 46
47 if (irq) 47 if (irq)
48 *irq = 0; 48 *irq = 0;
diff --git a/include/asm-arm/plat-s3c/nand.h b/include/asm-arm/plat-s3c/nand.h
index 8816f7f9cee1..ad6bbe90616e 100644
--- a/include/asm-arm/plat-s3c/nand.h
+++ b/include/asm-arm/plat-s3c/nand.h
@@ -22,11 +22,14 @@
22*/ 22*/
23 23
24struct s3c2410_nand_set { 24struct s3c2410_nand_set {
25 unsigned int disable_ecc : 1;
26
25 int nr_chips; 27 int nr_chips;
26 int nr_partitions; 28 int nr_partitions;
27 char *name; 29 char *name;
28 int *nr_map; 30 int *nr_map;
29 struct mtd_partition *partitions; 31 struct mtd_partition *partitions;
32 struct nand_ecclayout *ecc_layout;
30}; 33};
31 34
32struct s3c2410_platform_nand { 35struct s3c2410_platform_nand {
@@ -36,6 +39,8 @@ struct s3c2410_platform_nand {
36 int twrph0; /* active time for nWE/nOE */ 39 int twrph0; /* active time for nWE/nOE */
37 int twrph1; /* time for release CLE/ALE from nWE/nOE inactive */ 40 int twrph1; /* time for release CLE/ALE from nWE/nOE inactive */
38 41
42 unsigned int ignore_unset_ecc : 1;
43
39 int nr_sets; 44 int nr_sets;
40 struct s3c2410_nand_set *sets; 45 struct s3c2410_nand_set *sets;
41 46