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-rw-r--r--include/asm-arm/arch-at91/io.h2
-rw-r--r--include/asm-arm/arch-omap/board-palmte.h2
-rw-r--r--include/asm-arm/arch-omap/clock.h5
-rw-r--r--include/asm-arm/arch-omap/entry-macro.S1
-rw-r--r--include/asm-arm/arch-omap/gpio.h1
-rw-r--r--include/asm-arm/arch-omap/hardware.h1
-rw-r--r--include/asm-arm/arch-pxa/cm-x270.h50
-rw-r--r--include/asm-arm/arch-pxa/hardware.h17
-rw-r--r--include/asm-arm/arch-pxa/irqs.h1
-rw-r--r--include/asm-arm/arch-pxa/mfp-pxa27x.h1
-rw-r--r--include/asm-arm/arch-pxa/palmtx.h106
-rw-r--r--include/asm-arm/arch-pxa/pxa27x-udc.h2
-rw-r--r--include/asm-arm/arch-pxa/pxa2xx-gpio.h9
-rw-r--r--include/asm-arm/arch-pxa/pxafb.h3
-rw-r--r--include/asm-arm/arch-pxa/regs-lcd.h11
-rw-r--r--include/asm-arm/arch-pxa/system.h17
-rw-r--r--include/asm-arm/arch-pxa/tosa.h50
-rw-r--r--include/asm-arm/arch-pxa/tosa_bt.h22
-rw-r--r--include/asm-arm/arch-sa1100/collie.h4
-rw-r--r--include/asm-arm/page.h4
-rw-r--r--include/asm-arm/pgtable-nommu.h1
-rw-r--r--include/asm-arm/spinlock.h2
-rw-r--r--include/asm-arm/system.h29
23 files changed, 231 insertions, 110 deletions
diff --git a/include/asm-arm/arch-at91/io.h b/include/asm-arm/arch-at91/io.h
index 80073fd36b8e..f8beaa228467 100644
--- a/include/asm-arm/arch-at91/io.h
+++ b/include/asm-arm/arch-at91/io.h
@@ -21,8 +21,6 @@
21#ifndef __ASM_ARCH_IO_H 21#ifndef __ASM_ARCH_IO_H
22#define __ASM_ARCH_IO_H 22#define __ASM_ARCH_IO_H
23 23
24#include <asm/io.h>
25
26#define IO_SPACE_LIMIT 0xFFFFFFFF 24#define IO_SPACE_LIMIT 0xFFFFFFFF
27 25
28#define __io(a) ((void __iomem *)(a)) 26#define __io(a) ((void __iomem *)(a))
diff --git a/include/asm-arm/arch-omap/board-palmte.h b/include/asm-arm/arch-omap/board-palmte.h
index cd22035a7160..6fac2c8935be 100644
--- a/include/asm-arm/arch-omap/board-palmte.h
+++ b/include/asm-arm/arch-omap/board-palmte.h
@@ -14,8 +14,6 @@
14#ifndef __OMAP_BOARD_PALMTE_H 14#ifndef __OMAP_BOARD_PALMTE_H
15#define __OMAP_BOARD_PALMTE_H 15#define __OMAP_BOARD_PALMTE_H
16 16
17#include <asm/arch/gpio.h>
18
19#define PALMTE_USBDETECT_GPIO 0 17#define PALMTE_USBDETECT_GPIO 0
20#define PALMTE_USB_OR_DC_GPIO 1 18#define PALMTE_USB_OR_DC_GPIO 1
21#define PALMTE_TSC_GPIO 4 19#define PALMTE_TSC_GPIO 4
diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h
index 57523bdb642b..12a5e4de9518 100644
--- a/include/asm-arm/arch-omap/clock.h
+++ b/include/asm-arm/arch-omap/clock.h
@@ -73,6 +73,8 @@ struct clk {
73#endif 73#endif
74}; 74};
75 75
76struct cpufreq_frequency_table;
77
76struct clk_functions { 78struct clk_functions {
77 int (*clk_enable)(struct clk *clk); 79 int (*clk_enable)(struct clk *clk);
78 void (*clk_disable)(struct clk *clk); 80 void (*clk_disable)(struct clk *clk);
@@ -83,6 +85,9 @@ struct clk_functions {
83 void (*clk_allow_idle)(struct clk *clk); 85 void (*clk_allow_idle)(struct clk *clk);
84 void (*clk_deny_idle)(struct clk *clk); 86 void (*clk_deny_idle)(struct clk *clk);
85 void (*clk_disable_unused)(struct clk *clk); 87 void (*clk_disable_unused)(struct clk *clk);
88#ifdef CONFIG_CPU_FREQ
89 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
90#endif
86}; 91};
87 92
88extern unsigned int mpurate; 93extern unsigned int mpurate;
diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S
index 74cd57221c8e..369093a45fcf 100644
--- a/include/asm-arm/arch-omap/entry-macro.S
+++ b/include/asm-arm/arch-omap/entry-macro.S
@@ -8,6 +8,7 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <asm/hardware.h> 10#include <asm/hardware.h>
11#include <asm/arch/io.h>
11#include <asm/arch/irqs.h> 12#include <asm/arch/irqs.h>
12 13
13#if defined(CONFIG_ARCH_OMAP1) 14#if defined(CONFIG_ARCH_OMAP1)
diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h
index 86621a04cd8f..5ee6a49864c3 100644
--- a/include/asm-arm/arch-omap/gpio.h
+++ b/include/asm-arm/arch-omap/gpio.h
@@ -26,7 +26,6 @@
26#ifndef __ASM_ARCH_OMAP_GPIO_H 26#ifndef __ASM_ARCH_OMAP_GPIO_H
27#define __ASM_ARCH_OMAP_GPIO_H 27#define __ASM_ARCH_OMAP_GPIO_H
28 28
29#include <asm/hardware.h>
30#include <asm/arch/irqs.h> 29#include <asm/arch/irqs.h>
31#include <asm/io.h> 30#include <asm/io.h>
32 31
diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h
index da572092e255..91d85b3417b7 100644
--- a/include/asm-arm/arch-omap/hardware.h
+++ b/include/asm-arm/arch-omap/hardware.h
@@ -41,7 +41,6 @@
41#include <asm/types.h> 41#include <asm/types.h>
42#include <asm/arch/cpu.h> 42#include <asm/arch/cpu.h>
43#endif 43#endif
44#include <asm/arch/io.h>
45#include <asm/arch/serial.h> 44#include <asm/arch/serial.h>
46 45
47/* 46/*
diff --git a/include/asm-arm/arch-pxa/cm-x270.h b/include/asm-arm/arch-pxa/cm-x270.h
deleted file mode 100644
index f8fac9e18009..000000000000
--- a/include/asm-arm/arch-pxa/cm-x270.h
+++ /dev/null
@@ -1,50 +0,0 @@
1/*
2 * linux/include/asm/arch-pxa/cm-x270.h
3 *
4 * Copyright Compulab Ltd., 2003, 2007
5 * Mike Rapoport <mike@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12
13/* CM-x270 device physical addresses */
14#define CMX270_CS1_PHYS (PXA_CS1_PHYS)
15#define MARATHON_PHYS (PXA_CS2_PHYS)
16#define CMX270_IDE104_PHYS (PXA_CS3_PHYS)
17#define CMX270_IT8152_PHYS (PXA_CS4_PHYS)
18
19/* Statically mapped regions */
20#define CMX270_VIRT_BASE (0xe8000000)
21#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
22#define CMX270_IDE104_VIRT (CMX270_IT8152_VIRT + SZ_64M)
23
24/* GPIO related definitions */
25#define GPIO_IT8152_IRQ (22)
26
27#define IRQ_GPIO_IT8152_IRQ IRQ_GPIO(GPIO_IT8152_IRQ)
28#define PME_IRQ IRQ_GPIO(0)
29#define CMX270_IDE_IRQ IRQ_GPIO(100)
30#define CMX270_GPIRQ1 IRQ_GPIO(101)
31#define CMX270_TOUCHIRQ IRQ_GPIO(96)
32#define CMX270_ETHIRQ IRQ_GPIO(10)
33#define CMX270_GFXIRQ IRQ_GPIO(95)
34#define CMX270_NANDIRQ IRQ_GPIO(89)
35#define CMX270_MMC_IRQ IRQ_GPIO(83)
36
37/* PCMCIA related definitions */
38#define PCC_DETECT(x) (GPLR(84 - (x)) & GPIO_bit(84 - (x)))
39#define PCC_READY(x) (GPLR(82 - (x)) & GPIO_bit(82 - (x)))
40
41#define PCMCIA_S0_CD_VALID IRQ_GPIO(84)
42#define PCMCIA_S0_CD_VALID_EDGE GPIO_BOTH_EDGES
43
44#define PCMCIA_S1_CD_VALID IRQ_GPIO(83)
45#define PCMCIA_S1_CD_VALID_EDGE GPIO_BOTH_EDGES
46
47#define PCMCIA_S0_RDYINT IRQ_GPIO(82)
48#define PCMCIA_S1_RDYINT IRQ_GPIO(81)
49
50#define PCMCIA_RESET_GPIO 53
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index d9af6dabc899..09868de841a5 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -69,6 +69,12 @@
69 _id == 0x212; \ 69 _id == 0x212; \
70 }) 70 })
71 71
72#define __cpu_is_pxa255(id) \
73 ({ \
74 unsigned int _id = (id) >> 4 & 0xfff; \
75 _id == 0x2d0; \
76 })
77
72#define __cpu_is_pxa25x(id) \ 78#define __cpu_is_pxa25x(id) \
73 ({ \ 79 ({ \
74 unsigned int _id = (id) >> 4 & 0xfff; \ 80 unsigned int _id = (id) >> 4 & 0xfff; \
@@ -76,6 +82,7 @@
76 }) 82 })
77#else 83#else
78#define __cpu_is_pxa21x(id) (0) 84#define __cpu_is_pxa21x(id) (0)
85#define __cpu_is_pxa255(id) (0)
79#define __cpu_is_pxa25x(id) (0) 86#define __cpu_is_pxa25x(id) (0)
80#endif 87#endif
81 88
@@ -124,6 +131,11 @@
124 __cpu_is_pxa21x(read_cpuid_id()); \ 131 __cpu_is_pxa21x(read_cpuid_id()); \
125 }) 132 })
126 133
134#define cpu_is_pxa255() \
135 ({ \
136 __cpu_is_pxa255(read_cpuid_id()); \
137 })
138
127#define cpu_is_pxa25x() \ 139#define cpu_is_pxa25x() \
128 ({ \ 140 ({ \
129 __cpu_is_pxa25x(read_cpuid_id()); \ 141 __cpu_is_pxa25x(read_cpuid_id()); \
@@ -196,6 +208,11 @@ extern void pxa_gpio_set_value(unsigned gpio, int value);
196 */ 208 */
197extern unsigned int get_memclk_frequency_10khz(void); 209extern unsigned int get_memclk_frequency_10khz(void);
198 210
211/*
212 * register GPIO as reset generator
213 */
214extern int init_gpio_reset(int gpio);
215
199#endif 216#endif
200 217
201#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) 218#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h
index b6c8fe377683..fa05e76f64e8 100644
--- a/include/asm-arm/arch-pxa/irqs.h
+++ b/include/asm-arm/arch-pxa/irqs.h
@@ -180,6 +180,7 @@
180#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) 180#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
181#elif defined(CONFIG_ARCH_LUBBOCK) || \ 181#elif defined(CONFIG_ARCH_LUBBOCK) || \
182 defined(CONFIG_MACH_LOGICPD_PXA270) || \ 182 defined(CONFIG_MACH_LOGICPD_PXA270) || \
183 defined(CONFIG_MACH_TOSA) || \
183 defined(CONFIG_MACH_MAINSTONE) || \ 184 defined(CONFIG_MACH_MAINSTONE) || \
184 defined(CONFIG_MACH_PCM027) || \ 185 defined(CONFIG_MACH_PCM027) || \
185 defined(CONFIG_MACH_MAGICIAN) 186 defined(CONFIG_MACH_MAGICIAN)
diff --git a/include/asm-arm/arch-pxa/mfp-pxa27x.h b/include/asm-arm/arch-pxa/mfp-pxa27x.h
index eb6eaa174f8d..bc73ab84167c 100644
--- a/include/asm-arm/arch-pxa/mfp-pxa27x.h
+++ b/include/asm-arm/arch-pxa/mfp-pxa27x.h
@@ -112,6 +112,7 @@
112#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1) 112#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1)
113#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1) 113#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1)
114#define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH) 114#define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH)
115#define GPIO104_PSKTSEL MFP_CFG_OUT(GPIO104, AF1, DRIVE_HIGH)
115 116
116/* I2C */ 117/* I2C */
117#define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1) 118#define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1)
diff --git a/include/asm-arm/arch-pxa/palmtx.h b/include/asm-arm/arch-pxa/palmtx.h
new file mode 100644
index 000000000000..1e8bccbda510
--- /dev/null
+++ b/include/asm-arm/arch-pxa/palmtx.h
@@ -0,0 +1,106 @@
1/*
2 * GPIOs and interrupts for Palm T|X Handheld Computer
3 *
4 * Based on palmld-gpio.h by Alex Osborne
5 *
6 * Authors: Marek Vasut <marek.vasut@gmail.com>
7 * Cristiano P. <cristianop@users.sourceforge.net>
8 * Jan Herman <2hp@seznam.cz>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
16#ifndef _INCLUDE_PALMTX_H_
17#define _INCLUDE_PALMTX_H_
18
19/** HERE ARE GPIOs **/
20
21/* GPIOs */
22#define GPIO_NR_PALMTX_GPIO_RESET 1
23
24#define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */
25#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10
26#define GPIO_NR_PALMTX_EARPHONE_DETECT 107
27
28/* SD/MMC */
29#define GPIO_NR_PALMTX_SD_DETECT_N 14
30#define GPIO_NR_PALMTX_SD_POWER 114 /* probably */
31#define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */
32
33/* TOUCHSCREEN */
34#define GPIO_NR_PALMTX_WM9712_IRQ 27
35
36/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */
37#define GPIO_NR_PALMTX_IR_DISABLE 40
38
39/* USB */
40#define GPIO_NR_PALMTX_USB_DETECT_N 13
41#define GPIO_NR_PALMTX_USB_POWER 95
42#define GPIO_NR_PALMTX_USB_PULLUP 93
43
44/* LCD/BACKLIGHT */
45#define GPIO_NR_PALMTX_BL_POWER 84
46#define GPIO_NR_PALMTX_LCD_POWER 96
47
48/* LCD BORDER */
49#define GPIO_NR_PALMTX_BORDER_SWITCH 98
50#define GPIO_NR_PALMTX_BORDER_SELECT 22
51
52/* BLUETOOTH */
53#define GPIO_NR_PALMTX_BT_POWER 17
54#define GPIO_NR_PALMTX_BT_RESET 83
55
56/* PCMCIA (WiFi) */
57#define GPIO_NR_PALMTX_PCMCIA_POWER1 94
58#define GPIO_NR_PALMTX_PCMCIA_POWER2 108
59#define GPIO_NR_PALMTX_PCMCIA_RESET 79
60#define GPIO_NR_PALMTX_PCMCIA_READY 116
61
62/* NAND Flash ... this GPIO may be incorrect! */
63#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79
64
65/* INTERRUPTS */
66#define IRQ_GPIO_PALMTX_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N)
67#define IRQ_GPIO_PALMTX_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ)
68#define IRQ_GPIO_PALMTX_USB_DETECT IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT)
69#define IRQ_GPIO_PALMTX_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET)
70
71/** HERE ARE INIT VALUES **/
72
73/* Various addresses */
74#define PALMTX_PCMCIA_PHYS 0x28000000
75#define PALMTX_PCMCIA_VIRT 0xf0000000
76#define PALMTX_PCMCIA_SIZE 0x100000
77
78#define PALMTX_PHYS_RAM_START 0xa0000000
79#define PALMTX_PHYS_IO_START 0x40000000
80
81#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */
82#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */
83
84/* TOUCHSCREEN */
85#define AC97_LINK_FRAME 21
86
87
88/* BATTERY */
89#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */
90#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */
91#define PALMTX_BAT_MAX_CURRENT 0 /* unknokn */
92#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */
93#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */
94#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */
95#define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */
96
97#define PALMTX_BAT_MEASURE_DELAY (HZ * 1)
98
99/* BACKLIGHT */
100#define PALMTX_MAX_INTENSITY 0xFE
101#define PALMTX_DEFAULT_INTENSITY 0x7E
102#define PALMTX_LIMIT_MASK 0x7F
103#define PALMTX_PRESCALER 0x3F
104#define PALMTX_PERIOD_NS 3500
105
106#endif
diff --git a/include/asm-arm/arch-pxa/pxa27x-udc.h b/include/asm-arm/arch-pxa/pxa27x-udc.h
index bc1cf7d0773a..ab1443f8bd89 100644
--- a/include/asm-arm/arch-pxa/pxa27x-udc.h
+++ b/include/asm-arm/arch-pxa/pxa27x-udc.h
@@ -97,7 +97,7 @@
97#define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */ 97#define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */
98#define UP2OCR_HXS (1 << 16) /* Host Port 2 Transceiver Output Select */ 98#define UP2OCR_HXS (1 << 16) /* Host Port 2 Transceiver Output Select */
99#define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */ 99#define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */
100#define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */ 100#define UP2OCR_SEOS(x) ((x & 7) << 24) /* Single-Ended Output Select */
101 101
102#define UDCCSN(x) __REG2(0x40600100, (x) << 2) 102#define UDCCSN(x) __REG2(0x40600100, (x) << 2)
103#define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ 103#define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */
diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
index a6e60f691617..6ef1dd09970b 100644
--- a/include/asm-arm/arch-pxa/pxa2xx-gpio.h
+++ b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
@@ -136,7 +136,11 @@
136#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */ 136#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */
137#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */ 137#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */
138#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */ 138#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */
139#define GPIO96_FFRXD 96 /* FFUART recieve */
140#define GPIO98_FFRTS 98 /* FFUART request to send */
139#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */ 141#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */
142#define GPIO99_FFTXD 99 /* FFUART transmit data */
143#define GPIO100_FFCTS 100 /* FFUART Clear to send */
140#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */ 144#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
141#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */ 145#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */
142#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */ 146#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */
@@ -318,6 +322,8 @@
318#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) 322#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
319#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN) 323#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN)
320#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT) 324#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT)
325#define GPIO88_USBH1_PWR_MD (88 | GPIO_ALT_FN_1_IN)
326#define GPIO89_USBH1_PEN_MD (89 | GPIO_ALT_FN_2_OUT)
321#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN) 327#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN)
322#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN) 328#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN)
323#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) 329#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
@@ -326,8 +332,11 @@
326#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN) 332#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN)
327#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN) 333#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN)
328#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN) 334#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN)
335#define GPIO96_FFRXD_MD (96 | GPIO_ALT_FN_3_IN)
329#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN) 336#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN)
330#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN) 337#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN)
338#define GPIO98_FFRTS_MD (98 | GPIO_ALT_FN_3_OUT)
339#define GPIO99_FFTXD_MD (99 | GPIO_ALT_FN_3_OUT)
331#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN) 340#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN)
332#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN) 341#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN)
333#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) 342#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
diff --git a/include/asm-arm/arch-pxa/pxafb.h b/include/asm-arm/arch-pxa/pxafb.h
index bbd22396841a..daf018d0c604 100644
--- a/include/asm-arm/arch-pxa/pxafb.h
+++ b/include/asm-arm/arch-pxa/pxafb.h
@@ -71,7 +71,8 @@ struct pxafb_mode_info {
71 71
72 u_char bpp; 72 u_char bpp;
73 u_int cmap_greyscale:1, 73 u_int cmap_greyscale:1,
74 unused:31; 74 depth:8,
75 unused:23;
75 76
76 /* Parallel Mode Timing */ 77 /* Parallel Mode Timing */
77 u_char hsync_len; 78 u_char hsync_len;
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h
index f762493f5141..820a189684a9 100644
--- a/include/asm-arm/arch-pxa/regs-lcd.h
+++ b/include/asm-arm/arch-pxa/regs-lcd.h
@@ -1,5 +1,8 @@
1#ifndef __ASM_ARCH_REGS_LCD_H 1#ifndef __ASM_ARCH_REGS_LCD_H
2#define __ASM_ARCH_REGS_LCD_H 2#define __ASM_ARCH_REGS_LCD_H
3
4#include <asm/arch/bitfield.h>
5
3/* 6/*
4 * LCD Controller Registers and Bits Definitions 7 * LCD Controller Registers and Bits Definitions
5 */ 8 */
@@ -24,6 +27,12 @@
24#define LCCR3_4BPP (2 << 24) 27#define LCCR3_4BPP (2 << 24)
25#define LCCR3_8BPP (3 << 24) 28#define LCCR3_8BPP (3 << 24)
26#define LCCR3_16BPP (4 << 24) 29#define LCCR3_16BPP (4 << 24)
30#define LCCR3_18BPP (5 << 24)
31#define LCCR3_18BPP_P (6 << 24)
32#define LCCR3_19BPP (7 << 24)
33#define LCCR3_19BPP_P (1 << 29)
34#define LCCR3_24BPP ((1 << 29) | (1 << 24))
35#define LCCR3_25BPP ((1 << 29) | (2 << 24))
27 36
28#define LCCR3_PDFOR_0 (0 << 30) 37#define LCCR3_PDFOR_0 (0 << 30)
29#define LCCR3_PDFOR_1 (1 << 30) 38#define LCCR3_PDFOR_1 (1 << 30)
@@ -69,7 +78,7 @@
69#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ 78#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */
70#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ 79#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */
71#define LCCR0_PDD_S 12 80#define LCCR0_PDD_S 12
72#define LCCR0_BM (1 << 20) /* Branch mask */ 81#define LCCR0_BM (1 << 20) /* Branch mask */
73#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ 82#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */
74#define LCCR0_LCDT (1 << 22) /* LCD panel type */ 83#define LCCR0_LCDT (1 << 22) /* LCD panel type */
75#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ 84#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */
diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h
index ba7e132de1b3..6956fc5235f8 100644
--- a/include/asm-arm/arch-pxa/system.h
+++ b/include/asm-arm/arch-pxa/system.h
@@ -21,19 +21,4 @@ static inline void arch_idle(void)
21} 21}
22 22
23 23
24static inline void arch_reset(char mode) 24void arch_reset(char mode);
25{
26 if (cpu_is_pxa2xx())
27 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
28
29 if (mode == 's') {
30 /* Jump into ROM at address 0 */
31 cpu_reset(0);
32 } else {
33 /* Initialize the watchdog and let it fire */
34 OWER = OWER_WME;
35 OSSR = OSSR_M3;
36 OSMR3 = OSCR + 368640; /* ... in 100 ms */
37 }
38}
39
diff --git a/include/asm-arm/arch-pxa/tosa.h b/include/asm-arm/arch-pxa/tosa.h
index c5b6fde6907c..a72803f0461b 100644
--- a/include/asm-arm/arch-pxa/tosa.h
+++ b/include/asm-arm/arch-pxa/tosa.h
@@ -25,21 +25,18 @@
25 */ 25 */
26#define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO 26#define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO
27#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 27#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11
28#define TOSA_SCOOP_TC6393_REST_IN SCOOP_GPCR_PA12 28#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1)
29#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) 29#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
30#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3) 30#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3)
31#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4) 31#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4)
32#define TOSA_SCOOP_AUD_PWR_ON SCOOP_GPCR_PA16 32#define TOSA_SCOOP_AUD_PWR_ON SCOOP_GPCR_PA16
33#define TOSA_SCOOP_BT_RESET SCOOP_GPCR_PA17 33#define TOSA_GPIO_BT_RESET (TOSA_SCOOP_GPIO_BASE + 6)
34#define TOSA_SCOOP_BT_PWR_EN SCOOP_GPCR_PA18 34#define TOSA_GPIO_BT_PWR_EN (TOSA_SCOOP_GPIO_BASE + 7)
35#define TOSA_SCOOP_AC_IN_OL SCOOP_GPCR_PA19 35#define TOSA_SCOOP_AC_IN_OL SCOOP_GPCR_PA19
36 36
37/* GPIO Direction 1 : output mode / 0:input mode */ 37/* GPIO Direction 1 : output mode / 0:input mode */
38#define TOSA_SCOOP_IO_DIR ( TOSA_SCOOP_PXA_VCORE1 | TOSA_SCOOP_TC6393_REST_IN | \ 38#define TOSA_SCOOP_IO_DIR (TOSA_SCOOP_PXA_VCORE1 | \
39 TOSA_SCOOP_AUD_PWR_ON |\ 39 TOSA_SCOOP_AUD_PWR_ON)
40 TOSA_SCOOP_BT_RESET | TOSA_SCOOP_BT_PWR_EN )
41/* GPIO out put level when init 1: Hi */
42#define TOSA_SCOOP_IO_OUT ( TOSA_SCOOP_TC6393_REST_IN )
43 40
44/* 41/*
45 * SCOOP2 jacket GPIOs 42 * SCOOP2 jacket GPIOs
@@ -49,16 +46,34 @@
49#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) 46#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
50#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) 47#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
51#define TOSA_GPIO_USB_PULLUP (TOSA_SCOOP_JC_GPIO_BASE + 3) 48#define TOSA_GPIO_USB_PULLUP (TOSA_SCOOP_JC_GPIO_BASE + 3)
52#define TOSA_SCOOP_JC_TC6393_SUSPEND SCOOP_GPCR_PA15 49#define TOSA_GPIO_TC6393XB_SUSPEND (TOSA_SCOOP_JC_GPIO_BASE + 4)
53#define TOSA_SCOOP_JC_TC3693_L3V_ON SCOOP_GPCR_PA16 50#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5)
54#define TOSA_SCOOP_JC_WLAN_DETECT SCOOP_GPCR_PA17 51#define TOSA_SCOOP_JC_WLAN_DETECT SCOOP_GPCR_PA17
55#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7) 52#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
56#define TOSA_SCOOP_JC_CARD_LIMIT_SEL SCOOP_GPCR_PA19 53#define TOSA_SCOOP_JC_CARD_LIMIT_SEL SCOOP_GPCR_PA19
57 54
58/* GPIO Direction 1 : output mode / 0:input mode */ 55/* GPIO Direction 1 : output mode / 0:input mode */
59#define TOSA_SCOOP_JC_IO_DIR ( \ 56#define TOSA_SCOOP_JC_IO_DIR (TOSA_SCOOP_JC_CARD_LIMIT_SEL)
60 TOSA_SCOOP_JC_TC6393_SUSPEND | TOSA_SCOOP_JC_TC3693_L3V_ON | \ 57
61 TOSA_SCOOP_JC_CARD_LIMIT_SEL ) 58/*
59 * TC6393XB GPIOs
60 */
61#define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12)
62#define TOSA_TC6393XB_GPIO(i) (TOSA_TC6393XB_GPIO_BASE + (i))
63#define TOSA_TC6393XB_GPIO_BIT(gpio) (1 << (gpio - TOSA_TC6393XB_GPIO_BASE))
64
65#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0)
66#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1)
67#define TOSA_GPIO_BL_C20MA (TOSA_TC6393XB_GPIO_BASE + 3)
68#define TOSA_GPIO_CARD_VCC_ON (TOSA_TC6393XB_GPIO_BASE + 4)
69#define TOSA_GPIO_CHARGE_OFF (TOSA_TC6393XB_GPIO_BASE + 6)
70#define TOSA_GPIO_CHARGE_OFF_JC (TOSA_TC6393XB_GPIO_BASE + 7)
71#define TOSA_GPIO_BAT0_V_ON (TOSA_TC6393XB_GPIO_BASE + 9)
72#define TOSA_GPIO_BAT1_V_ON (TOSA_TC6393XB_GPIO_BASE + 10)
73#define TOSA_GPIO_BU_CHRG_ON (TOSA_TC6393XB_GPIO_BASE + 11)
74#define TOSA_GPIO_BAT_SW_ON (TOSA_TC6393XB_GPIO_BASE + 12)
75#define TOSA_GPIO_BAT0_TH_ON (TOSA_TC6393XB_GPIO_BASE + 14)
76#define TOSA_GPIO_BAT1_TH_ON (TOSA_TC6393XB_GPIO_BASE + 15)
62 77
63/* 78/*
64 * Timing Generator 79 * Timing Generator
@@ -84,13 +99,13 @@
84#define TOSA_GPIO_JACKET_DETECT (7) 99#define TOSA_GPIO_JACKET_DETECT (7)
85#define TOSA_GPIO_nSD_DETECT (9) 100#define TOSA_GPIO_nSD_DETECT (9)
86#define TOSA_GPIO_nSD_INT (10) 101#define TOSA_GPIO_nSD_INT (10)
87#define TOSA_GPIO_TC6393_CLK (11) 102#define TOSA_GPIO_TC6393XB_CLK (11)
88#define TOSA_GPIO_BAT1_CRG (12) 103#define TOSA_GPIO_BAT1_CRG (12)
89#define TOSA_GPIO_CF_CD (13) 104#define TOSA_GPIO_CF_CD (13)
90#define TOSA_GPIO_BAT0_CRG (14) 105#define TOSA_GPIO_BAT0_CRG (14)
91#define TOSA_GPIO_TC6393_INT (15) 106#define TOSA_GPIO_TC6393XB_INT (15)
92#define TOSA_GPIO_BAT0_LOW (17) 107#define TOSA_GPIO_BAT0_LOW (17)
93#define TOSA_GPIO_TC6393_RDY (18) 108#define TOSA_GPIO_TC6393XB_RDY (18)
94#define TOSA_GPIO_ON_RESET (19) 109#define TOSA_GPIO_ON_RESET (19)
95#define TOSA_GPIO_EAR_IN (20) 110#define TOSA_GPIO_EAR_IN (20)
96#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */ 111#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */
@@ -99,6 +114,7 @@
99#define TOSA_GPIO_TP_INT (32) /* Touch Panel pen down interrupt */ 114#define TOSA_GPIO_TP_INT (32) /* Touch Panel pen down interrupt */
100#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */ 115#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */
101#define TOSA_GPIO_BAT_LOCKED (38) /* Battery locked */ 116#define TOSA_GPIO_BAT_LOCKED (38) /* Battery locked */
117#define TOSA_GPIO_IRDA_TX (47)
102#define TOSA_GPIO_TG_SPI_SCLK (81) 118#define TOSA_GPIO_TG_SPI_SCLK (81)
103#define TOSA_GPIO_TG_SPI_CS (82) 119#define TOSA_GPIO_TG_SPI_CS (82)
104#define TOSA_GPIO_TG_SPI_MOSI (83) 120#define TOSA_GPIO_TG_SPI_MOSI (83)
@@ -137,7 +153,7 @@
137#define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG) 153#define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG)
138#define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD) 154#define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD)
139#define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG) 155#define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG)
140#define TOSA_IRQ_GPIO_TC6393_INT IRQ_GPIO(TOSA_GPIO_TC6393_INT) 156#define TOSA_IRQ_GPIO_TC6393XB_INT IRQ_GPIO(TOSA_GPIO_TC6393XB_INT)
141#define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW) 157#define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW)
142#define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN) 158#define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN)
143#define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ) 159#define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ)
diff --git a/include/asm-arm/arch-pxa/tosa_bt.h b/include/asm-arm/arch-pxa/tosa_bt.h
new file mode 100644
index 000000000000..efc3c3d3b75d
--- /dev/null
+++ b/include/asm-arm/arch-pxa/tosa_bt.h
@@ -0,0 +1,22 @@
1/*
2 * Tosa bluetooth built-in chip control.
3 *
4 * Later it may be shared with some other platforms.
5 *
6 * Copyright (c) 2008 Dmitry Baryshkov
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13#ifndef TOSA_BT_H
14#define TOSA_BT_H
15
16struct tosa_bt_data {
17 int gpio_pwr;
18 int gpio_reset;
19};
20
21#endif
22
diff --git a/include/asm-arm/arch-sa1100/collie.h b/include/asm-arm/arch-sa1100/collie.h
index 14a344aa3cc7..762eba535813 100644
--- a/include/asm-arm/arch-sa1100/collie.h
+++ b/include/asm-arm/arch-sa1100/collie.h
@@ -34,9 +34,12 @@
34 34
35#define COLLIE_GPIO_ON_KEY GPIO_GPIO (0) 35#define COLLIE_GPIO_ON_KEY GPIO_GPIO (0)
36#define COLLIE_GPIO_AC_IN GPIO_GPIO (1) 36#define COLLIE_GPIO_AC_IN GPIO_GPIO (1)
37#define COLLIE_GPIO_SDIO_INT GPIO_GPIO (11)
37#define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14) 38#define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14)
38#define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15) 39#define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15)
39#define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16) 40#define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16)
41#define COLLIE_GPIO_nMIC_ON GPIO_GPIO (17)
42#define COLLIE_GPIO_nREMOCON_ON GPIO_GPIO (18)
40#define COLLIE_GPIO_CO GPIO_GPIO (20) 43#define COLLIE_GPIO_CO GPIO_GPIO (20)
41#define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21) 44#define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21)
42#define COLLIE_GPIO_CF_CD GPIO_GPIO (22) 45#define COLLIE_GPIO_CF_CD GPIO_GPIO (22)
@@ -49,6 +52,7 @@
49 52
50#define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0 53#define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0
51#define COLLIE_IRQ_GPIO_AC_IN IRQ_GPIO1 54#define COLLIE_IRQ_GPIO_AC_IN IRQ_GPIO1
55#define COLLIE_IRQ_GPIO_SDIO_IRQ IRQ_GPIO11
52#define COLLIE_IRQ_GPIO_CF_IRQ IRQ_GPIO14 56#define COLLIE_IRQ_GPIO_CF_IRQ IRQ_GPIO14
53#define COLLIE_IRQ_GPIO_nREMOCON_INT IRQ_GPIO15 57#define COLLIE_IRQ_GPIO_nREMOCON_INT IRQ_GPIO15
54#define COLLIE_IRQ_GPIO_CO IRQ_GPIO20 58#define COLLIE_IRQ_GPIO_CO IRQ_GPIO20
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 5c22b0112106..8e05bdb5f12f 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -179,10 +179,10 @@ typedef unsigned long pgprot_t;
179 179
180#endif /* STRICT_MM_TYPECHECKS */ 180#endif /* STRICT_MM_TYPECHECKS */
181 181
182typedef struct page *pgtable_t;
183
184#endif /* CONFIG_MMU */ 182#endif /* CONFIG_MMU */
185 183
184typedef struct page *pgtable_t;
185
186#include <asm/memory.h> 186#include <asm/memory.h>
187 187
188#endif /* !__ASSEMBLY__ */ 188#endif /* !__ASSEMBLY__ */
diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h
index 2e5868bbe03b..386fcc10a973 100644
--- a/include/asm-arm/pgtable-nommu.h
+++ b/include/asm-arm/pgtable-nommu.h
@@ -16,7 +16,6 @@
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/page.h> 18#include <asm/page.h>
19#include <asm/io.h>
20 19
21/* 20/*
22 * Trivial page table functions. 21 * Trivial page table functions.
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
index 800ba5254daf..2b41ebbfa7ff 100644
--- a/include/asm-arm/spinlock.h
+++ b/include/asm-arm/spinlock.h
@@ -142,7 +142,7 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw)
142} 142}
143 143
144/* write_can_lock - would write_trylock() succeed? */ 144/* write_can_lock - would write_trylock() succeed? */
145#define __raw_write_can_lock(x) ((x)->lock == 0x80000000) 145#define __raw_write_can_lock(x) ((x)->lock == 0)
146 146
147/* 147/*
148 * Read locks are a bit more hairy: 148 * Read locks are a bit more hairy:
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 6335de9a2bb3..514af792a598 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -48,20 +48,6 @@
48#define CPUID_TCM 2 48#define CPUID_TCM 2
49#define CPUID_TLBTYPE 3 49#define CPUID_TLBTYPE 3
50 50
51#ifdef CONFIG_CPU_CP15
52#define read_cpuid(reg) \
53 ({ \
54 unsigned int __val; \
55 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
56 : "=r" (__val) \
57 : \
58 : "cc"); \
59 __val; \
60 })
61#else
62#define read_cpuid(reg) (processor_id)
63#endif
64
65/* 51/*
66 * This is used to ensure the compiler did actually allocate the register we 52 * This is used to ensure the compiler did actually allocate the register we
67 * asked it for some inline assembly sequences. Apparently we can't trust 53 * asked it for some inline assembly sequences. Apparently we can't trust
@@ -78,6 +64,21 @@
78#include <linux/stringify.h> 64#include <linux/stringify.h>
79#include <linux/irqflags.h> 65#include <linux/irqflags.h>
80 66
67#ifdef CONFIG_CPU_CP15
68#define read_cpuid(reg) \
69 ({ \
70 unsigned int __val; \
71 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
72 : "=r" (__val) \
73 : \
74 : "cc"); \
75 __val; \
76 })
77#else
78extern unsigned int processor_id;
79#define read_cpuid(reg) (processor_id)
80#endif
81
81/* 82/*
82 * The CPU ID never changes at run time, so we might as well tell the 83 * The CPU ID never changes at run time, so we might as well tell the
83 * compiler that it's constant. Use this function to read the CPU ID 84 * compiler that it's constant. Use this function to read the CPU ID
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 12:12:08 -0500