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-rw-r--r--include/asm-arm/arch-ns9xxx/board.h18
-rw-r--r--include/asm-arm/arch-ns9xxx/clock.h37
-rw-r--r--include/asm-arm/arch-ns9xxx/debug-macro.S22
-rw-r--r--include/asm-arm/arch-ns9xxx/dma.h14
-rw-r--r--include/asm-arm/arch-ns9xxx/entry-macro.S22
-rw-r--r--include/asm-arm/arch-ns9xxx/hardware.h67
-rw-r--r--include/asm-arm/arch-ns9xxx/io.h20
-rw-r--r--include/asm-arm/arch-ns9xxx/irqs.h85
-rw-r--r--include/asm-arm/arch-ns9xxx/memory.h27
-rw-r--r--include/asm-arm/arch-ns9xxx/processor.h18
-rw-r--r--include/asm-arm/arch-ns9xxx/regs-bbu.h21
-rw-r--r--include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h24
-rw-r--r--include/asm-arm/arch-ns9xxx/regs-mem.h135
-rw-r--r--include/asm-arm/arch-ns9xxx/regs-sys.h157
-rw-r--r--include/asm-arm/arch-ns9xxx/system.h34
-rw-r--r--include/asm-arm/arch-ns9xxx/timex.h20
-rw-r--r--include/asm-arm/arch-ns9xxx/uncompress.h35
-rw-r--r--include/asm-arm/arch-ns9xxx/vmalloc.h16
18 files changed, 772 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ns9xxx/board.h b/include/asm-arm/arch-ns9xxx/board.h
new file mode 100644
index 000000000000..91dc8fb1027f
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/board.h
@@ -0,0 +1,18 @@
1/*
2 * include/asm-arm/arch-ns9xxx/board.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_BOARD_H
12#define __ASM_ARCH_BOARD_H
13
14#include <asm/mach-types.h>
15
16#define board_is_a9m9750dev() (machine_is_cc9p9360dev())
17
18#endif /* ifndef __ASM_ARCH_BOARD_H */
diff --git a/include/asm-arm/arch-ns9xxx/clock.h b/include/asm-arm/arch-ns9xxx/clock.h
new file mode 100644
index 000000000000..4371a485db47
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/clock.h
@@ -0,0 +1,37 @@
1/*
2 * include/asm-arm/arch-ns9xxx/clock.h
3 *
4 * Copyright (C) 2007 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_CLOCK_H
12#define __ASM_ARCH_CLOCK_H
13
14static inline u32 ns9xxx_systemclock(void)
15{
16 /*
17 * This should be a multiple of HZ * TIMERCLOCKSELECT (in time.c)
18 */
19 return 353894400;
20}
21
22static inline const u32 ns9xxx_cpuclock(void)
23{
24 return ns9xxx_systemclock() / 2;
25}
26
27static inline const u32 ns9xxx_ahbclock(void)
28{
29 return ns9xxx_systemclock() / 4;
30}
31
32static inline const u32 ns9xxx_bbusclock(void)
33{
34 return ns9xxx_systemclock() / 8;
35}
36
37#endif /* ifndef __ASM_ARCH_CLOCK_H */
diff --git a/include/asm-arm/arch-ns9xxx/debug-macro.S b/include/asm-arm/arch-ns9xxx/debug-macro.S
new file mode 100644
index 000000000000..b21b93eb2dbc
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/debug-macro.S
@@ -0,0 +1,22 @@
1/*
2 * include/asm-arm/arch-ns9xxx/debug-macro.S
3 * Copyright (C) 2006 by Digi International Inc.
4 * All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 */
10#include <asm/hardware.h>
11
12#include <asm/arch-ns9xxx/regs-board-a9m9750dev.h>
13
14 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1
17 ldreq \rx, =NS9XXX_CSxSTAT_PHYS(0)
18 ldrne \rx, =io_p2v(NS9XXX_CSxSTAT_PHYS(0))
19 .endm
20
21#define UART_SHIFT 2
22#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-ns9xxx/dma.h b/include/asm-arm/arch-ns9xxx/dma.h
new file mode 100644
index 000000000000..a67cbbe009c4
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/dma.h
@@ -0,0 +1,14 @@
1/*
2 * include/asm-arm/arch-ns9xxx/dma.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H
13
14#endif /* ifndef __ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-ns9xxx/entry-macro.S b/include/asm-arm/arch-ns9xxx/entry-macro.S
new file mode 100644
index 000000000000..467a1986d259
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/entry-macro.S
@@ -0,0 +1,22 @@
1/*
2 * include/asm-arm/arch-ns9xxx/entry-macro.S
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#include <asm/hardware.h>
12#include <asm/arch-ns9xxx/regs-sys.h>
13
14 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
15 ldr \base, =SYS_ISRADDR
16 ldr \irqstat, [\base, #(SYS_ISA - SYS_ISRADDR)]
17 cmp \irqstat, #0
18 ldrne \irqnr, [\base]
19 .endm
20
21 .macro disable_fiq
22 .endm
diff --git a/include/asm-arm/arch-ns9xxx/hardware.h b/include/asm-arm/arch-ns9xxx/hardware.h
new file mode 100644
index 000000000000..6819da7c48d4
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/hardware.h
@@ -0,0 +1,67 @@
1/*
2 * include/asm-arm/arch-ns9xxx/hardware.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H
13
14#include <asm/memory.h>
15
16/*
17 * NetSilicon NS9xxx internal mapping:
18 *
19 * physical <--> virtual
20 * 0x90000000 - 0x906fffff <--> 0xf9000000 - 0xf96fffff
21 * 0xa0100000 - 0xa0afffff <--> 0xfa100000 - 0xfaafffff
22 */
23#define io_p2v(x) (0xf0000000 \
24 + (((x) & 0xf0000000) >> 4) \
25 + ((x) & 0x00ffffff))
26
27#define io_v2p(x) ((((x) & 0x0f000000) << 4) \
28 + ((x) & 0x00ffffff))
29
30#define __REGBIT(bit) ((u32)1 << (bit))
31#define __REGBITS(hbit, lbit) ((((u32)1 << ((hbit) - (lbit) + 1)) - 1) << (lbit))
32#define __REGVAL(mask, value) (((value) * ((mask) & (-(mask))) & (mask)))
33
34#ifndef __ASSEMBLY__
35
36# define __REG(x) (*((volatile u32 *)io_p2v((x))))
37# define __REG2(x, y) (*((volatile u32 *)io_p2v((x)) + (y)))
38
39# define __REGB(x) (*((volatile u8 *)io_p2v((x))))
40# define __REGB2(x) (*((volatile u8 *)io_p2v((x)) + (y)))
41
42# define REGSET(var, reg, field, value) \
43 ((var) = (((var) \
44 & ~(reg ## _ ## field & \
45 ~ reg ## _ ## field ## _ ## value)) \
46 | (reg ## _ ## field ## _ ## value)))
47
48# define REGSETIM(var, reg, field, value) \
49 ((var) = (((var) \
50 & ~(reg ## _ ## field & \
51 ~(__REGVAL(reg ## _ ## field, value)))) \
52 | (__REGVAL(reg ## _ ## field, value))))
53
54# define REGGET(reg, field) \
55 ((reg & (reg ## _ ## field)) / (field & (-field)))
56
57#else
58
59# define __REG(x) io_p2v(x)
60# define __REG2(x, y) io_p2v((x) + (y))
61
62# define __REGB(x) __REG((x))
63# define __REGB2(x, y) __REG2((x), (y))
64
65#endif
66
67#endif /* ifndef __ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-ns9xxx/io.h b/include/asm-arm/arch-ns9xxx/io.h
new file mode 100644
index 000000000000..6f82d28af120
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/io.h
@@ -0,0 +1,20 @@
1/*
2 * include/asm-arm/arch-ns9xxx/io.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_IO_H
12#define __ASM_ARCH_IO_H
13
14#define IO_SPACE_LIMIT 0xffffffff /* XXX */
15
16#define __io(a) ((void __iomem *)(a))
17#define __mem_pci(a) (a)
18#define __mem_isa(a) (IO_BASE + (a))
19
20#endif /* ifndef __ASM_ARCH_IO_H */
diff --git a/include/asm-arm/arch-ns9xxx/irqs.h b/include/asm-arm/arch-ns9xxx/irqs.h
new file mode 100644
index 000000000000..25d8d28b27f3
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/irqs.h
@@ -0,0 +1,85 @@
1/*
2 * include/asm-arm/arch-ns9xxx/irqs.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H
13
14#define IRQ_WATCHDOG 0
15#define IRQ_AHBBUSERR 1
16#define IRQ_BBUSAGG 2
17/* irq 3 is reserved for NS9360 */
18#define IRQ_ETHRX 4
19#define IRQ_ETHTX 5
20#define IRQ_ETHPHY 6
21#define IRQ_LCD 7
22#define IRQ_SERBRX 8
23#define IRQ_SERBTX 9
24#define IRQ_SERARX 10
25#define IRQ_SERATX 11
26#define IRQ_SERCRX 12
27#define IRQ_SERCTX 13
28#define IRQ_I2C 14
29#define IRQ_BBUSDMA 15
30#define IRQ_TIMER0 16
31#define IRQ_TIMER1 17
32#define IRQ_TIMER2 18
33#define IRQ_TIMER3 19
34#define IRQ_TIMER4 20
35#define IRQ_TIMER5 21
36#define IRQ_TIMER6 22
37#define IRQ_TIMER7 23
38#define IRQ_RTC 24
39#define IRQ_USBHOST 25
40#define IRQ_USBDEVICE 26
41#define IRQ_IEEE1284 27
42#define IRQ_EXT0 28
43#define IRQ_EXT1 29
44#define IRQ_EXT2 30
45#define IRQ_EXT3 31
46
47#define BBUS_IRQ(irq) (32 + irq)
48
49#define IRQ_BBUS_DMA BBUS_IRQ(0)
50#define IRQ_BBUS_SERBRX BBUS_IRQ(2)
51#define IRQ_BBUS_SERBTX BBUS_IRQ(3)
52#define IRQ_BBUS_SERARX BBUS_IRQ(4)
53#define IRQ_BBUS_SERATX BBUS_IRQ(5)
54#define IRQ_BBUS_SERCRX BBUS_IRQ(6)
55#define IRQ_BBUS_SERCTX BBUS_IRQ(7)
56#define IRQ_BBUS_SERDRX BBUS_IRQ(8)
57#define IRQ_BBUS_SERDTX BBUS_IRQ(9)
58#define IRQ_BBUS_I2C BBUS_IRQ(10)
59#define IRQ_BBUS_1284 BBUS_IRQ(11)
60#define IRQ_BBUS_UTIL BBUS_IRQ(12)
61#define IRQ_BBUS_RTC BBUS_IRQ(13)
62#define IRQ_BBUS_USBHST BBUS_IRQ(14)
63#define IRQ_BBUS_USBDEV BBUS_IRQ(15)
64#define IRQ_BBUS_AHBDMA1 BBUS_IRQ(24)
65#define IRQ_BBUS_AHBDMA2 BBUS_IRQ(25)
66
67/*
68 * these Interrupts are specific for the a9m9750dev board.
69 * They are generated by an FPGA that interrupts the CPU on
70 * IRQ_EXT2
71 */
72#define FPGA_IRQ(irq) (64 + irq)
73
74#define IRQ_FPGA_UARTA FPGA_IRQ(0)
75#define IRQ_FPGA_UARTB FPGA_IRQ(1)
76#define IRQ_FPGA_UARTC FPGA_IRQ(2)
77#define IRQ_FPGA_UARTD FPGA_IRQ(3)
78#define IRQ_FPGA_TOUCH FPGA_IRQ(4)
79#define IRQ_FPGA_CF FPGA_IRQ(5)
80#define IRQ_FPGA_CAN0 FPGA_IRQ(6)
81#define IRQ_FPGA_CAN1 FPGA_IRQ(7)
82
83#define NR_IRQS 72
84
85#endif /* __ASM_ARCH_IRQS_H */
diff --git a/include/asm-arm/arch-ns9xxx/memory.h b/include/asm-arm/arch-ns9xxx/memory.h
new file mode 100644
index 000000000000..ce1343e593e1
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/memory.h
@@ -0,0 +1,27 @@
1/*
2 * include/asm-arm/arch-ns9xxx/memory.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10*/
11#ifndef __ASM_ARCH_MEMORY_H
12#define __ASM_ARCH_MEMORY_H
13
14/* x in [0..3] */
15#define NS9XXX_CSxSTAT_PHYS(x) UL(((x) + 4) << 28)
16
17#define NS9XXX_CS0STAT_LENGTH UL(0x1000)
18#define NS9XXX_CS1STAT_LENGTH UL(0x1000)
19#define NS9XXX_CS2STAT_LENGTH UL(0x1000)
20#define NS9XXX_CS3STAT_LENGTH UL(0x1000)
21
22#define PHYS_OFFSET UL(0x00000000)
23
24#define __virt_to_bus(x) __virt_to_phys(x)
25#define __bus_to_virt(x) __phys_to_virt(x)
26
27#endif
diff --git a/include/asm-arm/arch-ns9xxx/processor.h b/include/asm-arm/arch-ns9xxx/processor.h
new file mode 100644
index 000000000000..716c106ac0bf
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/processor.h
@@ -0,0 +1,18 @@
1/*
2 * include/asm-arm/arch-ns9xxx/processor.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_PROCESSOR_H
12#define __ASM_ARCH_PROCESSOR_H
13
14#include <asm/mach-types.h>
15
16#define processor_is_ns9360() (machine_is_cc9p9360dev())
17
18#endif /* ifndef __ASM_ARCH_PROCESSOR_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-bbu.h b/include/asm-arm/arch-ns9xxx/regs-bbu.h
new file mode 100644
index 000000000000..e26269546240
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/regs-bbu.h
@@ -0,0 +1,21 @@
1/*
2 * include/asm-arm/arch-ns9xxx/regs-bbu.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_REGSBBU_H
12#define __ASM_ARCH_REGSBBU_H
13
14#include <asm/hardware.h>
15
16/* BBus Utility */
17
18/* GPIO Configuration Register */
19#define BBU_GC(x) __REG2(0x9060000c, (x))
20
21#endif /* ifndef __ASM_ARCH_REGSBBU_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
new file mode 100644
index 000000000000..c3dc532dd20c
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
@@ -0,0 +1,24 @@
1/*
2 * include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_REGSBOARDA9M9750_H
12#define __ASM_ARCH_REGSBOARDA9M9750_H
13
14#include <asm/hardware.h>
15
16#define FPGA_UARTA_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0))
17#define FPGA_UARTB_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x08)
18#define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10)
19#define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18)
20
21#define FPGA_IER __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x50)
22#define FPGA_ISR __REGB(NS9XXX_CSxSTAT_PHYS(0) + 0x60)
23
24#endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-mem.h b/include/asm-arm/arch-ns9xxx/regs-mem.h
new file mode 100644
index 000000000000..8ed8448767b9
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/regs-mem.h
@@ -0,0 +1,135 @@
1/*
2 * include/asm-arm/arch-ns9xxx/regs-mem.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_REGSMEM_H
12#define __ASM_ARCH_REGSMEM_H
13
14#include <asm/hardware.h>
15
16/* Memory Module */
17
18/* Control register */
19#define MEM_CTRL __REG(0xa0700000)
20
21/* Status register */
22#define MEM_STAT __REG(0xa0700004)
23
24/* Configuration register */
25#define MEM_CONF __REG(0xa0700008)
26
27/* Dynamic Memory Control register */
28#define MEM_DMCTRL __REG(0xa0700020)
29
30/* Dynamic Memory Refresh Timer */
31#define MEM_DMRT __REG(0xa0700024)
32
33/* Dynamic Memory Read Configuration register */
34#define MEM_DMRC __REG(0xa0700028)
35
36/* Dynamic Memory Precharge Command Period (tRP) */
37#define MEM_DMPCP __REG(0xa0700030)
38
39/* Dynamic Memory Active to Precharge Command Period (tRAS) */
40#define MEM_DMAPCP __REG(0xa0700034)
41
42/* Dynamic Memory Self-Refresh Exit Time (tSREX) */
43#define MEM_DMSRET __REG(0xa0700038)
44
45/* Dynamic Memory Last Data Out to Active Time (tAPR) */
46#define MEM_DMLDOAT __REG(0xa070003c)
47
48/* Dynamic Memory Data-in to Active Command Time (tDAL or TAPW) */
49#define MEM_DMDIACT __REG(0xa0700040)
50
51/* Dynamic Memory Write Recovery Time (tWR, tDPL, tRWL, tRDL) */
52#define MEM_DMWRT __REG(0xa0700044)
53
54/* Dynamic Memory Active to Active Command Period (tRC) */
55#define MEM_DMAACP __REG(0xa0700048)
56
57/* Dynamic Memory Auto Refresh Period, and Auto Refresh to Active Command Period (tRFC) */
58#define MEM_DMARP __REG(0xa070004c)
59
60/* Dynamic Memory Exit Self-Refresh to Active Command (tXSR) */
61#define MEM_DMESRAC __REG(0xa0700050)
62
63/* Dynamic Memory Active Bank A to Active B Time (tRRD) */
64#define MEM_DMABAABT __REG(0xa0700054)
65
66/* Dynamic Memory Load Mode register to Active Command Time (tMRD) */
67#define MEM_DMLMACT __REG(0xa0700058)
68
69/* Static Memory Extended Wait */
70#define MEM_SMEW __REG(0xa0700080)
71
72/* Dynamic Memory Configuration Register x */
73#define MEM_DMCONF(x) __REG2(0xa0700100, (x) << 3)
74
75/* Dynamic Memory RAS and CAS Delay x */
76#define MEM_DMRCD(x) __REG2(0xa0700104, (x) << 3)
77
78/* Static Memory Configuration Register x */
79#define MEM_SMC(x) __REG2(0xa0700200, (x) << 3)
80
81/* Static Memory Configuration Register x: Write protect */
82#define MEM_SMC_WSMC __REGBIT(20)
83#define MEM_SMC_WSMC_OFF __REGVAL(MEM_SMC_WSMC, 0)
84#define MEM_SMC_WSMC_ON __REGVAL(MEM_SMC_WSMC, 1)
85
86/* Static Memory Configuration Register x: Buffer enable */
87#define MEM_SMC_BSMC __REGBIT(19)
88#define MEM_SMC_BSMC_OFF __REGVAL(MEM_SMC_BSMC, 0)
89#define MEM_SMC_BSMC_ON __REGVAL(MEM_SMC_BSMC, 1)
90
91/* Static Memory Configuration Register x: Extended Wait */
92#define MEM_SMC_EW __REGBIT(8)
93#define MEM_SMC_EW_OFF __REGVAL(MEM_SMC_EW, 0)
94#define MEM_SMC_EW_ON __REGVAL(MEM_SMC_EW, 1)
95
96/* Static Memory Configuration Register x: Byte lane state */
97#define MEM_SMC_PB __REGBIT(7)
98#define MEM_SMC_PB_0 __REGVAL(MEM_SMC_PB, 0)
99#define MEM_SMC_PB_1 __REGVAL(MEM_SMC_PB, 1)
100
101/* Static Memory Configuration Register x: Chip select polarity */
102#define MEM_SMC_PC __REGBIT(6)
103#define MEM_SMC_PC_AL __REGVAL(MEM_SMC_PC, 0)
104#define MEM_SMC_PC_AH __REGVAL(MEM_SMC_PC, 1)
105
106/* static memory configuration register x: page mode*/
107#define MEM_SMC_PM __REGBIT(3)
108#define MEM_SMC_PM_DIS __REGVAL(MEM_SMC_PM, 0)
109#define MEM_SMC_PM_ASYNC __REGVAL(MEM_SMC_PM, 1)
110
111/* static memory configuration register x: Memory width */
112#define MEM_SMC_MW __REGBITS(1, 0)
113#define MEM_SMC_MW_8 __REGVAL(MEM_SMC_MW, 0)
114#define MEM_SMC_MW_16 __REGVAL(MEM_SMC_MW, 1)
115#define MEM_SMC_MW_32 __REGVAL(MEM_SMC_MW, 2)
116
117/* Static Memory Write Enable Delay x */
118#define MEM_SMWED(x) __REG2(0xa0700204, (x) << 3)
119
120/* Static Memory Output Enable Delay x */
121#define MEM_SMOED(x) __REG2(0xa0700208, (x) << 3)
122
123/* Static Memory Read Delay x */
124#define MEM_SMRD(x) __REG2(0xa070020c, (x) << 3)
125
126/* Static Memory Page Mode Read Delay 0 */
127#define MEM_SMPMRD(x) __REG2(0xa0700210, (x) << 3)
128
129/* Static Memory Write Delay */
130#define MEM_SMWD(x) __REG2(0xa0700214, (x) << 3)
131
132/* Static Memory Turn Round Delay x */
133#define MEM_SWT(x) __REG2(0xa0700218, (x) << 3)
134
135#endif /* ifndef __ASM_ARCH_REGSMEM_H */
diff --git a/include/asm-arm/arch-ns9xxx/regs-sys.h b/include/asm-arm/arch-ns9xxx/regs-sys.h
new file mode 100644
index 000000000000..8162a50bb273
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/regs-sys.h
@@ -0,0 +1,157 @@
1/*
2 * include/asm-arm/arch-ns9xxx/regs-sys.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_REGSSYS_H
12#define __ASM_ARCH_REGSSYS_H
13
14#include <asm/hardware.h>
15
16/* System Control Module */
17
18/* AHB Arbiter Gen Configuration */
19#define SYS_AHBAGENCONF __REG(0xa0900000)
20
21/* BRC */
22#define SYS_BRC(x) __REG2(0xa0900004, (x))
23
24/* Timer x Reload Count register */
25#define SYS_TRC(x) __REG2(0xa0900044, (x))
26
27/* Timer x Read register */
28#define SYS_TR(x) __REG2(0xa0900084, (x))
29
30/* Interrupt Vector Address Register Level x */
31#define SYS_IVA(x) __REG2(0xa09000c4, (x))
32
33/* Interrupt Configuration registers */
34#define SYS_IC(x) __REG2(0xa0900144, (x))
35
36/* ISRADDR */
37#define SYS_ISRADDR __REG(0xa0900164)
38
39/* Interrupt Status Active */
40#define SYS_ISA __REG(0xa0900168)
41
42/* Interrupt Status Raw */
43#define SYS_ISR __REG(0xa090016c)
44
45/* Timer Interrupt Status register */
46#define SYS_TIS __REG(0xa0900170)
47
48/* PLL Configuration register */
49#define SYS_PLL __REG(0xa0900188)
50
51/* PLL Configuration register: PLL SW change */
52#define SYS_PLL_SWC __REGBIT(15)
53#define SYS_PLL_SWC_NO __REGVAL(SYS_PLL_SWC, 0)
54#define SYS_PLL_SWC_YES __REGVAL(SYS_PLL_SWC, 1)
55
56/* Timer x Control register */
57#define SYS_TC(x) __REG2(0xa0900190, (x))
58
59/* Timer x Control register: Timer enable */
60#define SYS_TCx_TEN __REGBIT(15)
61#define SYS_TCx_TEN_DIS __REGVAL(SYS_TCx_TEN, 1)
62#define SYS_TCx_TEN_EN __REGVAL(SYS_TCx_TEN, 1)
63
64/* Timer x Control register: CPU debug mode */
65#define SYS_TCx_TDBG __REGBIT(10)
66#define SYS_TCx_TDBG_CONT __REGVAL(SYS_TCx_TDBG, 0)
67#define SYS_TCx_TDBG_STOP __REGVAL(SYS_TCx_TDBG, 1)
68
69/* Timer x Control register: Interrupt clear */
70#define SYS_TCx_INTC __REGBIT(9)
71#define SYS_TCx_INTC_UNSET __REGVAL(SYS_TCx_INTC, 0)
72#define SYS_TCx_INTC_SET __REGVAL(SYS_TCx_INTC, 1)
73
74/* Timer x Control register: Timer clock select */
75#define SYS_TCx_TLCS __REGBITS(8, 6)
76#define SYS_TCx_TLCS_CPU __REGVAL(SYS_TCx_TLCS, 0) /* CPU clock */
77#define SYS_TCx_TLCS_DIV2 __REGVAL(SYS_TCx_TLCS, 1) /* CPU clock / 2 */
78#define SYS_TCx_TLCS_DIV4 __REGVAL(SYS_TCx_TLCS, 2) /* CPU clock / 4 */
79#define SYS_TCx_TLCS_DIV8 __REGVAL(SYS_TCx_TLCS, 3) /* CPU clock / 8 */
80#define SYS_TCx_TLCS_DIV16 __REGVAL(SYS_TCx_TLCS, 4) /* CPU clock / 16 */
81#define SYS_TCx_TLCS_DIV32 __REGVAL(SYS_TCx_TLCS, 5) /* CPU clock / 32 */
82#define SYS_TCx_TLCS_DIV64 __REGVAL(SYS_TCx_TLCS, 6) /* CPU clock / 64 */
83#define SYS_TCx_TLCS_EXT __REGVAL(SYS_TCx_TLCS, 7)
84
85/* Timer x Control register: Timer mode */
86#define SYS_TCx_TM __REGBITS(5, 4)
87#define SYS_TCx_TM_IEE __REGVAL(SYS_TCx_TM, 0) /* Internal timer or external event */
88#define SYS_TCx_TM_ELL __REGVAL(SYS_TCx_TM, 1) /* External low-level, gated timer */
89#define SYS_TCx_TM_EHL __REGVAL(SYS_TCx_TM, 2) /* External high-level, gated timer */
90#define SYS_TCx_TM_CONCAT __REGVAL(SYS_TCx_TM, 3) /* Concatenate the lower timer. */
91
92/* Timer x Control register: Interrupt select */
93#define SYS_TCx_INTS __REGBIT(3)
94#define SYS_TCx_INTS_DIS __REGVAL(SYS_TCx_INTS, 0)
95#define SYS_TCx_INTS_EN __REGVAL(SYS_TCx_INTS, 1)
96
97/* Timer x Control register: Up/down select */
98#define SYS_TCx_UDS __REGBIT(2)
99#define SYS_TCx_UDS_UP __REGVAL(SYS_TCx_UDS, 0)
100#define SYS_TCx_UDS_DOWN __REGVAL(SYS_TCx_UDS, 1)
101
102/* Timer x Control register: 32- or 16-bit timer */
103#define SYS_TCx_TSZ __REGBIT(1)
104#define SYS_TCx_TSZ_16 __REGVAL(SYS_TCx_TSZ, 0)
105#define SYS_TCx_TSZ_32 __REGVAL(SYS_TCx_TSZ, 1)
106
107/* Timer x Control register: Reload enable */
108#define SYS_TCx_REN __REGBIT(0)
109#define SYS_TCx_REN_DIS __REGVAL(SYS_TCx_REN, 0)
110#define SYS_TCx_REN_EN __REGVAL(SYS_TCx_REN, 1)
111
112/* System Memory Chip Select x Dynamic Memory Base */
113#define SYS_SMCSDMB(x) __REG2(0xa09001d0, (x) << 1)
114
115/* System Memory Chip Select x Dynamic Memory Mask */
116#define SYS_SMCSDMM(x) __REG2(0xa09001d4, (x) << 1)
117
118/* System Memory Chip Select x Static Memory Base */
119#define SYS_SMCSSMB(x) __REG2(0xa09001f0, (x) << 1)
120
121/* System Memory Chip Select x Static Memory Base: Chip select x base */
122#define SYS_SMCSSMB_CSxB __REGBITS(31, 12)
123
124/* System Memory Chip Select x Static Memory Mask */
125#define SYS_SMCSSMM(x) __REG2(0xa09001f4, (x) << 1)
126
127/* System Memory Chip Select x Static Memory Mask: Chip select x mask */
128#define SYS_SMCSSMM_CSxM __REGBITS(31, 12)
129
130/* System Memory Chip Select x Static Memory Mask: Chip select x enable */
131#define SYS_SMCSSMM_CSEx __REGBIT(0)
132#define SYS_SMCSSMM_CSEx_DIS __REGVAL(SYS_SMCSSMM_CSEx, 0)
133#define SYS_SMCSSMM_CSEx_EN __REGVAL(SYS_SMCSSMM_CSEx, 1)
134
135/* General purpose, user-defined ID register */
136#define SYS_GENID __REG(0xa0900210)
137
138/* External Interrupt x Control register */
139#define SYS_EIC(x) __REG2(0xa0900214, (x))
140
141/* External Interrupt x Control register: Status */
142#define SYS_EIC_STS __REGBIT(3)
143
144/* External Interrupt x Control register: Clear */
145#define SYS_EIC_CLR __REGBIT(2)
146
147/* External Interrupt x Control register: Polarity */
148#define SYS_EIC_PLTY __REGBIT(1)
149#define SYS_EIC_PLTY_AH __REGVAL(SYS_EIC_PLTY, 0)
150#define SYS_EIC_PLTY_AL __REGVAL(SYS_EIC_PLTY, 1)
151
152/* External Interrupt x Control register: Level edge */
153#define SYS_EIC_LVEDG __REGBIT(0)
154#define SYS_EIC_LVEDG_LEVEL __REGVAL(SYS_EIC_LVEDG, 0)
155#define SYS_EIC_LVEDG_EDGE __REGVAL(SYS_EIC_LVEDG, 1)
156
157#endif /* ifndef __ASM_ARCH_REGSSYS_H */
diff --git a/include/asm-arm/arch-ns9xxx/system.h b/include/asm-arm/arch-ns9xxx/system.h
new file mode 100644
index 000000000000..e3cd4d31b3f3
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/system.h
@@ -0,0 +1,34 @@
1/*
2 * include/asm-arm/arch-ns9xxx/system.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14#include <asm/proc-fns.h>
15#include <asm/arch-ns9xxx/regs-sys.h>
16#include <asm/mach-types.h>
17
18static inline void arch_idle(void)
19{
20 cpu_do_idle();
21}
22
23static inline void arch_reset(char mode)
24{
25 u32 reg;
26
27 reg = SYS_PLL >> 16;
28 REGSET(reg, SYS_PLL, SWC, YES);
29 SYS_PLL = reg;
30
31 BUG();
32}
33
34#endif /* ifndef __ASM_ARCH_SYSTEM_H */
diff --git a/include/asm-arm/arch-ns9xxx/timex.h b/include/asm-arm/arch-ns9xxx/timex.h
new file mode 100644
index 000000000000..f776cbd2622d
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/timex.h
@@ -0,0 +1,20 @@
1/*
2 * include/asm-arm/arch-ns9xxx/timex.h
3 *
4 * Copyright (C) 2005-2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_TIMEX_H
12#define __ASM_ARCH_TIMEX_H
13
14/*
15 * value for CLOCK_TICK_RATE stolen from include/asm-arm/arch-s3c2410/timex.h.
16 * See there for an explanation.
17 */
18#define CLOCK_TICK_RATE 12000000
19
20#endif /* ifndef __ASM_ARCH_TIMEX_H */
diff --git a/include/asm-arm/arch-ns9xxx/uncompress.h b/include/asm-arm/arch-ns9xxx/uncompress.h
new file mode 100644
index 000000000000..961ca7dc9954
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/uncompress.h
@@ -0,0 +1,35 @@
1/*
2 * include/asm-arm/arch-ns9xxx/uncompress.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_UNCOMPRESS_H
12#define __ASM_ARCH_UNCOMPRESS_H
13
14static void putc(char c)
15{
16 volatile u8 *base = (volatile u8 *)0x40000000;
17 int t = 0x10000;
18
19 do {
20 if (base[5] & 0x20) {
21 base[0] = c;
22 break;
23 }
24 } while (--t);
25}
26
27#define arch_decomp_setup()
28#define arch_decomp_wdog()
29
30static void flush(void)
31{
32 /* nothing */
33}
34
35#endif /* ifndef __ASM_ARCH_UNCOMPRESS_H */
diff --git a/include/asm-arm/arch-ns9xxx/vmalloc.h b/include/asm-arm/arch-ns9xxx/vmalloc.h
new file mode 100644
index 000000000000..2f3cb6f6be24
--- /dev/null
+++ b/include/asm-arm/arch-ns9xxx/vmalloc.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-arm/arch-ns9xxx/vmalloc.h
3 *
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 */
11#ifndef __ASM_ARCH_VMALLOC_H
12#define __ASM_ARCH_VMALLOC_H
13
14#define VMALLOC_END (0xf0000000)
15
16#endif /* ifndef __ASM_ARCH_VMALLOC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-20 11:08:34 -0500