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-rw-r--r--include/asm-arm/tlbflush.h5
1 files changed, 0 insertions, 5 deletions
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 71be4fded7e2..8c6bc1bb9d1a 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -463,11 +463,6 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
463 */ 463 */
464extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte); 464extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte);
465 465
466/*
467 * ARM processors do not cache TLB tables in RAM.
468 */
469#define flush_tlb_pgtables(mm,start,end) do { } while (0)
470
471#endif 466#endif
472 467
473#endif /* CONFIG_MMU */ 468#endif /* CONFIG_MMU */