129 files changed, 2479 insertions, 1069 deletions

diff --git a/include/asm-arm/arch-aaec2000/param.h b/include/asm-arm/arch-aaec2000/param.h
deleted file mode 100644
index 139936c2faf2..000000000000
--- a/include/asm-arm/arch-aaec2000/param.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-aaec2000/param.h
- *
- *  Copyright (c) 2005 Nicolas Bellido Y Ortega
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARCH_PARAM_H
-#define __ASM_ARCH_PARAM_H
-
-#endif /* __ASM_ARCH_PARAM_H */
-
diff --git a/include/asm-arm/arch-aaec2000/uncompress.h b/include/asm-arm/arch-aaec2000/uncompress.h
index fff0c94b75c4..300f4bf3bc74 100644
--- a/include/asm-arm/arch-aaec2000/uncompress.h
+++ b/include/asm-arm/arch-aaec2000/uncompress.h
@@ -15,7 +15,7 @@
 
 #define UART(x)         (*(volatile unsigned long *)(serial_port + (x)))
 
-static void putstr( const char *s )
+static void putc(int c)
 {
         unsigned long serial_port;
         do {
@@ -28,17 +28,16 @@ static void putstr( const char *s )
                 return;
         } while (0);
 
-        for (; *s; s++) {
-                /* wait for space in the UART's transmitter */
-                while ((UART(UART_SR) & UART_SR_TxFF));
-                /* send the character out. */
-                UART(UART_DR) = *s;
-                /* if a LF, also do CR... */
-                if (*s == 10) {
-                        while ((UART(UART_SR) & UART_SR_TxFF));
-                        UART(UART_DR) = 13;
-                }
-        }
+        /* wait for space in the UART's transmitter */
+        while ((UART(UART_SR) & UART_SR_TxFF))
+                barrier();
+
+        /* send the character out. */
+        UART(UART_DR) = c;
+}
+
+static inline void flush(void)
+{
 }
 
 #define arch_decomp_setup()
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_emac.h b/include/asm-arm/arch-at91rm9200/at91rm9200_emac.h
new file mode 100644
index 000000000000..fbc091e61e2f
--- /dev/null
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200_emac.h
@@ -0,0 +1,138 @@
+/*
+ * include/asm-arm/arch-at91rm9200/at91rm9200_emac.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Ethernet MAC registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91RM9200_EMAC_H
+#define AT91RM9200_EMAC_H
+
+#define AT91_EMAC_CTL           0x00    /* Control Register */
+#define         AT91_EMAC_LB            (1 <<  0)       /* Loopback */
+#define         AT91_EMAC_LBL           (1 <<  1)       /* Loopback Local */
+#define         AT91_EMAC_RE            (1 <<  2)       /* Receive Enable */
+#define         AT91_EMAC_TE            (1 <<  3)       /* Transmit Enable */
+#define         AT91_EMAC_MPE           (1 <<  4)       /* Management Port Enable */
+#define         AT91_EMAC_CSR           (1 <<  5)       /* Clear Statistics Registers */
+#define         AT91_EMAC_INCSTAT       (1 <<  6)       /* Increment Statistics Registers */
+#define         AT91_EMAC_WES           (1 <<  7)       /* Write Enable for Statistics Registers */
+#define         AT91_EMAC_BP            (1 <<  8)       /* Back Pressure */
+
+#define AT91_EMAC_CFG           0x04    /* Configuration Register */
+#define         AT91_EMAC_SPD           (1 <<  0)       /* Speed */
+#define         AT91_EMAC_FD            (1 <<  1)       /* Full Duplex */
+#define         AT91_EMAC_BR            (1 <<  2)       /* Bit Rate */
+#define         AT91_EMAC_CAF           (1 <<  4)       /* Copy All Frames */
+#define         AT91_EMAC_NBC           (1 <<  5)       /* No Broadcast */
+#define         AT91_EMAC_MTI           (1 <<  6)       /* Multicast Hash Enable */
+#define         AT91_EMAC_UNI           (1 <<  7)       /* Unicast Hash Enable */
+#define         AT91_EMAC_BIG           (1 <<  8)       /* Receive 1522 Bytes */
+#define         AT91_EMAC_EAE           (1 <<  9)       /* External Address Match Enable */
+#define         AT91_EMAC_CLK           (3 << 10)       /* MDC Clock Divisor */
+#define         AT91_EMAC_CLK_DIV8              (0 << 10)
+#define         AT91_EMAC_CLK_DIV16             (1 << 10)
+#define         AT91_EMAC_CLK_DIV32             (2 << 10)
+#define         AT91_EMAC_CLK_DIV64             (3 << 10)
+#define         AT91_EMAC_RTY           (1 << 12)       /* Retry Test */
+#define         AT91_EMAC_RMII          (1 << 13)       /* Reduce MII (RMII) */
+
+#define AT91_EMAC_SR            0x08    /* Status Register */
+#define         AT91_EMAC_SR_LINK       (1 <<  0)       /* Link */
+#define         AT91_EMAC_SR_MDIO       (1 <<  1)       /* MDIO pin */
+#define         AT91_EMAC_SR_IDLE       (1 <<  2)       /* PHY idle */
+
+#define AT91_EMAC_TAR           0x0c    /* Transmit Address Register */
+
+#define AT91_EMAC_TCR           0x10    /* Transmit Control Register */
+#define         AT91_EMAC_LEN           (0x7ff << 0)    /* Transmit Frame Length */
+#define         AT91_EMAC_NCRC          (1     << 15)   /* No CRC */
+
+#define AT91_EMAC_TSR           0x14    /* Transmit Status Register */
+#define         AT91_EMAC_TSR_OVR       (1 <<  0)       /* Transmit Buffer Overrun */
+#define         AT91_EMAC_TSR_COL       (1 <<  1)       /* Collision Occurred */
+#define         AT91_EMAC_TSR_RLE       (1 <<  2)       /* Retry Limit Exceeded */
+#define         AT91_EMAC_TSR_IDLE      (1 <<  3)       /* Transmitter Idle */
+#define         AT91_EMAC_TSR_BNQ       (1 <<  4)       /* Transmit Buffer not Queued */
+#define         AT91_EMAC_TSR_COMP      (1 <<  5)       /* Transmit Complete */
+#define         AT91_EMAC_TSR_UND       (1 <<  6)       /* Transmit Underrun */
+
+#define AT91_EMAC_RBQP          0x18    /* Receive Buffer Queue Pointer */
+
+#define AT91_EMAC_RSR           0x20    /* Receive Status Register */
+#define         AT91_EMAC_RSR_BNA       (1 <<  0)       /* Buffer Not Available */
+#define         AT91_EMAC_RSR_REC       (1 <<  1)       /* Frame Received */
+#define         AT91_EMAC_RSR_OVR       (1 <<  2)       /* RX Overrun */
+
+#define AT91_EMAC_ISR           0x24    /* Interrupt Status Register */
+#define         AT91_EMAC_DONE          (1 <<  0)       /* Management Done */
+#define         AT91_EMAC_RCOM          (1 <<  1)       /* Receive Complete */
+#define         AT91_EMAC_RBNA          (1 <<  2)       /* Receive Buffer Not Available */
+#define         AT91_EMAC_TOVR          (1 <<  3)       /* Transmit Buffer Overrun */
+#define         AT91_EMAC_TUND          (1 <<  4)       /* Transmit Buffer Underrun */
+#define         AT91_EMAC_RTRY          (1 <<  5)       /* Retry Limit */
+#define         AT91_EMAC_TBRE          (1 <<  6)       /* Transmit Buffer Register Empty */
+#define         AT91_EMAC_TCOM          (1 <<  7)       /* Transmit Complete */
+#define         AT91_EMAC_TIDLE         (1 <<  8)       /* Transmit Idle */
+#define         AT91_EMAC_LINK          (1 <<  9)       /* Link */
+#define         AT91_EMAC_ROVR          (1 << 10)       /* RX Overrun */
+#define         AT91_EMAC_ABT           (1 << 11)       /* Abort */
+
+#define AT91_EMAC_IER           0x28    /* Interrupt Enable Register */
+#define AT91_EMAC_IDR           0x2c    /* Interrupt Disable Register */
+#define AT91_EMAC_IMR           0x30    /* Interrupt Mask Register */
+
+#define AT91_EMAC_MAN           0x34    /* PHY Maintenance Register */
+#define         AT91_EMAC_DATA          (0xffff << 0)   /* MDIO Data */
+#define         AT91_EMAC_REGA          (0x1f   << 18)  /* MDIO Register */
+#define         AT91_EMAC_PHYA          (0x1f   << 23)  /* MDIO PHY Address */
+#define         AT91_EMAC_RW            (3      << 28)  /* Read/Write operation */
+#define                 AT91_EMAC_RW_W          (1 << 28)
+#define                 AT91_EMAC_RW_R          (2 << 28)
+#define         AT91_EMAC_MAN_802_3     0x40020000      /* IEEE 802.3 value */
+
+/*
+ * Statistics Registers.
+ */
+#define AT91_EMAC_FRA           0x40    /* Frames Transmitted OK */
+#define AT91_EMAC_SCOL          0x44    /* Single Collision Frame */
+#define AT91_EMAC_MCOL          0x48    /* Multiple Collision Frame */
+#define AT91_EMAC_OK            0x4c    /* Frames Received OK */
+#define AT91_EMAC_SEQE          0x50    /* Frame Check Sequence Error */
+#define AT91_EMAC_ALE           0x54    /* Alignmemt Error */
+#define AT91_EMAC_DTE           0x58    /* Deffered Transmission Frame */
+#define AT91_EMAC_LCOL          0x5c    /* Late Collision */
+#define AT91_EMAC_ECOL          0x60    /* Excessive Collision */
+#define AT91_EMAC_TUE           0x64    /* Transmit Underrun Error */
+#define AT91_EMAC_CSE           0x68    /* Carrier Sense Error */
+#define AT91_EMAC_DRFC          0x6c    /* Discard RX Frame */
+#define AT91_EMAC_ROV           0x70    /* Receive Overrun */
+#define AT91_EMAC_CDE           0x74    /* Code Error */
+#define AT91_EMAC_ELR           0x78    /* Excessive Length Error */
+#define AT91_EMAC_RJB           0x7c    /* Receive Jabber */
+#define AT91_EMAC_USF           0x80    /* Undersize Frame */
+#define AT91_EMAC_SQEE          0x84    /* SQE Test Error */
+
+/*
+ * Address Registers.
+ */
+#define AT91_EMAC_HSL           0x90    /* Hash Address Low [31:0] */
+#define AT91_EMAC_HSH           0x94    /* Hash Address High [63:32] */
+#define AT91_EMAC_SA1L          0x98    /* Specific Address 1 Low, bytes 0-3 */
+#define AT91_EMAC_SA1H          0x9c    /* Specific Address 1 High, bytes 4-5 */
+#define AT91_EMAC_SA2L          0xa0    /* Specific Address 2 Low, bytes 0-3 */
+#define AT91_EMAC_SA2H          0xa4    /* Specific Address 2 High, bytes 4-5 */
+#define AT91_EMAC_SA3L          0xa8    /* Specific Address 3 Low, bytes 0-3 */
+#define AT91_EMAC_SA3H          0xac    /* Specific Address 3 High, bytes 4-5 */
+#define AT91_EMAC_SA4L          0xb0    /* Specific Address 4 Low, bytes 0-3 */
+#define AT91_EMAC_SA4H          0xb4    /* Specific Address 4 High, bytes 4-5 */
+
+#endif
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h b/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
index 9bfffdbf1e0b..2910d359f919 100644
--- a/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
+++ b/include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
@@ -172,6 +172,7 @@
 #define                 AT91_PMC_MDIV_4                 (3 << 8)
 
 #define AT91_PMC_PCKR(n)        (AT91_PMC + 0x40 + ((n) * 4))   /* Programmable Clock 0-3 Registers */
+
 #define AT91_PMC_IER            (AT91_PMC + 0x60)       /* Interrupt Enable Register */
 #define AT91_PMC_IDR            (AT91_PMC + 0x64)       /* Interrupt Disable Register */
 #define AT91_PMC_SR             (AT91_PMC + 0x68)       /* Status Register */
@@ -286,8 +287,32 @@
 #define         AT91_MC_RCB             (1 <<  0)               /* Remap Command Bit */
 
 #define AT91_MC_ASR             (AT91_MC + 0x04)        /* MC Abort Status Register */
+#define         AT91_MC_UNADD           (1 <<  0)               /* Undefined Address Abort Status */
+#define         AT91_MC_MISADD          (1 <<  1)               /* Misaligned Address Abort Status */
+#define         AT91_MC_ABTSZ           (3 <<  8)               /* Abort Size Status */
+#define                 AT91_MC_ABTSZ_BYTE              (0 << 8)
+#define                 AT91_MC_ABTSZ_HALFWORD          (1 << 8)
+#define                 AT91_MC_ABTSZ_WORD              (2 << 8)
+#define         AT91_MC_ABTTYP          (3 << 10)               /* Abort Type Status */
+#define                 AT91_MC_ABTTYP_DATAREAD         (0 << 10)
+#define                 AT91_MC_ABTTYP_DATAWRITE        (1 << 10)
+#define                 AT91_MC_ABTTYP_FETCH            (2 << 10)
+#define         AT91_MC_MST0            (1 << 16)               /* ARM920T Abort Source */
+#define         AT91_MC_MST1            (1 << 17)               /* PDC Abort Source */
+#define         AT91_MC_MST2            (1 << 18)               /* UHP Abort Source */
+#define         AT91_MC_MST3            (1 << 19)               /* EMAC Abort Source */
+#define         AT91_MC_SVMST0          (1 << 24)               /* Saved ARM920T Abort Source */
+#define         AT91_MC_SVMST1          (1 << 25)               /* Saved PDC Abort Source */
+#define         AT91_MC_SVMST2          (1 << 26)               /* Saved UHP Abort Source */
+#define         AT91_MC_SVMST3          (1 << 27)               /* Saved EMAC Abort Source */
+
 #define AT91_MC_AASR            (AT91_MC + 0x08)        /* MC Abort Address Status Register */
+
 #define AT91_MC_MPR             (AT91_MC + 0x0c)        /* MC Master Priority Register */
+#define         AT91_MPR_MSTP0          (7 <<  0)               /* ARM920T Priority */
+#define         AT91_MPR_MSTP1          (7 <<  4)               /* PDC Priority */
+#define         AT91_MPR_MSTP2          (7 <<  8)               /* UHP Priority */
+#define         AT91_MPR_MSTP3          (7 << 12)               /* EMAC Priority */
 
 /* External Bus Interface (EBI) registers */
 #define AT91_EBI_CSA            (AT91_MC + 0x60)        /* Chip Select Assignment Register */
@@ -309,8 +334,10 @@
 /* Static Memory Controller (SMC) registers */
 #define AT91_SMC_CSR(n)         (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */
 #define         AT91_SMC_NWS            (0x7f <<  0)            /* Number of Wait States */
+#define                 AT91_SMC_NWS_(x)        ((x) << 0)
 #define         AT91_SMC_WSEN           (1    <<  7)            /* Wait State Enable */
 #define         AT91_SMC_TDF            (0xf  <<  8)            /* Data Float Time */
+#define                 AT91_SMC_TDF_(x)        ((x) << 8)
 #define         AT91_SMC_BAT            (1    << 12)            /* Byte Access Type */
 #define         AT91_SMC_DBW            (3    << 13)            /* Data Bus Width */
 #define                 AT91_SMC_DBW_16         (1 << 13)
@@ -322,7 +349,78 @@
 #define                 AT91_SMC_ACSS_2         (2 << 16)
 #define                 AT91_SMC_ACSS_3         (3 << 16)
 #define         AT91_SMC_RWSETUP        (7 << 24)               /* Read & Write Signal Time Setup */
+#define                 AT91_SMC_RWSETUP_(x)    ((x) << 24)
 #define         AT91_SMC_RWHOLD         (7 << 28)               /* Read & Write Signal Hold Time */
-
+#define                 AT91_SMC_RWHOLD_(x)     ((x) << 28)
+
+/* SDRAM Controller registers */
+#define AT91_SDRAMC_MR          (AT91_MC + 0x90)        /* Mode Register */
+#define         AT91_SDRAMC_MODE        (0xf << 0)              /* Command Mode */
+#define                 AT91_SDRAMC_MODE_NORMAL         (0 << 0)
+#define                 AT91_SDRAMC_MODE_NOP            (1 << 0)
+#define                 AT91_SDRAMC_MODE_PRECHARGE      (2 << 0)
+#define                 AT91_SDRAMC_MODE_LMR            (3 << 0)
+#define                 AT91_SDRAMC_MODE_REFRESH        (4 << 0)
+#define         AT91_SDRAMC_DBW         (1   << 4)              /* Data Bus Width */
+#define                 AT91_SDRAMC_DBW_32      (0 << 4)
+#define                 AT91_SDRAMC_DBW_16      (1 << 4)
+
+#define AT91_SDRAMC_TR          (AT91_MC + 0x94)        /* Refresh Timer Register */
+#define         AT91_SDRAMC_COUNT       (0xfff << 0)            /* Refresh Timer Count */
+
+#define AT91_SDRAMC_CR          (AT91_MC + 0x98)        /* Configuration Register */
+#define         AT91_SDRAMC_NC          (3   <<  0)             /* Number of Column Bits */
+#define                 AT91_SDRAMC_NC_8        (0 << 0)
+#define                 AT91_SDRAMC_NC_9        (1 << 0)
+#define                 AT91_SDRAMC_NC_10       (2 << 0)
+#define                 AT91_SDRAMC_NC_11       (3 << 0)
+#define         AT91_SDRAMC_NR          (3   <<  2)             /* Number of Row Bits */
+#define                 AT91_SDRAMC_NR_11       (0 << 2)
+#define                 AT91_SDRAMC_NR_12       (1 << 2)
+#define                 AT91_SDRAMC_NR_13       (2 << 2)
+#define         AT91_SDRAMC_NB          (1   <<  4)             /* Number of Banks */
+#define                 AT91_SDRAMC_NB_2        (0 << 4)
+#define                 AT91_SDRAMC_NB_4        (1 << 4)
+#define         AT91_SDRAMC_CAS         (3   <<  5)             /* CAS Latency */
+#define                 AT91_SDRAMC_CAS_2       (2 << 5)
+#define         AT91_SDRAMC_TWR         (0xf <<  7)             /* Write Recovery Delay */
+#define         AT91_SDRAMC_TRC         (0xf << 11)             /* Row Cycle Delay */
+#define         AT91_SDRAMC_TRP         (0xf << 15)             /* Row Precharge Delay */
+#define         AT91_SDRAMC_TRCD        (0xf << 19)             /* Row to Column Delay */
+#define         AT91_SDRAMC_TRAS        (0xf << 23)             /* Active to Precharge Delay */
+#define         AT91_SDRAMC_TXSR        (0xf << 27)             /* Exit Self Refresh to Active Delay */
+
+#define AT91_SDRAMC_SRR         (AT91_MC + 0x9c)        /* Self Refresh Register */
+#define AT91_SDRAMC_LPR         (AT91_MC + 0xa0)        /* Low Power Register */
+#define AT91_SDRAMC_IER         (AT91_MC + 0xa4)        /* Interrupt Enable Register */
+#define AT91_SDRAMC_IDR         (AT91_MC + 0xa8)        /* Interrupt Disable Register */
+#define AT91_SDRAMC_IMR         (AT91_MC + 0xac)        /* Interrupt Mask Register */
+#define AT91_SDRAMC_ISR         (AT91_MC + 0xb0)        /* Interrupt Status Register */
+
+/* Burst Flash Controller register */
+#define AT91_BFC_MR             (AT91_MC + 0xc0)        /* Mode Register */
+#define         AT91_BFC_BFCOM          (3   <<  0)             /* Burst Flash Controller Operating Mode */
+#define                 AT91_BFC_BFCOM_DISABLED (0 << 0)
+#define                 AT91_BFC_BFCOM_ASYNC    (1 << 0)
+#define                 AT91_BFC_BFCOM_BURST    (2 << 0)
+#define         AT91_BFC_BFCC           (3   <<  2)             /* Burst Flash Controller Clock */
+#define                 AT91_BFC_BFCC_MCK       (1 << 2)
+#define                 AT91_BFC_BFCC_DIV2      (2 << 2)
+#define                 AT91_BFC_BFCC_DIV4      (3 << 2)
+#define         AT91_BFC_AVL            (0xf <<  4)             /* Address Valid Latency */
+#define         AT91_BFC_PAGES          (7   <<  8)             /* Page Size */
+#define                 AT91_BFC_PAGES_NO_PAGE  (0 << 8)
+#define                 AT91_BFC_PAGES_16       (1 << 8)
+#define                 AT91_BFC_PAGES_32       (2 << 8)
+#define                 AT91_BFC_PAGES_64       (3 << 8)
+#define                 AT91_BFC_PAGES_128      (4 << 8)
+#define                 AT91_BFC_PAGES_256      (5 << 8)
+#define                 AT91_BFC_PAGES_512      (6 << 8)
+#define                 AT91_BFC_PAGES_1024     (7 << 8)
+#define         AT91_BFC_OEL            (3   << 12)             /* Output Enable Latency */
+#define         AT91_BFC_BAAEN          (1   << 16)             /* Burst Address Advance Enable */
+#define         AT91_BFC_BFOEH          (1   << 17)             /* Burst Flash Output Enable Handling */
+#define         AT91_BFC_MUXEN          (1   << 18)             /* Multiplexed Bus Enable */
+#define         AT91_BFC_RDYEN          (1   << 19)             /* Ready Enable Mode */
 
 #endif
diff --git a/include/asm-arm/arch-at91rm9200/param.h b/include/asm-arm/arch-at91rm9200/param.h
deleted file mode 100644
index 9480f8446852..000000000000
--- a/include/asm-arm/arch-at91rm9200/param.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * include/asm-arm/arch-at91rm9200/param.h
- *
- *  Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARCH_PARAM_H
-#define __ASM_ARCH_PARAM_H
-
-/*
- * We use default params
- */
-
-#endif
diff --git a/include/asm-arm/arch-at91rm9200/uncompress.h b/include/asm-arm/arch-at91rm9200/uncompress.h
index b30dd5520713..7b38497c24b5 100644
--- a/include/asm-arm/arch-at91rm9200/uncompress.h
+++ b/include/asm-arm/arch-at91rm9200/uncompress.h
@@ -31,21 +31,22 @@
  *
  * This does not append a newline
  */
-static void putstr(const char *s)
+static void putc(int c)
+{
+        void __iomem *sys = (void __iomem *) AT91_BASE_SYS;     /* physical address */
+
+        while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY))
+                barrier();
+        __raw_writel(c, sys + AT91_DBGU_THR);
+}
+
+static inline void flush(void)
 {
         void __iomem *sys = (void __iomem *) AT91_BASE_SYS;     /* physical address */
 
-        while (*s) {
-                while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
-                __raw_writel(*s, sys + AT91_DBGU_THR);
-                if (*s == '\n') {
-                        while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
-                        __raw_writel('\r', sys + AT91_DBGU_THR);
-                }
-                s++;
-        }
         /* wait for transmission to complete */
-        while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) { barrier(); }
+        while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
+                barrier();
 }
 
 #define arch_decomp_setup()
diff --git a/include/asm-arm/arch-cl7500/debug-macro.S b/include/asm-arm/arch-cl7500/debug-macro.S
index a5d489d7955a..9a2b67d24098 100644
--- a/include/asm-arm/arch-cl7500/debug-macro.S
+++ b/include/asm-arm/arch-cl7500/debug-macro.S
@@ -17,15 +17,5 @@
                 orr     \rx, \rx, #0x00000be0
                 .endm
 
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx]
-                .endm
-
-                .macro  busyuart,rd,rx
-                .endm
-
-                .macro  waituart,rd,rx
-1001:           ldrb    \rd, [\rx, #0x14]
-                tst     \rd, #0x20
-                beq     1001b
-                .endm
+#define UART_SHIFT      2
+#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-cl7500/param.h b/include/asm-arm/arch-cl7500/param.h
deleted file mode 100644
index 974bf69fbb1a..000000000000
--- a/include/asm-arm/arch-cl7500/param.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-cl7500/param.h
- *
- * Copyright (C) 1999 Nexus Electronics Ltd
- */
diff --git a/include/asm-arm/arch-cl7500/uncompress.h b/include/asm-arm/arch-cl7500/uncompress.h
index 68601b3e3b95..c437e0c88c3f 100644
--- a/include/asm-arm/arch-cl7500/uncompress.h
+++ b/include/asm-arm/arch-cl7500/uncompress.h
@@ -3,27 +3,19 @@
  *
  * Copyright (C) 1999, 2000 Nexus Electronics Ltd.
  */
-
 #define BASE 0x03010000
 #define SERBASE (BASE + (0x2f8 << 2))
 
-static __inline__ void putc(char c)
+static inline void putc(char c)
 {
-        while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20));
+        while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20))
+                barrier();
+
         *((volatile unsigned int *)(SERBASE)) = c;
 }
 
-/*
- * This does not append a newline
- */
-static void putstr(const char *s)
+static inline void flush(void)
 {
-        while (*s) {
-                putc(*s);
-                if (*s == '\n')
-                        putc('\r');
-                s++;
-        }
 }
 
 static __inline__ void arch_decomp_setup(void)
diff --git a/include/asm-arm/arch-clps711x/param.h b/include/asm-arm/arch-clps711x/param.h
deleted file mode 100644
index 86f6bd29623d..000000000000
--- a/include/asm-arm/arch-clps711x/param.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-clps711x/param.h
- *
- *  Copyright (C) 2000 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h
index 9fc4bcfa1681..07157b7e4b20 100644
--- a/include/asm-arm/arch-clps711x/uncompress.h
+++ b/include/asm-arm/arch-clps711x/uncompress.h
@@ -25,7 +25,6 @@
 #undef CLPS7111_BASE
 #define CLPS7111_BASE CLPS7111_PHYS_BASE
 
-#define barrier()               __asm__ __volatile__("": : :"memory")
 #define __raw_readl(p)          (*(unsigned long *)(p))
 #define __raw_writel(v,p)       (*(unsigned long *)(p) = (v))
 
@@ -40,21 +39,15 @@
 /*
  * This does not append a newline
  */
-static void putstr(const char *s)
+static inline void putc(int c)
 {
-        char c;
-
-        while ((c = *s++) != '\0') {
-                while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
-                        barrier();
-                clps_writel(c, UARTDRx);
+        while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
+                barrier();
+        clps_writel(c, UARTDRx);
+}
 
-                if (c == '\n') {
-                        while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
-                                barrier();
-                        clps_writel('\r', UARTDRx);
-                }
-        }
+static inline void flush(void)
+{
         while (clps_readl(SYSFLGx) & SYSFLG_UBUSY)
                 barrier();
 }
diff --git a/include/asm-arm/arch-ebsa110/debug-macro.S b/include/asm-arm/arch-ebsa110/debug-macro.S
index dcd03a40c502..f61cadabe0ec 100644
--- a/include/asm-arm/arch-ebsa110/debug-macro.S
+++ b/include/asm-arm/arch-ebsa110/debug-macro.S
@@ -16,19 +16,6 @@
                 orr     \rx, \rx, #0x00000be0
                 .endm
 
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx]
-                .endm
-
-                .macro  busyuart,rd,rx
-1002:           ldrb    \rd, [\rx, #0x14]
-                and     \rd, \rd, #0x60
-                teq     \rd, #0x60
-                bne     1002b
-                .endm
-
-                .macro  waituart,rd,rx
-1001:           ldrb    \rd, [\rx, #0x18]
-                tst     \rd, #0x10
-                beq     1001b
-                .endm
+#define UART_SHIFT      2
+#define FLOW_CONTROL
+#include <asm/hardware/debug-8250.h>
diff --git a/include/asm-arm/arch-ebsa110/param.h b/include/asm-arm/arch-ebsa110/param.h
deleted file mode 100644
index be19b08d1c75..000000000000
--- a/include/asm-arm/arch-ebsa110/param.h
+++ /dev/null
@@ -1,4 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-ebsa110/param.h
- */
-#define HZ      200
diff --git a/include/asm-arm/arch-ebsa110/uncompress.h b/include/asm-arm/arch-ebsa110/uncompress.h
index eee95581a923..66b19c7fd908 100644
--- a/include/asm-arm/arch-ebsa110/uncompress.h
+++ b/include/asm-arm/arch-ebsa110/uncompress.h
@@ -8,33 +8,34 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/serial_reg.h>
+
+#define SERIAL_BASE     ((unsigned char *)0xfe000be0)
+
 /*
  * This does not append a newline
  */
-static void putstr(const char *s)
+static inline void putc(int c)
+{
+        unsigned char v, *base = SERIAL_BASE;
+
+        do {
+                v = base[UART_LSR << 2];
+                barrier();
+        } while (!(v & UART_LSR_THRE));
+
+        base[UART_TX << 2] = c;
+}
+
+static inline void flush(void)
 {
-        unsigned long tmp1, tmp2;
-        __asm__ __volatile__(
-        "ldrb   %0, [%2], #1\n"
-"       teq     %0, #0\n"
-"       beq     3f\n"
-"1:     strb    %0, [%3]\n"
-"2:     ldrb    %1, [%3, #0x14]\n"
-"       and     %1, %1, #0x60\n"
-"       teq     %1, #0x60\n"
-"       bne     2b\n"
-"       teq     %0, #'\n'\n"
-"       moveq   %0, #'\r'\n"
-"       beq     1b\n"
-"       ldrb    %0, [%2], #1\n"
-"       teq     %0, #0\n"
-"       bne     1b\n"
-"3:     ldrb    %1, [%3, #0x14]\n"
-"       and     %1, %1, #0x60\n"
-"       teq     %1, #0x60\n"
-"       bne     3b"
-        : "=&r" (tmp1), "=&r" (tmp2)
-        : "r" (s), "r" (0xf0000be0) : "cc");
+        unsigned char v, *base = SERIAL_BASE;
+
+        do {
+                v = base[UART_LSR << 2];
+                barrier();
+        } while ((v & (UART_LSR_TEMT|UART_LSR_THRE)) !=
+                 (UART_LSR_TEMT|UART_LSR_THRE));
 }
 
 /*
diff --git a/include/asm-arm/arch-ebsa285/debug-macro.S b/include/asm-arm/arch-ebsa285/debug-macro.S
index 97d15fc629af..b48cec4a0c45 100644
--- a/include/asm-arm/arch-ebsa285/debug-macro.S
+++ b/include/asm-arm/arch-ebsa285/debug-macro.S
@@ -23,22 +23,10 @@
                 orr     \rx, \rx, #0x000003f8
                 .endm
 
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx]
-                .endm
+#define UART_SHIFT      0
+#define FLOW_CONTROL
+#include <asm/hardware/debug-8250.S>
 
-                .macro  busyuart,rd,rx
-1002:           ldrb    \rd, [\rx, #0x5]
-                and     \rd, \rd, #0x60
-                teq     \rd, #0x60
-                bne     1002b
-                .endm
-
-                .macro  waituart,rd,rx
-1001:           ldrb    \rd, [\rx, #0x6]
-                tst     \rd, #0x10
-                beq     1001b
-                .endm
 #else
         /* For EBSA285 debugging */
                 .equ    dc21285_high, ARMCSR_BASE & 0xff000000
diff --git a/include/asm-arm/arch-ebsa285/param.h b/include/asm-arm/arch-ebsa285/param.h
deleted file mode 100644
index 3827103b27a0..000000000000
--- a/include/asm-arm/arch-ebsa285/param.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-ebsa285/param.h
- */
diff --git a/include/asm-arm/arch-ebsa285/uncompress.h b/include/asm-arm/arch-ebsa285/uncompress.h
index c2fd84e2d90e..86142c882b3a 100644
--- a/include/asm-arm/arch-ebsa285/uncompress.h
+++ b/include/asm-arm/arch-ebsa285/uncompress.h
@@ -15,10 +15,11 @@
 #define DC21285_BASE ((volatile unsigned int *)0x42000160)
 #define SER0_BASE    ((volatile unsigned char *)0x7c0003f8)
 
-static __inline__ void putc(char c)
+static inline void putc(char c)
 {
         if (machine_is_netwinder()) {
-                while ((SER0_BASE[5] & 0x60) != 0x60);
+                while ((SER0_BASE[5] & 0x60) != 0x60)
+                        barrier();
                 SER0_BASE[0] = c;
         } else {
                 while (DC21285_BASE[6] & 8);
@@ -26,17 +27,8 @@ static __inline__ void putc(char c)
         }
 }
 
-/*
- * This does not append a newline
- */
-static void putstr(const char *s)
+static inline void flush(void)
 {
-        while (*s) {
-                putc(*s);
-                if (*s == '\n')
-                        putc('\r');
-                s++;
-        }
 }
 
 /*
diff --git a/include/asm-arm/arch-ep93xx/debug-macro.S b/include/asm-arm/arch-ep93xx/debug-macro.S
new file mode 100644
index 000000000000..397565a0c671
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/debug-macro.S
@@ -0,0 +1,22 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/debug-macro.S
+ * Debugging macro include header
+ *
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+#include <asm/arch/ep93xx-regs.h>
+
+                .macro  addruart,rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1                         @ MMU enabled?
+                ldreq   \rx, =EP93XX_APB_PHYS_BASE      @ Physical base
+                ldrne   \rx, =EP93XX_APB_VIRT_BASE      @ virtual base
+                orr     \rx, \rx, #0x000c0000
+                .endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/include/asm-arm/arch-ep93xx/dma.h b/include/asm-arm/arch-ep93xx/dma.h
new file mode 100644
index 000000000000..898b3ab7fd46
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/dma.h
@@ -0,0 +1,3 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/dma.h
+ */
diff --git a/include/asm-arm/arch-ep93xx/entry-macro.S b/include/asm-arm/arch-ep93xx/entry-macro.S
new file mode 100644
index 000000000000..84140a28dfcf
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/entry-macro.S
@@ -0,0 +1,53 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/entry-macro.S
+ * IRQ demultiplexing for EP93xx
+ *
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+#include <asm/arch/ep93xx-regs.h>
+
+                .macro  disable_fiq
+                .endm
+
+                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+                ldr     \base, =(EP93XX_AHB_VIRT_BASE)
+                orr     \base, \base, #0x000b0000
+                mov     \irqnr, #0
+                ldr     \irqstat, [\base]               @ lower 32 interrupts
+                cmp     \irqstat, #0
+                bne     1001f
+
+                eor     \base, \base, #0x00070000
+                ldr     \irqstat, [\base]               @ upper 32 interrupts
+                cmp     \irqstat, #0
+                beq     1002f
+                mov     \irqnr, #0x20
+
+1001:
+                movs    \tmp, \irqstat, lsl #16
+                movne   \irqstat, \tmp
+                addeq   \irqnr, \irqnr, #16
+
+                movs    \tmp, \irqstat, lsl #8
+                movne   \irqstat, \tmp
+                addeq   \irqnr, \irqnr, #8
+
+                movs    \tmp, \irqstat, lsl #4
+                movne   \irqstat, \tmp
+                addeq   \irqnr, \irqnr, #4
+
+                movs    \tmp, \irqstat, lsl #2
+                movne   \irqstat, \tmp
+                addeq   \irqnr, \irqnr, #2
+
+                movs    \tmp, \irqstat, lsl #1
+                addeq   \irqnr, \irqnr, #1
+                orrs    \base, \base, #1
+
+1002:
+                .endm
diff --git a/include/asm-arm/arch-ep93xx/ep93xx-regs.h b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
new file mode 100644
index 000000000000..71cea0b5841b
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/ep93xx-regs.h
@@ -0,0 +1,125 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/ep93xx-regs.h
+ */
+
+#ifndef __ASM_ARCH_EP93XX_REGS_H
+#define __ASM_ARCH_EP93XX_REGS_H
+
+/*
+ * EP93xx linux memory map:
+ *
+ * virt         phys            size
+ * fe800000                     5M              per-platform mappings
+ * fed00000     80800000        2M              APB
+ * fef00000     80000000        1M              AHB
+ */
+
+#define EP93XX_AHB_PHYS_BASE            0x80000000
+#define EP93XX_AHB_VIRT_BASE            0xfef00000
+#define EP93XX_AHB_SIZE                 0x00100000
+
+#define EP93XX_APB_PHYS_BASE            0x80800000
+#define EP93XX_APB_VIRT_BASE            0xfed00000
+#define EP93XX_APB_SIZE                 0x00200000
+
+
+/* AHB peripherals */
+#define EP93XX_DMA_BASE                 (EP93XX_AHB_VIRT_BASE + 0x00000000)
+
+#define EP93XX_ETHERNET_BASE            (EP93XX_AHB_VIRT_BASE + 0x00010000)
+
+#define EP93XX_USB_BASE                 (EP93XX_AHB_VIRT_BASE + 0x00020000)
+#define EP93XX_USB_PHYS_BASE            (EP93XX_AHB_PHYS_BASE + 0x00020000)
+
+#define EP93XX_RASTER_BASE              (EP93XX_AHB_VIRT_BASE + 0x00030000)
+
+#define EP93XX_GRAPHICS_ACCEL_BASE      (EP93XX_AHB_VIRT_BASE + 0x00040000)
+
+#define EP93XX_SDRAM_CONTROLLER_BASE    (EP93XX_AHB_VIRT_BASE + 0x00060000)
+
+#define EP93XX_PCMCIA_CONTROLLER_BASE   (EP93XX_AHB_VIRT_BASE + 0x00080000)
+
+#define EP93XX_BOOT_ROM_BASE            (EP93XX_AHB_VIRT_BASE + 0x00090000)
+
+#define EP93XX_IDE_BASE                 (EP93XX_AHB_VIRT_BASE + 0x000a0000)
+
+#define EP93XX_VIC1_BASE                (EP93XX_AHB_VIRT_BASE + 0x000b0000)
+
+#define EP93XX_VIC2_BASE                (EP93XX_AHB_VIRT_BASE + 0x000c0000)
+
+
+/* APB peripherals */
+#define EP93XX_TIMER_BASE               (EP93XX_APB_VIRT_BASE + 0x00010000)
+#define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
+#define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
+#define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
+#define EP93XX_TIMER1_CONTROL           EP93XX_TIMER_REG(0x08)
+#define EP93XX_TIMER1_CLEAR             EP93XX_TIMER_REG(0x0c)
+#define EP93XX_TIMER2_LOAD              EP93XX_TIMER_REG(0x20)
+#define EP93XX_TIMER2_VALUE             EP93XX_TIMER_REG(0x24)
+#define EP93XX_TIMER2_CONTROL           EP93XX_TIMER_REG(0x28)
+#define EP93XX_TIMER2_CLEAR             EP93XX_TIMER_REG(0x2c)
+#define EP93XX_TIMER4_VALUE_LOW         EP93XX_TIMER_REG(0x60)
+#define EP93XX_TIMER4_VALUE_HIGH        EP93XX_TIMER_REG(0x64)
+#define EP93XX_TIMER3_LOAD              EP93XX_TIMER_REG(0x80)
+#define EP93XX_TIMER3_VALUE             EP93XX_TIMER_REG(0x84)
+#define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
+#define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
+
+#define EP93XX_I2S_BASE                 (EP93XX_APB_VIRT_BASE + 0x00020000)
+
+#define EP93XX_SECURITY_BASE            (EP93XX_APB_VIRT_BASE + 0x00030000)
+
+#define EP93XX_GPIO_BASE                (EP93XX_APB_VIRT_BASE + 0x00040000)
+#define EP93XX_GPIO_REG(x)              (EP93XX_GPIO_BASE + (x))
+#define EP93XX_GPIO_A_INT_TYPE1         EP93XX_GPIO_REG(0x90)
+#define EP93XX_GPIO_A_INT_TYPE2         EP93XX_GPIO_REG(0x94)
+#define EP93XX_GPIO_A_INT_ACK           EP93XX_GPIO_REG(0x98)
+#define EP93XX_GPIO_A_INT_ENABLE        EP93XX_GPIO_REG(0x9c)
+#define EP93XX_GPIO_A_INT_STATUS        EP93XX_GPIO_REG(0xa0)
+#define EP93XX_GPIO_B_INT_TYPE1         EP93XX_GPIO_REG(0xac)
+#define EP93XX_GPIO_B_INT_TYPE2         EP93XX_GPIO_REG(0xb0)
+#define EP93XX_GPIO_B_INT_ACK           EP93XX_GPIO_REG(0xb4)
+#define EP93XX_GPIO_B_INT_ENABLE        EP93XX_GPIO_REG(0xb8)
+#define EP93XX_GPIO_B_INT_STATUS        EP93XX_GPIO_REG(0xbc)
+
+#define EP93XX_AAC_BASE                 (EP93XX_APB_VIRT_BASE + 0x00080000)
+
+#define EP93XX_SPI_BASE                 (EP93XX_APB_VIRT_BASE + 0x000a0000)
+
+#define EP93XX_IRDA_BASE                (EP93XX_APB_VIRT_BASE + 0x000b0000)
+
+#define EP93XX_UART1_BASE               (EP93XX_APB_VIRT_BASE + 0x000c0000)
+#define EP93XX_UART1_PHYS_BASE          (EP93XX_APB_PHYS_BASE + 0x000c0000)
+
+#define EP93XX_UART2_BASE               (EP93XX_APB_VIRT_BASE + 0x000d0000)
+#define EP93XX_UART2_PHYS_BASE          (EP93XX_APB_PHYS_BASE + 0x000d0000)
+
+#define EP93XX_UART3_BASE               (EP93XX_APB_VIRT_BASE + 0x000e0000)
+#define EP93XX_UART3_PHYS_BASE          (EP93XX_APB_PHYS_BASE + 0x000e0000)
+
+#define EP93XX_KEY_MATRIX_BASE          (EP93XX_APB_VIRT_BASE + 0x000f0000)
+
+#define EP93XX_ADC_BASE                 (EP93XX_APB_VIRT_BASE + 0x00100000)
+#define EP93XX_TOUCHSCREEN_BASE         (EP93XX_APB_VIRT_BASE + 0x00100000)
+
+#define EP93XX_PWM_BASE                 (EP93XX_APB_VIRT_BASE + 0x00110000)
+
+#define EP93XX_RTC_BASE                 (EP93XX_APB_VIRT_BASE + 0x00120000)
+
+#define EP93XX_SYSCON_BASE              (EP93XX_APB_VIRT_BASE + 0x00130000)
+#define EP93XX_SYSCON_REG(x)            (EP93XX_SYSCON_BASE + (x))
+#define EP93XX_SYSCON_POWER_STATE       EP93XX_SYSCON_REG(0x00)
+#define EP93XX_SYSCON_CLOCK_CONTROL     EP93XX_SYSCON_REG(0x04)
+#define EP93XX_SYSCON_CLOCK_UARTBAUD    0x20000000
+#define EP93XX_SYSCON_CLOCK_USH_EN      0x10000000
+#define EP93XX_SYSCON_HALT              EP93XX_SYSCON_REG(0x08)
+#define EP93XX_SYSCON_STANDBY           EP93XX_SYSCON_REG(0x0c)
+#define EP93XX_SYSCON_DEVICE_CONFIG     EP93XX_SYSCON_REG(0x80)
+#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE       0x00800000
+#define EP93XX_SYSCON_SWLOCK            EP93XX_SYSCON_REG(0xc0)
+
+#define EP93XX_WATCHDOG_BASE            (EP93XX_APB_VIRT_BASE + 0x00140000)
+
+
+#endif
diff --git a/include/asm-arm/arch-ep93xx/gesbc9312.h b/include/asm-arm/arch-ep93xx/gesbc9312.h
new file mode 100644
index 000000000000..4d0b3023bff7
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/gesbc9312.h
@@ -0,0 +1,3 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/gesbc9312.h
+ */
diff --git a/include/asm-arm/arch-ep93xx/gpio.h b/include/asm-arm/arch-ep93xx/gpio.h
new file mode 100644
index 000000000000..1ee14a14cba0
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/gpio.h
@@ -0,0 +1,107 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/gpio.h
+ */
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H
+
+#define GPIO_IN                         0
+#define GPIO_OUT                        1
+
+#define EP93XX_GPIO_LOW                 0
+#define EP93XX_GPIO_HIGH                1
+
+extern void gpio_line_config(int line, int direction);
+extern int  gpio_line_get(int line);
+extern void gpio_line_set(int line, int value);
+
+/* GPIO port A.  */
+#define EP93XX_GPIO_LINE_A(x)           ((x) + 0)
+#define EP93XX_GPIO_LINE_EGPIO0         EP93XX_GPIO_LINE_A(0)
+#define EP93XX_GPIO_LINE_EGPIO1         EP93XX_GPIO_LINE_A(1)
+#define EP93XX_GPIO_LINE_EGPIO2         EP93XX_GPIO_LINE_A(2)
+#define EP93XX_GPIO_LINE_EGPIO3         EP93XX_GPIO_LINE_A(3)
+#define EP93XX_GPIO_LINE_EGPIO4         EP93XX_GPIO_LINE_A(4)
+#define EP93XX_GPIO_LINE_EGPIO5         EP93XX_GPIO_LINE_A(5)
+#define EP93XX_GPIO_LINE_EGPIO6         EP93XX_GPIO_LINE_A(6)
+#define EP93XX_GPIO_LINE_EGPIO7         EP93XX_GPIO_LINE_A(7)
+
+/* GPIO port B.  */
+#define EP93XX_GPIO_LINE_B(x)           ((x) + 8)
+#define EP93XX_GPIO_LINE_EGPIO8         EP93XX_GPIO_LINE_B(0)
+#define EP93XX_GPIO_LINE_EGPIO9         EP93XX_GPIO_LINE_B(1)
+#define EP93XX_GPIO_LINE_EGPIO10        EP93XX_GPIO_LINE_B(2)
+#define EP93XX_GPIO_LINE_EGPIO11        EP93XX_GPIO_LINE_B(3)
+#define EP93XX_GPIO_LINE_EGPIO12        EP93XX_GPIO_LINE_B(4)
+#define EP93XX_GPIO_LINE_EGPIO13        EP93XX_GPIO_LINE_B(5)
+#define EP93XX_GPIO_LINE_EGPIO14        EP93XX_GPIO_LINE_B(6)
+#define EP93XX_GPIO_LINE_EGPIO15        EP93XX_GPIO_LINE_B(7)
+
+/* GPIO port C.  */
+#define EP93XX_GPIO_LINE_C(x)           ((x) + 16)
+#define EP93XX_GPIO_LINE_ROW0           EP93XX_GPIO_LINE_C(0)
+#define EP93XX_GPIO_LINE_ROW1           EP93XX_GPIO_LINE_C(1)
+#define EP93XX_GPIO_LINE_ROW2           EP93XX_GPIO_LINE_C(2)
+#define EP93XX_GPIO_LINE_ROW3           EP93XX_GPIO_LINE_C(3)
+#define EP93XX_GPIO_LINE_ROW4           EP93XX_GPIO_LINE_C(4)
+#define EP93XX_GPIO_LINE_ROW5           EP93XX_GPIO_LINE_C(5)
+#define EP93XX_GPIO_LINE_ROW6           EP93XX_GPIO_LINE_C(6)
+#define EP93XX_GPIO_LINE_ROW7           EP93XX_GPIO_LINE_C(7)
+
+/* GPIO port D.  */
+#define EP93XX_GPIO_LINE_D(x)           ((x) + 24)
+#define EP93XX_GPIO_LINE_COL0           EP93XX_GPIO_LINE_D(0)
+#define EP93XX_GPIO_LINE_COL1           EP93XX_GPIO_LINE_D(1)
+#define EP93XX_GPIO_LINE_COL2           EP93XX_GPIO_LINE_D(2)
+#define EP93XX_GPIO_LINE_COL3           EP93XX_GPIO_LINE_D(3)
+#define EP93XX_GPIO_LINE_COL4           EP93XX_GPIO_LINE_D(4)
+#define EP93XX_GPIO_LINE_COL5           EP93XX_GPIO_LINE_D(5)
+#define EP93XX_GPIO_LINE_COL6           EP93XX_GPIO_LINE_D(6)
+#define EP93XX_GPIO_LINE_COL7           EP93XX_GPIO_LINE_D(7)
+
+/* GPIO port E.  */
+#define EP93XX_GPIO_LINE_E(x)           ((x) + 32)
+#define EP93XX_GPIO_LINE_GRLED          EP93XX_GPIO_LINE_E(0)
+#define EP93XX_GPIO_LINE_RDLED          EP93XX_GPIO_LINE_E(1)
+#define EP93XX_GPIO_LINE_DIORn          EP93XX_GPIO_LINE_E(2)
+#define EP93XX_GPIO_LINE_IDECS1n        EP93XX_GPIO_LINE_E(3)
+#define EP93XX_GPIO_LINE_IDECS2n        EP93XX_GPIO_LINE_E(4)
+#define EP93XX_GPIO_LINE_IDEDA0         EP93XX_GPIO_LINE_E(5)
+#define EP93XX_GPIO_LINE_IDEDA1         EP93XX_GPIO_LINE_E(6)
+#define EP93XX_GPIO_LINE_IDEDA2         EP93XX_GPIO_LINE_E(7)
+
+/* GPIO port F.  */
+#define EP93XX_GPIO_LINE_F(x)           ((x) + 40)
+#define EP93XX_GPIO_LINE_WP             EP93XX_GPIO_LINE_F(0)
+#define EP93XX_GPIO_LINE_MCCD1          EP93XX_GPIO_LINE_F(1)
+#define EP93XX_GPIO_LINE_MCCD2          EP93XX_GPIO_LINE_F(2)
+#define EP93XX_GPIO_LINE_MCBVD1         EP93XX_GPIO_LINE_F(3)
+#define EP93XX_GPIO_LINE_MCBVD2         EP93XX_GPIO_LINE_F(4)
+#define EP93XX_GPIO_LINE_VS1            EP93XX_GPIO_LINE_F(5)
+#define EP93XX_GPIO_LINE_READY          EP93XX_GPIO_LINE_F(6)
+#define EP93XX_GPIO_LINE_VS2            EP93XX_GPIO_LINE_F(7)
+
+/* GPIO port G.  */
+#define EP93XX_GPIO_LINE_G(x)           ((x) + 48)
+#define EP93XX_GPIO_LINE_EECLK          EP93XX_GPIO_LINE_G(0)
+#define EP93XX_GPIO_LINE_EEDAT          EP93XX_GPIO_LINE_G(1)
+#define EP93XX_GPIO_LINE_SLA0           EP93XX_GPIO_LINE_G(2)
+#define EP93XX_GPIO_LINE_SLA1           EP93XX_GPIO_LINE_G(3)
+#define EP93XX_GPIO_LINE_DD12           EP93XX_GPIO_LINE_G(4)
+#define EP93XX_GPIO_LINE_DD13           EP93XX_GPIO_LINE_G(5)
+#define EP93XX_GPIO_LINE_DD14           EP93XX_GPIO_LINE_G(6)
+#define EP93XX_GPIO_LINE_DD15           EP93XX_GPIO_LINE_G(7)
+
+/* GPIO port H.  */
+#define EP93XX_GPIO_LINE_H(x)           ((x) + 56)
+#define EP93XX_GPIO_LINE_DD0            EP93XX_GPIO_LINE_H(0)
+#define EP93XX_GPIO_LINE_DD1            EP93XX_GPIO_LINE_H(1)
+#define EP93XX_GPIO_LINE_DD2            EP93XX_GPIO_LINE_H(2)
+#define EP93XX_GPIO_LINE_DD3            EP93XX_GPIO_LINE_H(3)
+#define EP93XX_GPIO_LINE_DD4            EP93XX_GPIO_LINE_H(4)
+#define EP93XX_GPIO_LINE_DD5            EP93XX_GPIO_LINE_H(5)
+#define EP93XX_GPIO_LINE_DD6            EP93XX_GPIO_LINE_H(6)
+#define EP93XX_GPIO_LINE_DD7            EP93XX_GPIO_LINE_H(7)
+
+
+#endif
diff --git a/include/asm-arm/arch-ep93xx/hardware.h b/include/asm-arm/arch-ep93xx/hardware.h
new file mode 100644
index 000000000000..9b69f454065d
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/hardware.h
@@ -0,0 +1,12 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/hardware.h
+ */
+
+#include "ep93xx-regs.h"
+
+#define pcibios_assign_all_busses()     0
+
+#include "platform.h"
+
+#include "gesbc9312.h"
+#include "ts72xx.h"
diff --git a/include/asm-arm/arch-ep93xx/io.h b/include/asm-arm/arch-ep93xx/io.h
new file mode 100644
index 000000000000..7b4d25e29060
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/io.h
@@ -0,0 +1,8 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/io.h
+ */
+
+#define IO_SPACE_LIMIT          0xffffffff
+
+#define __io(p)                 ((void __iomem *)(p))
+#define __mem_pci(p)            (p)
diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h
new file mode 100644
index 000000000000..9a42f5de9e57
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/irqs.h
@@ -0,0 +1,80 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/irqs.h
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+#define IRQ_EP93XX_COMMRX               2
+#define IRQ_EP93XX_COMMTX               3
+#define IRQ_EP93XX_TIMER1               4
+#define IRQ_EP93XX_TIMER2               5
+#define IRQ_EP93XX_AACINTR              6
+#define IRQ_EP93XX_DMAM2P0              7
+#define IRQ_EP93XX_DMAM2P1              8
+#define IRQ_EP93XX_DMAM2P2              9
+#define IRQ_EP93XX_DMAM2P3              10
+#define IRQ_EP93XX_DMAM2P4              11
+#define IRQ_EP93XX_DMAM2P5              12
+#define IRQ_EP93XX_DMAM2P6              13
+#define IRQ_EP93XX_DMAM2P7              14
+#define IRQ_EP93XX_DMAM2P8              15
+#define IRQ_EP93XX_DMAM2P9              16
+#define IRQ_EP93XX_DMAM2M0              17
+#define IRQ_EP93XX_DMAM2M1              18
+#define IRQ_EP93XX_GPIO0MUX             20
+#define IRQ_EP93XX_GPIO1MUX             21
+#define IRQ_EP93XX_GPIO2MUX             22
+#define IRQ_EP93XX_GPIO3MUX             22
+#define IRQ_EP93XX_UART1RX              23
+#define IRQ_EP93XX_UART1TX              24
+#define IRQ_EP93XX_UART2RX              25
+#define IRQ_EP93XX_UART2TX              26
+#define IRQ_EP93XX_UART3RX              27
+#define IRQ_EP93XX_UART3TX              28
+#define IRQ_EP93XX_KEY                  29
+#define IRQ_EP93XX_TOUCH                30
+#define EP93XX_VIC1_VALID_IRQ_MASK      0x7ffffffc
+
+#define IRQ_EP93XX_EXT0                 32
+#define IRQ_EP93XX_EXT1                 33
+#define IRQ_EP93XX_EXT2                 34
+#define IRQ_EP93XX_64HZ                 35
+#define IRQ_EP93XX_WATCHDOG             36
+#define IRQ_EP93XX_RTC                  37
+#define IRQ_EP93XX_IRDA                 38
+#define IRQ_EP93XX_ETHERNET             39
+#define IRQ_EP93XX_EXT3                 40
+#define IRQ_EP93XX_PROG                 41
+#define IRQ_EP93XX_1HZ                  42
+#define IRQ_EP93XX_VSYNC                43
+#define IRQ_EP93XX_VIDEO_FIFO           44
+#define IRQ_EP93XX_SSP1RX               45
+#define IRQ_EP93XX_SSP1TX               46
+#define IRQ_EP93XX_GPIO4MUX             47
+#define IRQ_EP93XX_GPIO5MUX             48
+#define IRQ_EP93XX_GPIO6MUX             49
+#define IRQ_EP93XX_GPIO7MUX             50
+#define IRQ_EP93XX_TIMER3               51
+#define IRQ_EP93XX_UART1                52
+#define IRQ_EP93XX_SSP                  53
+#define IRQ_EP93XX_UART2                54
+#define IRQ_EP93XX_UART3                55
+#define IRQ_EP93XX_USB                  56
+#define IRQ_EP93XX_ETHERNET_PME         57
+#define IRQ_EP93XX_DSP                  58
+#define IRQ_EP93XX_GPIO_AB              59
+#define IRQ_EP93XX_SAI                  60
+#define EP93XX_VIC2_VALID_IRQ_MASK      0x1fffffff
+
+#define IRQ_EP93XX_GPIO(x)              (64 + (x))
+
+#define NR_EP93XX_IRQS                  IRQ_EP93XX_GPIO(16)
+
+#define EP93XX_BOARD_IRQ(x)             (NR_EP93XX_IRQS + (x))
+#define EP93XX_BOARD_IRQS               32
+
+#define NR_IRQS                         (NR_EP93XX_IRQS + EP93XX_BOARD_IRQS)
+
+
+#endif
diff --git a/include/asm-arm/arch-ep93xx/memory.h b/include/asm-arm/arch-ep93xx/memory.h
new file mode 100644
index 000000000000..4b1a5c7c8363
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/memory.h
@@ -0,0 +1,14 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/memory.h
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET             UL(0x00000000)
+
+#define __bus_to_virt(x)        __phys_to_virt(x)
+#define __virt_to_bus(x)        __virt_to_phys(x)
+
+
+#endif
diff --git a/include/asm-arm/arch-ep93xx/platform.h b/include/asm-arm/arch-ep93xx/platform.h
new file mode 100644
index 000000000000..df9cbb6ef660
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/platform.h
@@ -0,0 +1,14 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/platform.h
+ */
+
+#ifndef __ASSEMBLY__
+
+void ep93xx_map_io(void);
+void ep93xx_init_irq(void);
+void ep93xx_init_time(unsigned long);
+void ep93xx_init_devices(void);
+extern struct sys_timer ep93xx_timer;
+
+
+#endif
diff --git a/include/asm-arm/arch-ep93xx/system.h b/include/asm-arm/arch-ep93xx/system.h
new file mode 100644
index 000000000000..79b718586746
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/system.h
@@ -0,0 +1,26 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/system.h
+ */
+
+#include <asm/hardware.h>
+
+static inline void arch_idle(void)
+{
+        cpu_do_idle();
+}
+
+static inline void arch_reset(char mode)
+{
+        u32 devicecfg;
+
+        local_irq_disable();
+
+        devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
+        __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
+        __raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
+        __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
+        __raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
+
+        while (1)
+                ;
+}
diff --git a/include/asm-arm/arch-ep93xx/timex.h b/include/asm-arm/arch-ep93xx/timex.h
new file mode 100644
index 000000000000..4140bddc97e2
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/timex.h
@@ -0,0 +1,5 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/timex.h
+ */
+
+#define CLOCK_TICK_RATE         983040
diff --git a/include/asm-arm/arch-ep93xx/ts72xx.h b/include/asm-arm/arch-ep93xx/ts72xx.h
new file mode 100644
index 000000000000..412215e77f44
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/ts72xx.h
@@ -0,0 +1,90 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/ts72xx.h
+ */
+
+/*
+ * TS72xx memory map:
+ *
+ * virt         phys            size
+ * febff000     22000000        4K      model number register
+ * febfe000     22400000        4K      options register
+ * febfd000     22800000        4K      options register #2
+ * febfc000     [67]0000000     4K      NAND data register
+ * febfb000     [67]0400000     4K      NAND control register
+ * febfa000     [67]0800000     4K      NAND busy register
+ */
+
+#define TS72XX_MODEL_PHYS_BASE          0x22000000
+#define TS72XX_MODEL_VIRT_BASE          0xfebff000
+#define TS72XX_MODEL_SIZE               0x00001000
+
+#define TS72XX_MODEL_TS7200             0x00
+#define TS72XX_MODEL_TS7250             0x01
+#define TS72XX_MODEL_TS7260             0x02
+
+
+#define TS72XX_OPTIONS_PHYS_BASE        0x22400000
+#define TS72XX_OPTIONS_VIRT_BASE        0xfebfe000
+#define TS72XX_OPTIONS_SIZE             0x00001000
+
+#define TS72XX_OPTIONS_COM2_RS485       0x02
+#define TS72XX_OPTIONS_MAX197           0x01
+
+
+#define TS72XX_OPTIONS2_PHYS_BASE       0x22800000
+#define TS72XX_OPTIONS2_VIRT_BASE       0xfebfd000
+#define TS72XX_OPTIONS2_SIZE            0x00001000
+
+#define TS72XX_OPTIONS2_TS9420          0x04
+#define TS72XX_OPTIONS2_TS9420_BOOT     0x02
+
+
+#define TS72XX_NOR_PHYS_BASE            0x60000000
+#define TS72XX_NOR2_PHYS_BASE           0x62000000
+
+#define TS72XX_NAND1_DATA_PHYS_BASE     0x60000000
+#define TS72XX_NAND2_DATA_PHYS_BASE     0x70000000
+#define TS72XX_NAND_DATA_VIRT_BASE      0xfebfc000
+#define TS72XX_NAND_DATA_SIZE           0x00001000
+
+#define TS72XX_NAND1_CONTROL_PHYS_BASE  0x60400000
+#define TS72XX_NAND2_CONTROL_PHYS_BASE  0x70400000
+#define TS72XX_NAND_CONTROL_VIRT_BASE   0xfebfb000
+#define TS72XX_NAND_CONTROL_SIZE        0x00001000
+
+#define TS72XX_NAND1_BUSY_PHYS_BASE     0x60800000
+#define TS72XX_NAND2_BUSY_PHYS_BASE     0x70800000
+#define TS72XX_NAND_BUSY_VIRT_BASE      0xfebfa000
+#define TS72XX_NAND_BUSY_SIZE           0x00001000
+
+
+#ifndef __ASSEMBLY__
+#include <asm/io.h>
+
+static inline int board_is_ts7200(void)
+{
+        return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200;
+}
+
+static inline int board_is_ts7250(void)
+{
+        return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250;
+}
+
+static inline int board_is_ts7260(void)
+{
+        return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260;
+}
+
+static inline int is_max197_installed(void)
+{
+        return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
+                                        TS72XX_OPTIONS_MAX197);
+}
+
+static inline int is_ts9420_installed(void)
+{
+        return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
+                                        TS72XX_OPTIONS2_TS9420);
+}
+#endif
diff --git a/include/asm-arm/arch-ep93xx/uncompress.h b/include/asm-arm/arch-ep93xx/uncompress.h
new file mode 100644
index 000000000000..c15274c85d5d
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/uncompress.h
@@ -0,0 +1,85 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/uncompress.h
+ *
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <asm/arch/ep93xx-regs.h>
+
+static unsigned char __raw_readb(unsigned int ptr)
+{
+        return *((volatile unsigned char *)ptr);
+}
+
+static unsigned int __raw_readl(unsigned int ptr)
+{
+        return *((volatile unsigned int *)ptr);
+}
+
+static void __raw_writeb(unsigned char value, unsigned int ptr)
+{
+        *((volatile unsigned char *)ptr) = value;
+}
+
+static void __raw_writel(unsigned int value, unsigned int ptr)
+{
+        *((volatile unsigned int *)ptr) = value;
+}
+
+
+#define PHYS_UART1_DATA         0x808c0000
+#define PHYS_UART1_FLAG         0x808c0018
+#define UART1_FLAG_TXFF         0x20
+
+static inline void putc(int c)
+{
+        int i;
+
+        for (i = 0; i < 1000; i++) {
+                /* Transmit fifo not full?  */
+                if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF))
+                        break;
+        }
+
+        __raw_writeb(c, PHYS_UART1_DATA);
+}
+
+static inline void flush(void)
+{
+}
+
+
+/*
+ * Some bootloaders don't turn off DMA from the ethernet MAC before
+ * jumping to linux, which means that we might end up with bits of RX
+ * status and packet data scribbled over the uncompressed kernel image.
+ * Work around this by resetting the ethernet MAC before we uncompress.
+ */
+#define PHYS_ETH_SELF_CTL               0x80010020
+#define ETH_SELF_CTL_RESET              0x00000001
+
+static void ethernet_reset(void)
+{
+        unsigned int v;
+
+        /* Reset the ethernet MAC.  */
+        v = __raw_readl(PHYS_ETH_SELF_CTL);
+        __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
+
+        /* Wait for reset to finish.  */
+        while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
+                ;
+}
+
+
+static void arch_decomp_setup(void)
+{
+        ethernet_reset();
+}
+
+#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-ep93xx/vmalloc.h b/include/asm-arm/arch-ep93xx/vmalloc.h
new file mode 100644
index 000000000000..205ea6b1cf5e
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/vmalloc.h
@@ -0,0 +1,5 @@
+/*
+ * linux/include/asm-arm/arch-ep93xx/vmalloc.h
+ */
+
+#define VMALLOC_END     0xfe800000
diff --git a/include/asm-arm/arch-h720x/irq.h b/include/asm-arm/arch-h720x/irq.h
deleted file mode 100644
index b3821e957aa4..000000000000
--- a/include/asm-arm/arch-h720x/irq.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * include/asm-arm/arch-h720x/irq.h
- *
- * Copyright (C) 2000-2002 Jungjun Kim
- *           (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
- *           (C) 2003 Thomas Gleixner <tglx@linutronix.de>
- */
-
-#ifndef __ASM_ARCH_IRQ_H
-#define __ASM_ARCH_IRQ_H
-
-extern void __init h720x_init_irq (void);
-
-#endif /* __ASM_ARCH_IRQ_H */
diff --git a/include/asm-arm/arch-h720x/param.h b/include/asm-arm/arch-h720x/param.h
deleted file mode 100644
index 2b80235f9847..000000000000
--- a/include/asm-arm/arch-h720x/param.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * linux/include/asm-arm/arch-h720x/param.h
- *
- * Copyright (C) 2000 Jungjun Kim
- */
-
-#ifndef __ASM_ARCH_PARAM_H
-#define __ASM_ARCH_PARAM_H
-
-#endif
diff --git a/include/asm-arm/arch-h720x/uncompress.h b/include/asm-arm/arch-h720x/uncompress.h
index 9535764bcc71..18c69e0f3585 100644
--- a/include/asm-arm/arch-h720x/uncompress.h
+++ b/include/asm-arm/arch-h720x/uncompress.h
@@ -12,22 +12,20 @@
 #define LSR     0x14
 #define TEMPTY  0x40
 
-static void putstr(const char *s)
+static inline void putc(int c)
 {
-        char c;
         volatile unsigned char *p = (volatile unsigned char *)(IO_PHYS+0x20000);
 
-        while ( (c = *s++) != '\0') {
-                /* wait until transmit buffer is empty */
-                while((p[LSR] & TEMPTY) == 0x0);
-                /* write next character */
-                *p = c;
-
-                if(c == '\n') {
-                        while((p[LSR] & TEMPTY) == 0x0);
-                        *p = '\r';
-                }
-        }
+        /* wait until transmit buffer is empty */
+        while((p[LSR] & TEMPTY) == 0x0)
+                barrier();
+
+        /* write next character */
+        *p = c;
+}
+
+static inline void flush(void)
+{
 }
 
 /*
diff --git a/include/asm-arm/arch-imx/irq.h b/include/asm-arm/arch-imx/irq.h
deleted file mode 100644
index 545e065d2325..000000000000
--- a/include/asm-arm/arch-imx/irq.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-imxads/irq.h
- *
- *  Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#define fixup_irq(i)    (i)
diff --git a/include/asm-arm/arch-imx/param.h b/include/asm-arm/arch-imx/param.h
deleted file mode 100644
index 7c724f03333e..000000000000
--- a/include/asm-arm/arch-imx/param.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-imx/param.h
- *
- *  Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/include/asm-arm/arch-imx/uncompress.h b/include/asm-arm/arch-imx/uncompress.h
index 096077f2750b..da333f69136f 100644
--- a/include/asm-arm/arch-imx/uncompress.h
+++ b/include/asm-arm/arch-imx/uncompress.h
@@ -39,8 +39,7 @@
  *
  * This does not append a newline
  */
-static void
-putstr(const char *s)
+static void putc(int c)
 {
         unsigned long serial_port;
 
@@ -54,20 +53,14 @@ putstr(const char *s)
                 return;
         } while(0);
 
-        while (*s) {
-                while ( !(UART(USR2) & USR2_TXFE) )
-                        barrier();
+        while (!(UART(USR2) & USR2_TXFE))
+                barrier();
 
-                UART(TXR) = *s;
-
-                if (*s == '\n') {
-                        while ( !(UART(USR2) & USR2_TXFE) )
-                                barrier();
+        UART(TXR) = c;
+}
 
-                        UART(TXR) = '\r';
-                }
-                s++;
-        }
+static inline void flush(void)
+{
 }
 
 /*
diff --git a/include/asm-arm/arch-integrator/debug-macro.S b/include/asm-arm/arch-integrator/debug-macro.S
index 031d30941791..85b327c352df 100644
--- a/include/asm-arm/arch-integrator/debug-macro.S
+++ b/include/asm-arm/arch-integrator/debug-macro.S
@@ -11,8 +11,6 @@
  *
 */
 
-#include <linux/amba/serial.h>
-
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1                 @ MMU enabled?
@@ -21,18 +19,4 @@
                 addne   \rx, \rx, #0x16000000 >> 4
                 .endm
 
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx, #UART01x_DR]
-                .endm
-
-                .macro  waituart,rd,rx
-1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
-                tst     \rd, #1 << 5            @ UARTFLGUTXFF - 1 when full
-                bne     1001b
-                .endm
-
-                .macro  busyuart,rd,rx
-1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
-                tst     \rd, #1 << 3            @ UARTFLGUBUSY - 1 when busy
-                bne     1001b
-                .endm
+#include <asm/hardware/debug-pl01x.S>
diff --git a/include/asm-arm/arch-integrator/param.h b/include/asm-arm/arch-integrator/param.h
deleted file mode 100644
index afa582ff3717..000000000000
--- a/include/asm-arm/arch-integrator/param.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-integrator/param.h
- *
- *  Copyright (C) 1999 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/include/asm-arm/arch-integrator/uncompress.h b/include/asm-arm/arch-integrator/uncompress.h
index 3957402741d3..f61825c4d901 100644
--- a/include/asm-arm/arch-integrator/uncompress.h
+++ b/include/asm-arm/arch-integrator/uncompress.h
@@ -28,21 +28,18 @@
 /*
  * This does not append a newline
  */
-static void putstr(const char *s)
+static void putc(int c)
 {
-        while (*s) {
-                while (AMBA_UART_FR & (1 << 5));
+        while (AMBA_UART_FR & (1 << 5))
+                barrier();
 
-                AMBA_UART_DR = *s;
-
-                if (*s == '\n') {
-                        while (AMBA_UART_FR & (1 << 5));
+        AMBA_UART_DR = c;
+}
 
-                        AMBA_UART_DR = '\r';
-                }
-                s++;
-        }
-        while (AMBA_UART_FR & (1 << 3));
+static inline void flush(void)
+{
+        while (AMBA_UART_FR & (1 << 3))
+                barrier();
 }
 
 /*
diff --git a/include/asm-arm/arch-iop3xx/debug-macro.S b/include/asm-arm/arch-iop3xx/debug-macro.S
index cc15f80ebd9a..ce007e531994 100644
--- a/include/asm-arm/arch-iop3xx/debug-macro.S
+++ b/include/asm-arm/arch-iop3xx/debug-macro.S
@@ -28,21 +28,8 @@
 #endif
                 .endm
 
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx]
-                .endm
-
-                .macro  busyuart,rd,rx
-1002:           ldrb    \rd, [\rx, #0x5]
-                and     \rd, \rd, #0x60
-                teq     \rd, #0x60
-                bne     1002b
-                .endm
-
-                .macro  waituart,rd,rx
 #if !defined(CONFIG_ARCH_IQ80321) || !defined(CONFIG_ARCH_IQ31244) || !defined(CONFIG_ARCH_IQ80331)
-1001:           ldrb    \rd, [\rx, #0x6]
-                tst     \rd, #0x10
-                beq     1001b
+#define FLOW_CONTROL
 #endif
-                .endm
+#define UART_SHIFT      0
+#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-iop3xx/param.h b/include/asm-arm/arch-iop3xx/param.h
deleted file mode 100644
index acf404e87358..000000000000
--- a/include/asm-arm/arch-iop3xx/param.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-iop3xx/param.h
- */
diff --git a/include/asm-arm/arch-iop3xx/uncompress.h b/include/asm-arm/arch-iop3xx/uncompress.h
index 82b88762c3cc..c98eb6254b1f 100644
--- a/include/asm-arm/arch-iop3xx/uncompress.h
+++ b/include/asm-arm/arch-iop3xx/uncompress.h
@@ -19,23 +19,15 @@ static volatile UTYPE uart_base;
 
 #define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE)
 
-static __inline__ void putc(char c)
+static inline void putc(char c)
 {
-        while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE);
+        while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
+                barrier();
         *uart_base = c;
 }
 
-/*
- * This does not append a newline
- */
-static void putstr(const char *s)
+static inline void flush(void)
 {
-        while (*s) {
-                putc(*s);
-                if (*s == '\n')
-                        putc('\r');
-                s++;
-        }
 }
 
 static __inline__ void __arch_decomp_setup(unsigned long arch_id)
diff --git a/include/asm-arm/arch-ixp2000/debug-macro.S b/include/asm-arm/arch-ixp2000/debug-macro.S
index 5631e0889861..bc8b39654793 100644
--- a/include/asm-arm/arch-ixp2000/debug-macro.S
+++ b/include/asm-arm/arch-ixp2000/debug-macro.S
@@ -23,18 +23,5 @@
 #endif
                 .endm
 
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx]
-                .endm
-
-                .macro  busyuart,rd,rx
-1002:           ldrb    \rd, [\rx, #0x14]
-                tst     \rd, #0x20
-                beq     1002b
-                .endm
-
-                .macro  waituart,rd,rx
-                nop
-                nop
-                nop
-                .endm
+#define UART_SHIFT      2
+#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-ixp2000/irq.h b/include/asm-arm/arch-ixp2000/irq.h
deleted file mode 100644
index ba00b23f9828..000000000000
--- a/include/asm-arm/arch-ixp2000/irq.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-ixp2000/irq.h
- *
- *  Copyright (C) 2002 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#define fixup_irq(irq)  (irq)
-
-
diff --git a/include/asm-arm/arch-ixp2000/ixdp2x00.h b/include/asm-arm/arch-ixp2000/ixdp2x00.h
index 229381c64283..546e2e8e27b8 100644
--- a/include/asm-arm/arch-ixp2000/ixdp2x00.h
+++ b/include/asm-arm/arch-ixp2000/ixdp2x00.h
@@ -72,12 +72,11 @@
 
 #ifndef __ASSEMBLY__
 /*
- * Master NPU will always have flash and be PCI master.
- * Slave NPU may or may not have flash but will never be PCI master.
+ * The master NPU is always PCI master.
  */
 static inline unsigned int ixdp2x00_master_npu(void)
 {
-        return ((ixp2000_has_flash()) && (ixp2000_is_pcimaster()));
+        return !!ixp2000_is_pcimaster();
 }
 
 /*
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 2b57f91b4ebd..ccae4bec92c5 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -353,8 +353,8 @@
  * Masks and shifts for various fields in the WTC and RTC registers.
  */
 #define SLOWPORT_WRTC_MASK_HD           0x0003
-#define SLOWPORT_WRTC_MASK_SU           0x003c
-#define SLOWPORT_WRTC_MASK_PW           0x03c0
+#define SLOWPORT_WRTC_MASK_PW           0x003c
+#define SLOWPORT_WRTC_MASK_SU           0x03c0
 
 #define SLOWPORT_WRTC_SHIFT_HD          0x00
 #define SLOWPORT_WRTC_SHIFT_SU          0x02
diff --git a/include/asm-arm/arch-ixp2000/param.h b/include/asm-arm/arch-ixp2000/param.h
deleted file mode 100644
index 2646d9e5919d..000000000000
--- a/include/asm-arm/arch-ixp2000/param.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-ixp2000/param.h
- */
diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h
index ddbbb34b5f95..3cc9a04f68cb 100644
--- a/include/asm-arm/arch-ixp2000/system.h
+++ b/include/asm-arm/arch-ixp2000/system.h
@@ -37,7 +37,7 @@ static inline void arch_reset(char mode)
          * to cause a complete reset of the CPU and all external devices
          * and move the flash bank register back to 0.
          */
-        if (machine_is_ixdp2801()) {
+        if (machine_is_ixdp2801() || machine_is_ixdp28x5()) {
                 unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
 
                 reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
diff --git a/include/asm-arm/arch-ixp2000/uncompress.h b/include/asm-arm/arch-ixp2000/uncompress.h
index 3d3d5b2ed6e9..f66b408f363e 100644
--- a/include/asm-arm/arch-ixp2000/uncompress.h
+++ b/include/asm-arm/arch-ixp2000/uncompress.h
@@ -29,23 +29,18 @@
 #define UARTSR          PHYS(0x14)      /* Status reg */
 
 
-static __inline__ void putc(char c)
+static inline void putc(int c)
 {
         int j = 0x1000;
 
-        while (--j && !(*UARTSR & UART_LSR_THRE)); 
+        while (--j && !(*UARTSR & UART_LSR_THRE))
+                barrier();
+
         *UARTDR = c;
 }
 
-static void putstr(const char *s)
+static inline void flush(void)
 {
-        while (*s)
-        {
-                putc(*s);
-                if (*s == '\n')
-                        putc('\r');
-                s++;
-        }
 }
 
 #define arch_decomp_setup()
diff --git a/include/asm-arm/arch-ixp23xx/debug-macro.S b/include/asm-arm/arch-ixp23xx/debug-macro.S
new file mode 100644
index 000000000000..eb99fd69fd24
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/debug-macro.S
@@ -0,0 +1,23 @@
+/*
+ * include/asm-arm/arch-ixp23xx/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/arch/ixp23xx.h>
+
+                .macro  addruart,rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1                         @ mmu enabled?
+                ldreq   \rx, =IXP23XX_PERIPHERAL_PHYS   @ physical
+                ldrne   \rx, =IXP23XX_PERIPHERAL_VIRT   @ virtual
+                .endm
+
+#define UART_SHIFT      2
+#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-ixp23xx/dma.h b/include/asm-arm/arch-ixp23xx/dma.h
new file mode 100644
index 000000000000..2f4335e3b836
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/dma.h
@@ -0,0 +1,3 @@
+/*
+ * include/asm-arm/arch-ixp23xx/dma.h
+ */
diff --git a/include/asm-arm/arch-ixp23xx/entry-macro.S b/include/asm-arm/arch-ixp23xx/entry-macro.S
new file mode 100644
index 000000000000..0ef4e6016ac4
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/entry-macro.S
@@ -0,0 +1,31 @@
+/*
+ * include/asm-arm/arch-ixp23xx/entry-macro.S
+ */
+
+                .macro  disable_fiq
+                .endm
+
+                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+                ldr     \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
+                ldr     \irqnr, [\irqnr]        @ get interrupt number
+                cmp     \irqnr, #0x0            @ suprious interrupt ?
+                movne   \irqnr, \irqnr, lsr #2  @ skip unwanted low order bits
+                subne   \irqnr, \irqnr, #1      @ convert to 0 based
+
+#if 0
+                cmp     \irqnr, #IRQ_IXP23XX_PCI_INT_RPH
+                bne     1001f
+                mov     \irqnr, #IRQ_IXP23XX_INTA
+
+                ldr     \irqnr, =0xf5000030
+
+                mov     \tmp, #(1<<26)
+                tst     \irqnr, \tmp
+                movne   \irqnr, #IRQ_IXP23XX_INTB
+
+                mov     \tmp, #(1<<27)
+                tst     \irqnr, \tmp
+                movne   \irqnr, #IRQ_IXP23XX_INTA
+1001:
+#endif
+                .endm
diff --git a/include/asm-arm/arch-ixp23xx/hardware.h b/include/asm-arm/arch-ixp23xx/hardware.h
new file mode 100644
index 000000000000..c0010d21a684
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/hardware.h
@@ -0,0 +1,37 @@
+/*
+ * include/asm-arm/arch-ixp23xx/hardware.h
+ *
+ * Copyright (C) 2002-2004 Intel Corporation.
+ * Copyricht (C) 2005 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Hardware definitions for IXP23XX based systems
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+/* PCI IO info */
+#define PCIO_BASE               IXP23XX_PCI_IO_VIRT
+#define PCIBIOS_MIN_IO          0x00000000
+#define PCIBIOS_MIN_MEM         0xe0000000
+
+#include "ixp23xx.h"
+
+#define pcibios_assign_all_busses()     0
+
+/*
+ * Platform helper functions
+ */
+#include "platform.h"
+
+/*
+ * Platform-specific headers
+ */
+#include "ixdp2351.h"
+
+
+#endif
diff --git a/include/asm-arm/arch-ixp23xx/io.h b/include/asm-arm/arch-ixp23xx/io.h
new file mode 100644
index 000000000000..18415a81ac74
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/io.h
@@ -0,0 +1,54 @@
+/*
+ * include/asm-arm/arch-ixp23xx/io.h
+ *
+ * Original Author: Naeem M Afzal <naeem.m.afzal@intel.com>
+ * Maintainer: Deepak Saxena <dsaxena@plexity.net>
+ *
+ * Copyright (C) 2003-2005 Intel Corp.
+ * Copyright (C) 2005 MontaVista Software, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_IO_H
+#define __ASM_ARCH_IO_H
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+#define __io(p)         ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT))
+#define __mem_pci(a)    (a)
+
+#include <linux/kernel.h>       /* For BUG */
+
+static inline void __iomem *
+ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned long flags)
+{
+        if (addr >= IXP23XX_PCI_MEM_START &&
+                addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) {
+                if (addr + size > IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE)
+                        return NULL;
+
+                return (void __iomem *)
+                        ((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT);
+        }
+
+        return __ioremap(addr, size, flags);
+}
+
+static inline void
+ixp23xx_iounmap(void __iomem *addr)
+{
+        if ((((u32)addr) >= IXP23XX_PCI_MEM_VIRT) &&
+            (((u32)addr) < IXP23XX_PCI_MEM_VIRT + IXP23XX_PCI_MEM_SIZE))
+                return;
+
+        __iounmap(addr);
+}
+
+#define __arch_ioremap(a,s,f)   ixp23xx_ioremap(a,s,f)
+#define __arch_iounmap(a)       ixp23xx_iounmap(a)
+
+
+#endif
diff --git a/include/asm-arm/arch-ixp23xx/irqs.h b/include/asm-arm/arch-ixp23xx/irqs.h
new file mode 100644
index 000000000000..e69639585721
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/irqs.h
@@ -0,0 +1,223 @@
+/*
+ * include/asm-arm/arch-ixp23xx/irqs.h
+ *
+ * IRQ definitions for IXP23XX based systems
+ *
+ * Author: Naeem Afzal <naeem.m.afzal@intel.com>
+ *
+ * Copyright (C) 2003-2004 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+#define NR_IXP23XX_IRQS                 IRQ_IXP23XX_INTB+1
+#define IRQ_IXP23XX_EXTIRQS             NR_IXP23XX_IRQS
+
+
+#define IRQ_IXP23XX_DBG0                0       /* Debug/Execution/MBox */
+#define IRQ_IXP23XX_DBG1                1       /* Debug/Execution/MBox */
+#define IRQ_IXP23XX_NPE_TRG             2       /* npe_trigger */
+#define IRQ_IXP23XX_TIMER1              3       /* Timer[0] */
+#define IRQ_IXP23XX_TIMER2              4       /* Timer[1] */
+#define IRQ_IXP23XX_TIMESTAMP           5       /* Timer[2], Time-stamp */
+#define IRQ_IXP23XX_WDOG                6       /* Time[3], Watchdog Timer */
+#define IRQ_IXP23XX_PCI_DBELL           7       /* PCI Doorbell */
+#define IRQ_IXP23XX_PCI_DMA1            8       /* PCI DMA Channel 1 */
+#define IRQ_IXP23XX_PCI_DMA2            9       /* PCI DMA Channel 2 */
+#define IRQ_IXP23XX_PCI_DMA3            10      /* PCI DMA Channel 3 */
+#define IRQ_IXP23XX_PCI_INT_RPH         11      /* pcxg_pci_int_rph */
+#define IRQ_IXP23XX_CPP_PMU             12      /* xpxg_pm_int_rpl */
+#define IRQ_IXP23XX_SWINT0              13      /* S/W Interrupt0 */
+#define IRQ_IXP23XX_SWINT1              14      /* S/W Interrupt1 */
+#define IRQ_IXP23XX_UART2               15      /* UART1 Interrupt */
+#define IRQ_IXP23XX_UART1               16      /* UART0 Interrupt */
+#define IRQ_IXP23XX_XSI_PMU_ROLLOVER    17      /* AHB Performance M. Unit counter rollover */
+#define IRQ_IXP23XX_XSI_AHB_PM0         18      /* intr_pm_o */
+#define IRQ_IXP23XX_XSI_AHB_ECE0        19      /* intr_ece_o */
+#define IRQ_IXP23XX_XSI_AHB_GASKET      20      /* gas_intr_o */
+#define IRQ_IXP23XX_XSI_CPP             21      /* xsi2cpp_int */
+#define IRQ_IXP23XX_CPP_XSI             22      /* cpp2xsi_int */
+#define IRQ_IXP23XX_ME_ATTN0            23      /* ME_ATTN */
+#define IRQ_IXP23XX_ME_ATTN1            24      /* ME_ATTN */
+#define IRQ_IXP23XX_ME_ATTN2            25      /* ME_ATTN */
+#define IRQ_IXP23XX_ME_ATTN3            26      /* ME_ATTN */
+#define IRQ_IXP23XX_PCI_ERR_RPH         27      /* PCXG_PCI_ERR_RPH */
+#define IRQ_IXP23XX_D0XG_ECC_CORR       28      /* D0XG_DRAM_ECC_CORR */
+#define IRQ_IXP23XX_D0XG_ECC_UNCORR     29      /* D0XG_DRAM_ECC_UNCORR */
+#define IRQ_IXP23XX_SRAM_ERR1           30      /* SRAM1_ERR */
+#define IRQ_IXP23XX_SRAM_ERR0           31      /* SRAM0_ERR */
+#define IRQ_IXP23XX_MEDIA_ERR           32      /* MEDIA_ERR */
+#define IRQ_IXP23XX_STH_DRAM_ECC_MAJ    33      /* STH_DRAM0_ECC_MAJ */
+#define IRQ_IXP23XX_GPIO6               34      /* GPIO0 interrupts */
+#define IRQ_IXP23XX_GPIO7               35      /* GPIO1 interrupts */
+#define IRQ_IXP23XX_GPIO8               36      /* GPIO2 interrupts */
+#define IRQ_IXP23XX_GPIO9               37      /* GPIO3 interrupts */
+#define IRQ_IXP23XX_GPIO10              38      /* GPIO4 interrupts */
+#define IRQ_IXP23XX_GPIO11              39      /* GPIO5 interrupts */
+#define IRQ_IXP23XX_GPIO12              40      /* GPIO6 interrupts */
+#define IRQ_IXP23XX_GPIO13              41      /* GPIO7 interrupts */
+#define IRQ_IXP23XX_GPIO14              42      /* GPIO8 interrupts */
+#define IRQ_IXP23XX_GPIO15              43      /* GPIO9 interrupts */
+#define IRQ_IXP23XX_SHAC_RING0          44      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING1          45      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING2          46      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING3          47      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING4          48      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING5          49      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING6          50      /* SHAC RING Full */
+#define IRQ_IXP23XX_SHAC_RING7          51      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING8          52      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING9          53      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING10         54      /* SHAC Ring Full */
+#define IRQ_IXP23XX_SHAC_RING11         55      /* SHAC Ring Full */
+#define IRQ_IXP23XX_ME_THREAD_A0_ME0    56      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A1_ME0    57      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A2_ME0    58      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A3_ME0    59      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A4_ME0    60      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A5_ME0    61      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A6_ME0    62      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A7_ME0    63      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A8_ME1    64      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A9_ME1    65      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A10_ME1   66      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A11_ME1   67      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A12_ME1   68      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A13_ME1   69      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A14_ME1   70      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A15_ME1   71      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A16_ME2   72      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A17_ME2   73      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A18_ME2   74      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A19_ME2   75      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A20_ME2   76      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A21_ME2   77      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A22_ME2   78      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A23_ME2   79      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A24_ME3   80      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A25_ME3   81      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A26_ME3   82      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A27_ME3   83      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A28_ME3   84      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A29_ME3   85      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A30_ME3   86      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_A31_ME3   87      /* ME_THREAD_A */
+#define IRQ_IXP23XX_ME_THREAD_B0_ME0    88      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B1_ME0    89      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B2_ME0    90      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B3_ME0    91      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B4_ME0    92      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B5_ME0    93      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B6_ME0    94      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B7_ME0    95      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B8_ME1    96      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B9_ME1    97      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B10_ME1   98      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B11_ME1   99      /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B12_ME1   100     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B13_ME1   101     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B14_ME1   102     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B15_ME1   103     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B16_ME2   104     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B17_ME2   105     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B18_ME2   106     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B19_ME2   107     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B20_ME2   108     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B21_ME2   109     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B22_ME2   110     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B23_ME2   111     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B24_ME3   112     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B25_ME3   113     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B26_ME3   114     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B27_ME3   115     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B28_ME3   116     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B29_ME3   117     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B30_ME3   118     /* ME_THREAD_B */
+#define IRQ_IXP23XX_ME_THREAD_B31_ME3   119     /* ME_THREAD_B */
+
+#define NUM_IXP23XX_RAW_IRQS            120
+
+#define IRQ_IXP23XX_INTA                120     /* Indirect pcxg_pci_int_rph */
+#define IRQ_IXP23XX_INTB                121     /* Indirect pcxg_pci_int_rph */
+
+#define NR_IXP23XX_IRQ                  (IRQ_IXP23XX_INTB + 1)
+
+/*
+ * We default to 32 per-board IRQs. Increase this number if you need
+ * more, but keep it realistic.
+ */
+#define NR_IXP23XX_MACH_IRQS            32
+
+#define NR_IRQS                         NR_IXP23XX_IRQS + NR_IXP23XX_MACH_IRQS
+
+#define IXP23XX_MACH_IRQ(irq)           (NR_IXP23XX_IRQ + (irq))
+
+
+/*
+ * IXDP2351-specific interrupts
+ */
+
+/*
+ * External PCI interrupts signaled through INTB
+ *
+ */
+#define IXDP2351_INTB_IRQ_BASE          0
+#define IRQ_IXDP2351_INTA_82546         IXP23XX_MACH_IRQ(0)
+#define IRQ_IXDP2351_INTB_82546         IXP23XX_MACH_IRQ(1)
+#define IRQ_IXDP2351_SPCI_DB_0          IXP23XX_MACH_IRQ(2)
+#define IRQ_IXDP2351_SPCI_DB_1          IXP23XX_MACH_IRQ(3)
+#define IRQ_IXDP2351_SPCI_PMC_INTA      IXP23XX_MACH_IRQ(4)
+#define IRQ_IXDP2351_SPCI_PMC_INTB      IXP23XX_MACH_IRQ(5)
+#define IRQ_IXDP2351_SPCI_PMC_INTC      IXP23XX_MACH_IRQ(6)
+#define IRQ_IXDP2351_SPCI_PMC_INTD      IXP23XX_MACH_IRQ(7)
+#define IRQ_IXDP2351_SPCI_FIC           IXP23XX_MACH_IRQ(8)
+
+#define IXDP2351_INTB_IRQ_BIT(irq)      (irq - IXP23XX_MACH_IRQ(0))
+#define IXDP2351_INTB_IRQ_MASK(irq)     (1 << IXDP2351_INTB_IRQ_BIT(irq))
+#define IXDP2351_INTB_IRQ_VALID         0x01FF
+#define IXDP2351_INTB_IRQ_NUM           16
+
+/*
+ * Other external interrupts signaled through INTA
+ */
+#define IXDP2351_INTA_IRQ_BASE          16
+#define IRQ_IXDP2351_IPMI_FROM          IXP23XX_MACH_IRQ(16)
+#define IRQ_IXDP2351_125US              IXP23XX_MACH_IRQ(17)
+#define IRQ_IXDP2351_DB_0_ADD           IXP23XX_MACH_IRQ(18)
+#define IRQ_IXDP2351_DB_1_ADD           IXP23XX_MACH_IRQ(19)
+#define IRQ_IXDP2351_DEBUG1             IXP23XX_MACH_IRQ(20)
+#define IRQ_IXDP2351_ADD_UART           IXP23XX_MACH_IRQ(21)
+#define IRQ_IXDP2351_FIC_ADD            IXP23XX_MACH_IRQ(24)
+#define IRQ_IXDP2351_CS8900             IXP23XX_MACH_IRQ(25)
+#define IRQ_IXDP2351_BBSRAM             IXP23XX_MACH_IRQ(26)
+#define IRQ_IXDP2351_CONFIG_MEDIA       IXP23XX_MACH_IRQ(27)
+#define IRQ_IXDP2351_CLOCK_REF          IXP23XX_MACH_IRQ(28)
+#define IRQ_IXDP2351_A10_NP             IXP23XX_MACH_IRQ(29)
+#define IRQ_IXDP2351_A11_NP             IXP23XX_MACH_IRQ(30)
+#define IRQ_IXDP2351_DEBUG_NP           IXP23XX_MACH_IRQ(31)
+
+#define IXDP2351_INTA_IRQ_BIT(irq)      (irq - IXP23XX_MACH_IRQ(16))
+#define IXDP2351_INTA_IRQ_MASK(irq)     (1 << IXDP2351_INTA_IRQ_BIT(irq))
+#define IXDP2351_INTA_IRQ_VALID         0xFF3F
+#define IXDP2351_INTA_IRQ_NUM           16
+
+
+/*
+ * ADI RoadRunner IRQs
+ */
+#define IRQ_ROADRUNNER_PCI_INTA         IRQ_IXP23XX_INTA
+#define IRQ_ROADRUNNER_PCI_INTB         IRQ_IXP23XX_INTB
+#define IRQ_ROADRUNNER_PCI_INTC         IRQ_IXP23XX_GPIO11
+#define IRQ_ROADRUNNER_PCI_INTD         IRQ_IXP23XX_GPIO12
+
+/*
+ * Put new board definitions here
+ */
+
+
+#endif
diff --git a/include/asm-arm/arch-ixp23xx/ixdp2351.h b/include/asm-arm/arch-ixp23xx/ixdp2351.h
new file mode 100644
index 000000000000..4a24f8f15655
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/ixdp2351.h
@@ -0,0 +1,89 @@
+/*
+ * include/asm-arm/arch-ixp23xx/ixdp2351.h
+ *
+ * Register and other defines for IXDP2351
+ *
+ * Copyright (c) 2002-2004 Intel Corp.
+ * Copytight (c) 2005 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_ARCH_IXDP2351_H
+#define __ASM_ARCH_IXDP2351_H
+
+/*
+ * NP module memory map
+ */
+#define IXDP2351_NP_PHYS_BASE           (IXP23XX_EXP_BUS_CS4_BASE)
+#define IXDP2351_NP_PHYS_SIZE           0x00100000
+#define IXDP2351_NP_VIRT_BASE           0xeff00000
+
+#define IXDP2351_VIRT_CS8900_BASE       (IXDP2351_NP_VIRT_BASE)
+#define IXDP2351_VIRT_CS8900_END        (IXDP2351_VIRT_CS8900_BASE + 16)
+
+#define IXDP2351_VIRT_NP_CPLD_BASE      (IXP23XX_EXP_BUS_CS4_BASE_VIRT + 0x00010000)
+
+#define IXDP2351_NP_CPLD_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_NP_CPLD_BASE + reg))
+
+#define IXDP2351_NP_CPLD_RESET1_REG     IXDP2351_NP_CPLD_REG(0x00)
+#define IXDP2351_NP_CPLD_LED_REG        IXDP2351_NP_CPLD_REG(0x02)
+#define IXDP2351_NP_CPLD_VERSION_REG    IXDP2351_NP_CPLD_REG(0x04)
+
+/*
+ * Base board module memory map
+ */
+
+#define IXDP2351_BB_BASE_PHYS           (IXP23XX_EXP_BUS_CS5_BASE)
+#define IXDP2351_BB_SIZE                0x01000000
+#define IXDP2351_BB_BASE_VIRT           (0xee000000)
+
+#define IXDP2351_BB_AREA_BASE(offset)   (IXDP2351_BB_BASE_VIRT + offset)
+
+#define IXDP2351_VIRT_NVRAM_BASE        IXDP2351_BB_AREA_BASE(0x0)
+#define IXDP2351_NVRAM_SIZE             (0x20000)
+
+#define IXDP2351_VIRT_MB_IXF1104_BASE   IXDP3251_BB_AREA_BASE(0x00020000)
+#define IXDP2351_VIRT_ADD_UART_BASE     IXDP2351_BB_AREA_BASE(0x000240C0)
+#define IXDP2351_VIRT_FIC_BASE          IXDP2351_BB_AREA_BASE(0x00200000)
+#define IXDP2351_VIRT_DB0_BASE          IXDP2351_BB_AREA_BASE(0x00400000)
+#define IXDP2351_VIRT_DB1_BASE          IXDP2351_BB_AREA_BASE(0x00600000)
+#define IXDP2351_VIRT_CPLD_BASE         IXDP2351_BB_AREA_BASE(0x00024000)
+
+/*
+ * On board CPLD registers
+ */
+#define IXDP2351_CPLD_BB_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_CPLD_BASE + reg))
+
+#define IXDP2351_CPLD_RESET0_REG        IXDP2351_CPLD_BB_REG(0x00)
+#define IXDP2351_CPLD_RESET1_REG        IXDP2351_CPLD_BB_REG(0x04)
+
+#define IXDP2351_CPLD_RESET1_MAGIC      0x55AA
+#define IXDP2351_CPLD_RESET1_ENABLE     0x8000
+
+#define IXDP2351_CPLD_FPGA_CONFIG_REG   IXDP2351_CPLD_BB_REG(0x08)
+#define IXDP2351_CPLD_INTB_MASK_SET_REG IXDP2351_CPLD_BB_REG(0x10)
+#define IXDP2351_CPLD_INTA_MASK_SET_REG IXDP2351_CPLD_BB_REG(0x14)
+#define IXDP2351_CPLD_INTB_STAT_REG     IXDP2351_CPLD_BB_REG(0x18)
+#define IXDP2351_CPLD_INTA_STAT_REG     IXDP2351_CPLD_BB_REG(0x1C)
+#define IXDP2351_CPLD_INTB_RAW_REG      IXDP2351_CPLD_BB_REG(0x20)      /* read */
+#define IXDP2351_CPLD_INTA_RAW_REG      IXDP2351_CPLD_BB_REG(0x24)      /* read */
+#define IXDP2351_CPLD_INTB_MASK_CLR_REG IXDP2351_CPLD_INTB_RAW_REG      /* write */
+#define IXDP2351_CPLD_INTA_MASK_CLR_REG IXDP2351_CPLD_INTA_RAW_REG      /* write */
+#define IXDP2351_CPLD_INTB_SIM_REG      IXDP2351_CPLD_BB_REG(0x28)
+#define IXDP2351_CPLD_INTA_SIM_REG      IXDP2351_CPLD_BB_REG(0x2C)
+        /* Interrupt bits are defined in irqs.h */
+#define IXDP2351_CPLD_BB_GBE0_REG       IXDP2351_CPLD_BB_REG(0x30)
+#define IXDP2351_CPLD_BB_GBE1_REG       IXDP2351_CPLD_BB_REG(0x34)
+
+/* #define IXDP2351_CPLD_BB_MISC_REG    IXDP2351_CPLD_REG(0x1C) */
+/* #define IXDP2351_CPLD_BB_MISC_REV_MASK       0xFF            */
+/* #define IXDP2351_CPLD_BB_GDXCS0_REG  IXDP2351_CPLD_REG(0x24) */
+/* #define IXDP2351_CPLD_BB_GDXCS1_REG  IXDP2351_CPLD_REG(0x28) */
+/* #define IXDP2351_CPLD_BB_CLOCK_REG   IXDP2351_CPLD_REG(0x04) */
+
+
+#endif
diff --git a/include/asm-arm/arch-ixp23xx/ixp23xx.h b/include/asm-arm/arch-ixp23xx/ixp23xx.h
new file mode 100644
index 000000000000..e49e1ca61b1a
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/ixp23xx.h
@@ -0,0 +1,306 @@
+/*
+ * include/asm-arm/arch-ixp23xx/ixp23xx.h
+ *
+ * Register definitions for IXP23XX
+ *
+ * Copyright (C) 2003-2005 Intel Corporation.
+ * Copyright (C) 2005 MontaVista Software, Inc.
+ *
+ * Maintainer: Deepak Saxena <dsaxena@plexity.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_IXP23XX_H
+#define __ASM_ARCH_IXP23XX_H
+
+/*
+ * IXP2300 linux memory map:
+ *
+ * virt         phys            size
+ * fffd0000     a0000000        64K             XSI2CPP_CSR
+ * fffc0000     c4000000        4K              EXP_CFG
+ * fff00000     c8000000        64K             PERIPHERAL
+ * fe000000     1c0000000       16M             CAP_CSR
+ * fd000000     1c8000000       16M             MSF_CSR
+ * fb000000                     16M             ---
+ * fa000000     1d8000000       32M             PCI_IO
+ * f8000000     1da000000       32M             PCI_CFG
+ * f6000000     1de000000       32M             PCI_CREG
+ * f4000000                     32M             ---
+ * f0000000     1e0000000       64M             PCI_MEM
+ * e[c-f]000000                                 per-platform mappings
+ */
+
+
+/****************************************************************************
+ * Static mappings.
+ ****************************************************************************/
+#define IXP23XX_XSI2CPP_CSR_PHYS        0xa0000000
+#define IXP23XX_XSI2CPP_CSR_VIRT        0xfffd0000
+#define IXP23XX_XSI2CPP_CSR_SIZE        0x00010000
+
+#define IXP23XX_EXP_CFG_PHYS            0xc4000000
+#define IXP23XX_EXP_CFG_VIRT            0xfffc0000
+#define IXP23XX_EXP_CFG_SIZE            0x00001000
+
+#define IXP23XX_PERIPHERAL_PHYS         0xc8000000
+#define IXP23XX_PERIPHERAL_VIRT         0xfff00000
+#define IXP23XX_PERIPHERAL_SIZE         0x00010000
+
+#define IXP23XX_CAP_CSR_PHYS            0x1c0000000ULL
+#define IXP23XX_CAP_CSR_VIRT            0xfe000000
+#define IXP23XX_CAP_CSR_SIZE            0x01000000
+
+#define IXP23XX_MSF_CSR_PHYS            0x1c8000000ULL
+#define IXP23XX_MSF_CSR_VIRT            0xfd000000
+#define IXP23XX_MSF_CSR_SIZE            0x01000000
+
+#define IXP23XX_PCI_IO_PHYS             0x1d8000000ULL
+#define IXP23XX_PCI_IO_VIRT             0xfa000000
+#define IXP23XX_PCI_IO_SIZE             0x02000000
+
+#define IXP23XX_PCI_CFG_PHYS            0x1da000000ULL
+#define IXP23XX_PCI_CFG_VIRT            0xf8000000
+#define IXP23XX_PCI_CFG_SIZE            0x02000000
+#define IXP23XX_PCI_CFG0_VIRT           IXP23XX_PCI_CFG_VIRT
+#define IXP23XX_PCI_CFG1_VIRT           (IXP23XX_PCI_CFG_VIRT + 0x01000000)
+
+#define IXP23XX_PCI_CREG_PHYS           0x1de000000ULL
+#define IXP23XX_PCI_CREG_VIRT           0xf6000000
+#define IXP23XX_PCI_CREG_SIZE           0x02000000
+#define IXP23XX_PCI_CSR_VIRT            (IXP23XX_PCI_CREG_VIRT + 0x01000000)
+
+#define IXP23XX_PCI_MEM_START           0xe0000000
+#define IXP23XX_PCI_MEM_PHYS            0x1e0000000ULL
+#define IXP23XX_PCI_MEM_VIRT            0xf0000000
+#define IXP23XX_PCI_MEM_SIZE            0x04000000
+
+
+/****************************************************************************
+ * XSI2CPP CSRs.
+ ****************************************************************************/
+#define IXP23XX_XSI2CPP_REG(x)          ((volatile unsigned long *)(IXP23XX_XSI2CPP_CSR_VIRT + (x)))
+#define IXP23XX_CPP2XSI_CURR_XFER_REG3  IXP23XX_XSI2CPP_REG(0xf8)
+#define IXP23XX_CPP2XSI_ADDR_31         (1 << 19)
+#define IXP23XX_CPP2XSI_PSH_OFF         (1 << 20)
+#define IXP23XX_CPP2XSI_COH_OFF         (1 << 21)
+
+
+/****************************************************************************
+ * Expansion Bus Config.
+ ****************************************************************************/
+#define IXP23XX_EXP_CFG_REG(x)          ((volatile unsigned long *)(IXP23XX_EXP_CFG_VIRT + (x)))
+#define IXP23XX_EXP_CS0                 IXP23XX_EXP_CFG_REG(0x00)
+#define IXP23XX_EXP_CS1                 IXP23XX_EXP_CFG_REG(0x04)
+#define IXP23XX_EXP_CS2                 IXP23XX_EXP_CFG_REG(0x08)
+#define IXP23XX_EXP_CS3                 IXP23XX_EXP_CFG_REG(0x0c)
+#define IXP23XX_EXP_CS4                 IXP23XX_EXP_CFG_REG(0x10)
+#define IXP23XX_EXP_CS5                 IXP23XX_EXP_CFG_REG(0x14)
+#define IXP23XX_EXP_CS6                 IXP23XX_EXP_CFG_REG(0x18)
+#define IXP23XX_EXP_CS7                 IXP23XX_EXP_CFG_REG(0x1c)
+#define IXP23XX_FLASH_WRITABLE          (0x2)
+#define IXP23XX_FLASH_BUS8              (0x1)
+
+#define IXP23XX_EXP_CFG0                IXP23XX_EXP_CFG_REG(0x20)
+#define IXP23XX_EXP_CFG1                IXP23XX_EXP_CFG_REG(0x24)
+#define IXP23XX_EXP_CFG0_MEM_MAP                (1 << 31)
+#define IXP23XX_EXP_CFG0_XSCALE_SPEED_SEL       (3 << 22)
+#define IXP23XX_EXP_CFG0_XSCALE_SPEED_EN        (1 << 21)
+#define IXP23XX_EXP_CFG0_CPP_SPEED_SEL          (3 << 19)
+#define IXP23XX_EXP_CFG0_CPP_SPEED_EN           (1 << 18)
+#define IXP23XX_EXP_CFG0_PCI_SWIN               (3 << 16)
+#define IXP23XX_EXP_CFG0_PCI_DWIN               (3 << 14)
+#define IXP23XX_EXP_CFG0_PCI33_MODE             (1 << 13)
+#define IXP23XX_EXP_CFG0_QDR_SPEED_SEL          (1 << 12)
+#define IXP23XX_EXP_CFG0_CPP_DIV_SEL            (1 << 5)
+#define IXP23XX_EXP_CFG0_XSI_NOT_PRES           (1 << 4)
+#define IXP23XX_EXP_CFG0_PROM_BOOT              (1 << 3)
+#define IXP23XX_EXP_CFG0_PCI_ARB                (1 << 2)
+#define IXP23XX_EXP_CFG0_PCI_HOST               (1 << 1)
+#define IXP23XX_EXP_CFG0_FLASH_WIDTH            (1 << 0)
+
+#define IXP23XX_EXP_UNIT_FUSE           IXP23XX_EXP_CFG_REG(0x28)
+#define IXP23XX_EXP_MSF_MUX             IXP23XX_EXP_CFG_REG(0x30)
+
+#define IXP23XX_EXP_BUS_PHYS            0x90000000
+#define IXP23XX_EXP_BUS_WINDOW_SIZE     0x01000000
+
+#define IXP23XX_EXP_BUS_CS0_BASE        (IXP23XX_EXP_BUS_PHYS + 0x00000000)
+#define IXP23XX_EXP_BUS_CS1_BASE        (IXP23XX_EXP_BUS_PHYS + 0x01000000)
+#define IXP23XX_EXP_BUS_CS2_BASE        (IXP23XX_EXP_BUS_PHYS + 0x02000000)
+#define IXP23XX_EXP_BUS_CS3_BASE        (IXP23XX_EXP_BUS_PHYS + 0x03000000)
+#define IXP23XX_EXP_BUS_CS4_BASE        (IXP23XX_EXP_BUS_PHYS + 0x04000000)
+#define IXP23XX_EXP_BUS_CS5_BASE        (IXP23XX_EXP_BUS_PHYS + 0x05000000)
+#define IXP23XX_EXP_BUS_CS6_BASE        (IXP23XX_EXP_BUS_PHYS + 0x06000000)
+#define IXP23XX_EXP_BUS_CS7_BASE        (IXP23XX_EXP_BUS_PHYS + 0x07000000)
+
+
+/****************************************************************************
+ * Peripherals.
+ ****************************************************************************/
+#define IXP23XX_UART1_VIRT              (IXP23XX_PERIPHERAL_VIRT + 0x0000)
+#define IXP23XX_UART2_VIRT              (IXP23XX_PERIPHERAL_VIRT + 0x1000)
+#define IXP23XX_PMU_VIRT                (IXP23XX_PERIPHERAL_VIRT + 0x2000)
+#define IXP23XX_INTC_VIRT               (IXP23XX_PERIPHERAL_VIRT + 0x3000)
+#define IXP23XX_GPIO_VIRT               (IXP23XX_PERIPHERAL_VIRT + 0x4000)
+#define IXP23XX_TIMER_VIRT              (IXP23XX_PERIPHERAL_VIRT + 0x5000)
+#define IXP23XX_NPE0_VIRT               (IXP23XX_PERIPHERAL_VIRT + 0x6000)
+#define IXP23XX_DSR_VIRT                (IXP23XX_PERIPHERAL_VIRT + 0x7000)
+#define IXP23XX_NPE1_VIRT               (IXP23XX_PERIPHERAL_VIRT + 0x8000)
+#define IXP23XX_ETH0_VIRT               (IXP23XX_PERIPHERAL_VIRT + 0x9000)
+#define IXP23XX_ETH1_VIRT               (IXP23XX_PERIPHERAL_VIRT + 0xA000)
+#define IXP23XX_GIG0_VIRT               (IXP23XX_PERIPHERAL_VIRT + 0xB000)
+#define IXP23XX_GIG1_VIRT               (IXP23XX_PERIPHERAL_VIRT + 0xC000)
+#define IXP23XX_DDRS_VIRT               (IXP23XX_PERIPHERAL_VIRT + 0xD000)
+
+#define IXP23XX_UART1_PHYS              (IXP23XX_PERIPHERAL_PHYS + 0x0000)
+#define IXP23XX_UART2_PHYS              (IXP23XX_PERIPHERAL_PHYS + 0x1000)
+#define IXP23XX_PMU_PHYS                (IXP23XX_PERIPHERAL_PHYS + 0x2000)
+#define IXP23XX_INTC_PHYS               (IXP23XX_PERIPHERAL_PHYS + 0x3000)
+#define IXP23XX_GPIO_PHYS               (IXP23XX_PERIPHERAL_PHYS + 0x4000)
+#define IXP23XX_TIMER_PHYS              (IXP23XX_PERIPHERAL_PHYS + 0x5000)
+#define IXP23XX_NPE0_PHYS               (IXP23XX_PERIPHERAL_PHYS + 0x6000)
+#define IXP23XX_DSR_PHYS                (IXP23XX_PERIPHERAL_PHYS + 0x7000)
+#define IXP23XX_NPE1_PHYS               (IXP23XX_PERIPHERAL_PHYS + 0x8000)
+#define IXP23XX_ETH0_PHYS               (IXP23XX_PERIPHERAL_PHYS + 0x9000)
+#define IXP23XX_ETH1_PHYS               (IXP23XX_PERIPHERAL_PHYS + 0xA000)
+#define IXP23XX_GIG0_PHYS               (IXP23XX_PERIPHERAL_PHYS + 0xB000)
+#define IXP23XX_GIG1_PHYS               (IXP23XX_PERIPHERAL_PHYS + 0xC000)
+#define IXP23XX_DDRS_PHYS               (IXP23XX_PERIPHERAL_PHYS + 0xD000)
+
+
+/****************************************************************************
+ * Interrupt controller.
+ ****************************************************************************/
+#define IXP23XX_INTC_REG(x)              ((volatile unsigned long *)(IXP23XX_INTC_VIRT + (x)))
+#define IXP23XX_INTR_ST1                IXP23XX_INTC_REG(0x00)
+#define IXP23XX_INTR_ST2                IXP23XX_INTC_REG(0x04)
+#define IXP23XX_INTR_ST3                IXP23XX_INTC_REG(0x08)
+#define IXP23XX_INTR_ST4                IXP23XX_INTC_REG(0x0c)
+#define IXP23XX_INTR_EN1                IXP23XX_INTC_REG(0x10)
+#define IXP23XX_INTR_EN2                IXP23XX_INTC_REG(0x14)
+#define IXP23XX_INTR_EN3                IXP23XX_INTC_REG(0x18)
+#define IXP23XX_INTR_EN4                IXP23XX_INTC_REG(0x1c)
+#define IXP23XX_INTR_SEL1               IXP23XX_INTC_REG(0x20)
+#define IXP23XX_INTR_SEL2               IXP23XX_INTC_REG(0x24)
+#define IXP23XX_INTR_SEL3               IXP23XX_INTC_REG(0x28)
+#define IXP23XX_INTR_SEL4               IXP23XX_INTC_REG(0x2c)
+#define IXP23XX_INTR_IRQ_ST1            IXP23XX_INTC_REG(0x30)
+#define IXP23XX_INTR_IRQ_ST2            IXP23XX_INTC_REG(0x34)
+#define IXP23XX_INTR_IRQ_ST3            IXP23XX_INTC_REG(0x38)
+#define IXP23XX_INTR_IRQ_ST4            IXP23XX_INTC_REG(0x3c)
+#define IXP23XX_INTR_IRQ_ENC_ST_OFFSET  0x54
+
+
+/****************************************************************************
+ * GPIO.
+ ****************************************************************************/
+#define IXP23XX_GPIO_REG(x)             ((volatile unsigned long *)(IXP23XX_GPIO_VIRT + (x)))
+#define IXP23XX_GPIO_GPOUTR             IXP23XX_GPIO_REG(0x00)
+#define IXP23XX_GPIO_GPOER              IXP23XX_GPIO_REG(0x04)
+#define IXP23XX_GPIO_GPINR              IXP23XX_GPIO_REG(0x08)
+#define IXP23XX_GPIO_GPISR              IXP23XX_GPIO_REG(0x0c)
+#define IXP23XX_GPIO_GPIT1R             IXP23XX_GPIO_REG(0x10)
+#define IXP23XX_GPIO_GPIT2R             IXP23XX_GPIO_REG(0x14)
+#define IXP23XX_GPIO_GPCLKR             IXP23XX_GPIO_REG(0x18)
+#define IXP23XX_GPIO_GPDBSELR           IXP23XX_GPIO_REG(0x1c)
+
+#define IXP23XX_GPIO_STYLE_MASK         0x7
+#define IXP23XX_GPIO_STYLE_ACTIVE_HIGH  0x0
+#define IXP23XX_GPIO_STYLE_ACTIVE_LOW   0x1
+#define IXP23XX_GPIO_STYLE_RISING_EDGE  0x2
+#define IXP23XX_GPIO_STYLE_FALLING_EDGE 0x3
+#define IXP23XX_GPIO_STYLE_TRANSITIONAL 0x4
+
+#define IXP23XX_GPIO_STYLE_SIZE         3
+
+
+/****************************************************************************
+ * Timer.
+ ****************************************************************************/
+#define IXP23XX_TIMER_REG(x)            ((volatile unsigned long *)(IXP23XX_TIMER_VIRT + (x)))
+#define IXP23XX_TIMER_CONT              IXP23XX_TIMER_REG(0x00)
+#define IXP23XX_TIMER1_TIMESTAMP        IXP23XX_TIMER_REG(0x04)
+#define IXP23XX_TIMER1_RELOAD           IXP23XX_TIMER_REG(0x08)
+#define IXP23XX_TIMER2_TIMESTAMP        IXP23XX_TIMER_REG(0x0c)
+#define IXP23XX_TIMER2_RELOAD           IXP23XX_TIMER_REG(0x10)
+#define IXP23XX_TIMER_WDOG              IXP23XX_TIMER_REG(0x14)
+#define IXP23XX_TIMER_WDOG_EN           IXP23XX_TIMER_REG(0x18)
+#define IXP23XX_TIMER_WDOG_KEY          IXP23XX_TIMER_REG(0x1c)
+#define IXP23XX_TIMER_WDOG_KEY_MAGIC    0x482e
+#define IXP23XX_TIMER_STATUS            IXP23XX_TIMER_REG(0x20)
+#define IXP23XX_TIMER_SOFT_RESET        IXP23XX_TIMER_REG(0x24)
+#define IXP23XX_TIMER_SOFT_RESET_EN     IXP23XX_TIMER_REG(0x28)
+
+#define IXP23XX_TIMER_ENABLE            (1 << 0)
+#define IXP23XX_TIMER_ONE_SHOT          (1 << 1)
+/* Low order bits of reload value ignored */
+#define IXP23XX_TIMER_RELOAD_MASK       (0x3)
+#define IXP23XX_TIMER_DISABLED          (0x0)
+#define IXP23XX_TIMER1_INT_PEND         (1 << 0)
+#define IXP23XX_TIMER2_INT_PEND         (1 << 1)
+#define IXP23XX_TIMER_STATUS_TS_PEND    (1 << 2)
+#define IXP23XX_TIMER_STATUS_WDOG_PEND  (1 << 3)
+#define IXP23XX_TIMER_STATUS_WARM_RESET (1 << 4)
+
+
+/****************************************************************************
+ * CAP CSRs.
+ ****************************************************************************/
+#define IXP23XX_GLOBAL_REG(x)           ((volatile unsigned long *)(IXP23XX_CAP_CSR_VIRT + 0x4a00 + (x)))
+#define IXP23XX_PROD_IDG                IXP23XX_GLOBAL_REG(0x00)
+#define IXP23XX_MISC_CONTROL            IXP23XX_GLOBAL_REG(0x04)
+#define IXP23XX_MSF_CLK_CNTRL           IXP23XX_GLOBAL_REG(0x08)
+#define IXP23XX_RESET0                  IXP23XX_GLOBAL_REG(0x0c)
+#define IXP23XX_RESET1                  IXP23XX_GLOBAL_REG(0x10)
+#define IXP23XX_STRAP_OPTIONS           IXP23XX_GLOBAL_REG(0x18)
+
+#define IXP23XX_ENABLE_WATCHDOG         (1 << 24)
+#define IXP23XX_SHPC_INIT_COMP          (1 << 21)
+#define IXP23XX_RST_ALL                 (1 << 16)
+#define IXP23XX_RESET_PCI               (1 << 2)
+#define IXP23XX_PCI_UNIT_RESET          (1 << 1)
+#define IXP23XX_XSCALE_RESET            (1 << 0)
+
+
+/****************************************************************************
+ * PCI CSRs.
+ ****************************************************************************/
+#define IXP23XX_PCI_CREG(x)             ((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + (x)))
+#define IXP23XX_PCI_CMDSTAT             IXP23XX_PCI_CREG(0x04)
+#define IXP23XX_PCI_SRAM_BAR            IXP23XX_PCI_CREG(0x14)
+#define IXP23XX_PCI_SDRAM_BAR           IXP23XX_PCI_CREG(0x18)
+
+
+#define IXP23XX_PCI_CSR(x)              ((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + 0x01000000 + (x)))
+#define IXP23XX_PCI_OUT_INT_STATUS      IXP23XX_PCI_CSR(0x0030)
+#define IXP23XX_PCI_OUT_INT_MASK        IXP23XX_PCI_CSR(0x0034)
+#define IXP23XX_PCI_SRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x00fc)
+#define IXP23XX_PCI_DRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x0100)
+#define IXP23XX_PCI_CONTROL             IXP23XX_PCI_CSR(0x013c)
+#define IXP23XX_PCI_ADDR_EXT            IXP23XX_PCI_CSR(0x0140)
+#define IXP23XX_PCI_ME_PUSH_STATUS      IXP23XX_PCI_CSR(0x0148)
+#define IXP23XX_PCI_ME_PUSH_EN          IXP23XX_PCI_CSR(0x014c)
+#define IXP23XX_PCI_ERR_STATUS          IXP23XX_PCI_CSR(0x0150)
+#define IXP23XX_PCI_ERROR_STATUS        IXP23XX_PCI_CSR(0x0150)
+#define IXP23XX_PCI_ERR_ENABLE          IXP23XX_PCI_CSR(0x0154)
+#define IXP23XX_PCI_XSCALE_INT_STATUS   IXP23XX_PCI_CSR(0x0158)
+#define IXP23XX_PCI_XSCALE_INT_ENABLE   IXP23XX_PCI_CSR(0x015c)
+#define IXP23XX_PCI_CPP_ADDR_BITS       IXP23XX_PCI_CSR(0x0160)
+
+
+#ifndef __ASSEMBLY__
+/*
+ * Is system memory on the XSI or CPP bus?
+ */
+static inline unsigned ixp23xx_cpp_boot(void)
+{
+        return (*IXP23XX_EXP_CFG0 & IXP23XX_EXP_CFG0_XSI_NOT_PRES);
+}
+#endif
+
+
+#endif
diff --git a/include/asm-arm/arch-ixp23xx/memory.h b/include/asm-arm/arch-ixp23xx/memory.h
new file mode 100644
index 000000000000..bebcf0aa0d72
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/memory.h
@@ -0,0 +1,46 @@
+/*
+ * include/asm-arm/arch-ixp23xx/memory.h
+ *
+ * Copyright (c) 2003-2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#include <asm/hardware.h>
+
+/*
+ * Physical DRAM offset.
+ */
+#define PHYS_OFFSET             (0x00000000)
+
+
+/*
+ * Virtual view <-> DMA view memory address translations
+ * virt_to_bus: Used to translate the virtual address to an
+ *              address suitable to be passed to set_dma_addr
+ * bus_to_virt: Used to convert an address for DMA operations
+ *              to an address that the kernel can use.
+ */
+#ifndef __ASSEMBLY__
+
+#define __virt_to_bus(v)                                                \
+        ({ unsigned int ret;                                            \
+        ret = ((__virt_to_phys(v) - 0x00000000) +                       \
+         (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0));      \
+        ret; })
+
+#define __bus_to_virt(b)                                                \
+        ({ unsigned int data;                                           \
+        data = *((volatile int *)IXP23XX_PCI_SDRAM_BAR);                \
+         __phys_to_virt((((b - (data & 0xfffffff0)) + 0x00000000))); })
+
+#endif
+
+
+#endif
diff --git a/include/asm-arm/arch-ixp23xx/platform.h b/include/asm-arm/arch-ixp23xx/platform.h
new file mode 100644
index 000000000000..f85b4685a491
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/platform.h
@@ -0,0 +1,31 @@
+/*
+ * include/asm-arm/arch-ixp23xx/platform.h
+ *
+ * Various bits of code used by platform-level code.
+ *
+ * Author: Deepak Saxena <dsaxena@plexity.net>
+ *
+ * Copyright 2005 (c) MontaVista Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASSEMBLY__
+
+struct pci_sys_data;
+
+void ixp23xx_map_io(void);
+void ixp23xx_init_irq(void);
+void ixp23xx_sys_init(void);
+int ixp23xx_pci_setup(int, struct pci_sys_data *);
+void ixp23xx_pci_preinit(void);
+struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*);
+
+extern struct sys_timer ixp23xx_timer;
+
+#define IXP23XX_UART_XTAL               14745600
+
+
+#endif
diff --git a/include/asm-arm/arch-ixp23xx/system.h b/include/asm-arm/arch-ixp23xx/system.h
new file mode 100644
index 000000000000..925e6b0c338b
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/system.h
@@ -0,0 +1,33 @@
+/*
+ * include/asm-arm/arch-ixp23xx/system.h
+ *
+ * Copyright (C) 2003 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+
+static inline void arch_idle(void)
+{
+#if 0
+        if (!hlt_counter)
+                cpu_do_idle();
+#endif
+}
+
+static inline void arch_reset(char mode)
+{
+        /* First try machine specific support */
+        if (machine_is_ixdp2351()) {
+                *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC;
+                (void) *IXDP2351_CPLD_RESET1_REG;
+                *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE;
+        }
+
+        /* Use on-chip reset capability */
+        *IXP23XX_RESET0 |= IXP23XX_RST_ALL;
+}
diff --git a/include/asm-arm/arch-ixp23xx/time.h b/include/asm-arm/arch-ixp23xx/time.h
new file mode 100644
index 000000000000..f6828fdd2883
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/time.h
@@ -0,0 +1,3 @@
+/*
+ * include/asm-arm/arch-ixp23xx/time.h
+ */
diff --git a/include/asm-arm/arch-ixp23xx/timex.h b/include/asm-arm/arch-ixp23xx/timex.h
new file mode 100644
index 000000000000..516f72fe6082
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/timex.h
@@ -0,0 +1,7 @@
+/*
+ * include/asm-arm/arch-ixp23xx/timex.h
+ *
+ * XScale architecture timex specifications
+ */
+
+#define CLOCK_TICK_RATE 75000000
diff --git a/include/asm-arm/arch-ixp23xx/uncompress.h b/include/asm-arm/arch-ixp23xx/uncompress.h
new file mode 100644
index 000000000000..62623fa9b2f7
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/uncompress.h
@@ -0,0 +1,45 @@
+/*
+ * include/asm-arm/arch-ixp23xx/uncompress.h
+ *
+ * Copyright (C) 2002-2004 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <asm/hardware.h>
+#include <linux/serial_reg.h>
+
+#define UART_BASE       ((volatile u32 *)IXP23XX_UART1_PHYS)
+
+static __inline__ void putc(char c)
+{
+        int j;
+
+        for (j = 0; j < 0x1000; j++) {
+                if (UART_BASE[UART_LSR] & UART_LSR_THRE)
+                        break;
+        }
+
+        UART_BASE[UART_TX] = c;
+}
+
+static void putstr(const char *s)
+{
+        while (*s) {
+                putc(*s);
+                if (*s == '\n')
+                        putc('\r');
+                s++;
+        }
+}
+
+#define arch_decomp_setup()
+#define arch_decomp_wdog()
+
+
+#endif
diff --git a/include/asm-arm/arch-ixp23xx/vmalloc.h b/include/asm-arm/arch-ixp23xx/vmalloc.h
new file mode 100644
index 000000000000..9f2566658541
--- /dev/null
+++ b/include/asm-arm/arch-ixp23xx/vmalloc.h
@@ -0,0 +1,10 @@
+/*
+ * include/asm-arm/arch-ixp23xx/vmalloc.h
+ *
+ * Copyright (c) 2005 MontaVista Software, Inc.
+ *
+ * NPU mappings end at 0xf0000000 and we allocate 64MB for board
+ * specific static I/O.
+ */
+
+#define VMALLOC_END     (0xec000000)
diff --git a/include/asm-arm/arch-ixp4xx/debug-macro.S b/include/asm-arm/arch-ixp4xx/debug-macro.S
index 2e23651e217f..37bc8ef23e67 100644
--- a/include/asm-arm/arch-ixp4xx/debug-macro.S
+++ b/include/asm-arm/arch-ixp4xx/debug-macro.S
@@ -20,16 +20,5 @@
                                                 @ byte writes used - Big Endian.
                 .endm
 
-               .macro  senduart,rd,rx
-                strb    \rd, [\rx]
-                .endm
-
-                .macro  waituart,rd,rx
-1002:           ldrb    \rd, [\rx, #0x14]
-                and     \rd, \rd, #0x60         @ check THRE and TEMT bits
-                teq     \rd, #0x60
-                bne     1002b
-                .endm
-
-                .macro  busyuart,rd,rx
-                .endm
+#define UART_SHIFT      2
+#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-ixp4xx/irq.h b/include/asm-arm/arch-ixp4xx/irq.h
deleted file mode 100644
index 87da70695f0a..000000000000
--- a/include/asm-arm/arch-ixp4xx/irq.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * irq.h 
- *
- *  Copyright (C) 2002 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#define fixup_irq(irq)  (irq)
-
diff --git a/include/asm-arm/arch-ixp4xx/param.h b/include/asm-arm/arch-ixp4xx/param.h
deleted file mode 100644
index 8a757125e5e7..000000000000
--- a/include/asm-arm/arch-ixp4xx/param.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * linux/include/asm-arm/arch-ixp4xx/param.h
- */
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
index daf9790645ca..13aee17b0475 100644
--- a/include/asm-arm/arch-ixp4xx/platform.h
+++ b/include/asm-arm/arch-ixp4xx/platform.h
@@ -38,6 +38,33 @@ extern unsigned long ixp4xx_exp_bus_size;
 #define IXP4XX_EXP_BUS_BASE(region)\
                 (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size))
 
+#define IXP4XX_EXP_BUS_END(region)\
+                (IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1)
+
+/* Those macros can be used to adjust timing and configure
+ * other features for each region.
+ */
+
+#define IXP4XX_EXP_BUS_RECOVERY_T(x)    (((x) & 0x0f) << 16)
+#define IXP4XX_EXP_BUS_HOLD_T(x)        (((x) & 0x03) << 20)
+#define IXP4XX_EXP_BUS_STROBE_T(x)      (((x) & 0x0f) << 22)
+#define IXP4XX_EXP_BUS_SETUP_T(x)       (((x) & 0x03) << 26)
+#define IXP4XX_EXP_BUS_ADDR_T(x)        (((x) & 0x03) << 28)
+#define IXP4XX_EXP_BUS_SIZE(x)          (((x) & 0x0f) << 10)
+#define IXP4XX_EXP_BUS_CYCLES(x)        (((x) & 0x03) << 14)
+
+#define IXP4XX_EXP_BUS_CS_EN            (1L << 31)
+#define IXP4XX_EXP_BUS_BYTE_RD16        (1L << 6)
+#define IXP4XX_EXP_BUS_HRDY_POL         (1L << 5)
+#define IXP4XX_EXP_BUS_MUX_EN           (1L << 4)
+#define IXP4XX_EXP_BUS_SPLT_EN          (1L << 3)
+#define IXP4XX_EXP_BUS_WR_EN            (1L << 1)
+#define IXP4XX_EXP_BUS_BYTE_EN          (1L << 0)
+
+#define IXP4XX_EXP_BUS_CYCLES_INTEL     0x00
+#define IXP4XX_EXP_BUS_CYCLES_MOTOROLA  0x01
+#define IXP4XX_EXP_BUS_CYCLES_HPI       0x02
+
 #define IXP4XX_FLASH_WRITABLE   (0x2)
 #define IXP4XX_FLASH_DEFAULT    (0xbcd23c40)
 #define IXP4XX_FLASH_WRITE      (0xbcd23c42)
diff --git a/include/asm-arm/arch-ixp4xx/uncompress.h b/include/asm-arm/arch-ixp4xx/uncompress.h
index 960c35810a22..09ae6c91be60 100644
--- a/include/asm-arm/arch-ixp4xx/uncompress.h
+++ b/include/asm-arm/arch-ixp4xx/uncompress.h
@@ -21,26 +21,18 @@
 
 static volatile u32* uart_base;
 
-static __inline__ void putc(char c)
+static inline void putc(int c)
 {
         /* Check THRE and TEMT bits before we transmit the character.
          */
-        while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE); 
+        while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
+                barrier();
+
         *uart_base = c;
 }
 
-/*
- * This does not append a newline
- */
-static void putstr(const char *s)
+static void flush(void)
 {
-        while (*s)
-        {
-                putc(*s);
-                if (*s == '\n')
-                        putc('\r');
-                s++;
-        }
 }
 
 static __inline__ void __arch_decomp_setup(unsigned long arch_id)
diff --git a/include/asm-arm/arch-l7200/param.h b/include/asm-arm/arch-l7200/param.h
deleted file mode 100644
index 9962a12ab158..000000000000
--- a/include/asm-arm/arch-l7200/param.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-l7200/param.h
- *
- * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
- *                    Steve Hill (sjhill@cotw.com)
- *
- * This file contains the hardware definitions for the
- * LinkUp Systems L7200 SOC development board.
- *
- * Changelog:
- *   04-21-2000 RS      Created L7200 version
- *   04-25-2000 SJH     Cleaned up file
- *   05-03-2000 SJH     Change comments and rate
- */
-
-/*
- * See 'time.h' for how the RTC HZ rate is set
- */
-#define HZ 128
diff --git a/include/asm-arm/arch-l7200/uncompress.h b/include/asm-arm/arch-l7200/uncompress.h
index 1caa2b560f53..9fcd40aee3e3 100644
--- a/include/asm-arm/arch-l7200/uncompress.h
+++ b/include/asm-arm/arch-l7200/uncompress.h
@@ -16,22 +16,17 @@
 #define __raw_writeb(v,p)       (*(volatile unsigned char *)(p) = (v))
 #define __raw_readb(p)          (*(volatile unsigned char *)(p))
 
-static __inline__ void putc(char c)
+static inline void putc(int c)
 {
         while(__raw_readb(IO_UART + 0x18) & 0x20 ||
-                __raw_readb(IO_UART + 0x18) & 0x08);
+              __raw_readb(IO_UART + 0x18) & 0x08)
+                barrier();
+
         __raw_writeb(c, IO_UART + 0x00);
 }
 
-static void putstr(const char *s)
+static inline void flush(void)
 {
-        while (*s) {
-                if (*s == 10) {                 /* If a LF, add CR */
-                        putc(10);
-                        putc(13);
-                }
-                putc(*(s++));
-        }
 }
 
 static __inline__ void arch_decomp_setup(void)
diff --git a/include/asm-arm/arch-lh7a40x/irq.h b/include/asm-arm/arch-lh7a40x/irq.h
deleted file mode 100644
index 0f5f0b10f6ca..000000000000
--- a/include/asm-arm/arch-lh7a40x/irq.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* include/asm-arm/arch-lh7a40x/irq.h
- *
- *  Copyright (C) 2004 Logic Product Development
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  version 2 as published by the Free Software Foundation.
- *
- */
-
-void __init lh7a40x_init_board_irq (void);
diff --git a/include/asm-arm/arch-lh7a40x/param.h b/include/asm-arm/arch-lh7a40x/param.h
deleted file mode 100644
index acad0bc5deba..000000000000
--- a/include/asm-arm/arch-lh7a40x/param.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/* include/asm-arm/arch-lh7a40x/param.h
- *
- *  Copyright (C) 2004 Coastal Environmental Systems
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  version 2 as published by the Free Software Foundation.
- *
- */
diff --git a/include/asm-arm/arch-lh7a40x/uncompress.h b/include/asm-arm/arch-lh7a40x/uncompress.h
index ec8ab67122f3..f8053346f608 100644
--- a/include/asm-arm/arch-lh7a40x/uncompress.h
+++ b/include/asm-arm/arch-lh7a40x/uncompress.h
@@ -22,20 +22,15 @@
 #define UART_STATUS (*(volatile unsigned long*) (UART2_PHYS + UART_R_STATUS))
 #define UART_DATA   (*(volatile unsigned long*) (UART2_PHYS + UART_R_DATA))
 
-static __inline__ void putc (char ch)
+static inline void putc(int ch)
 {
         while (UART_STATUS & nTxRdy)
-                ;
+                barrier();
         UART_DATA = ch;
 }
 
-static void putstr (const char* sz)
+static inline void flush(void)
 {
-        for (; *sz; ++sz) {
-                putc (*sz);
-                if (*sz == '\n')
-                        putc ('\r');
-        }
 }
 
         /* NULL functions; we don't presently need them */
diff --git a/include/asm-arm/arch-omap/param.h b/include/asm-arm/arch-omap/param.h
deleted file mode 100644
index face9ad41e97..000000000000
--- a/include/asm-arm/arch-omap/param.h
+++ /dev/null
@@ -1,8 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-omap/param.h
- *
- */
-
-#ifdef CONFIG_OMAP_32K_TIMER_HZ
-#define HZ      CONFIG_OMAP_32K_TIMER_HZ
-#endif
diff --git a/include/asm-arm/arch-omap/uncompress.h b/include/asm-arm/arch-omap/uncompress.h
index c718264affbd..ca2c8bec82e7 100644
--- a/include/asm-arm/arch-omap/uncompress.h
+++ b/include/asm-arm/arch-omap/uncompress.h
@@ -30,8 +30,7 @@ unsigned int system_rev;
 #define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0)
 #define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK
 
-static void
-putstr(const char *s)
+static void putc(int c)
 {
         volatile u8 * uart = 0;
         int shift = 2;
@@ -69,16 +68,13 @@ putstr(const char *s)
         /*
          * Now, xmit each character
          */
-        while (*s) {
-                while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
-                        barrier();
-                uart[UART_TX << shift] = *s;
-                if (*s++ == '\n') {
-                        while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
-                                barrier();
-                        uart[UART_TX << shift] = '\r';
-                }
-        }
+        while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
+                barrier();
+        uart[UART_TX << shift] = c;
+}
+
+static inline void flush(void)
+{
 }
 
 /*
diff --git a/include/asm-arm/arch-pxa/audio.h b/include/asm-arm/arch-pxa/audio.h
index 60976f830e3f..17eccd720136 100644
--- a/include/asm-arm/arch-pxa/audio.h
+++ b/include/asm-arm/arch-pxa/audio.h
@@ -6,8 +6,8 @@
 #include <sound/pcm.h>
 
 typedef struct {
-        int (*startup)(snd_pcm_substream_t *, void *);
-        void (*shutdown)(snd_pcm_substream_t *, void *);
+        int (*startup)(struct snd_pcm_substream *, void *);
+        void (*shutdown)(struct snd_pcm_substream *, void *);
         void (*suspend)(void *);
         void (*resume)(void *);
         void *priv;
diff --git a/include/asm-arm/arch-pxa/debug-macro.S b/include/asm-arm/arch-pxa/debug-macro.S
index b6ec68879176..9012cbc0ad8b 100644
--- a/include/asm-arm/arch-pxa/debug-macro.S
+++ b/include/asm-arm/arch-pxa/debug-macro.S
@@ -21,18 +21,5 @@
                 orr     \rx, \rx, #0x00100000
                 .endm
 
-                .macro  senduart,rd,rx
-                str     \rd, [\rx, #0]
-                .endm
-
-                .macro  busyuart,rd,rx
-1002:           ldr     \rd, [\rx, #0x14]
-                tst     \rd, #(1 << 6)
-                beq     1002b
-                .endm
-
-                .macro  waituart,rd,rx
-1001:           ldr     \rd, [\rx, #0x14]
-                tst     \rd, #(1 << 5)
-                beq     1001b
-                .endm
+#define UART_SHIFT      2
+#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-pxa/irq.h b/include/asm-arm/arch-pxa/irq.h
deleted file mode 100644
index 48c60f5eff6a..000000000000
--- a/include/asm-arm/arch-pxa/irq.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * linux/include/asm-arm/arch-pxa/irq.h
- *
- * Author:      Nicolas Pitre
- * Created:     Jun 15, 2001
- * Copyright:   MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#define fixup_irq(x)    (x)
-
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h
index 05c4b7027592..67af238a8f8e 100644
--- a/include/asm-arm/arch-pxa/irqs.h
+++ b/include/asm-arm/arch-pxa/irqs.h
@@ -176,6 +176,7 @@
 #elif defined(CONFIG_SHARP_LOCOMO)
 #define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
 #elif defined(CONFIG_ARCH_LUBBOCK) || \
+      defined(CONFIG_MACH_LOGICPD_PXA270) || \
       defined(CONFIG_MACH_MAINSTONE)
 #define NR_IRQS                 (IRQ_BOARD_END)
 #else
@@ -196,6 +197,11 @@
 #define LUBBOCK_USB_DISC_IRQ    LUBBOCK_IRQ(6)  /* usb disconnect */
 #define LUBBOCK_LAST_IRQ        LUBBOCK_IRQ(6)
 
+#define LPD270_IRQ(x)           (IRQ_BOARD_START + (x))
+#define LPD270_USBC_IRQ         LPD270_IRQ(2)
+#define LPD270_ETHERNET_IRQ     LPD270_IRQ(3)
+#define LPD270_AC97_IRQ         LPD270_IRQ(4)
+
 #define MAINSTONE_IRQ(x)        (IRQ_BOARD_START + (x))
 #define MAINSTONE_MMC_IRQ       MAINSTONE_IRQ(0)
 #define MAINSTONE_USIM_IRQ      MAINSTONE_IRQ(1)
diff --git a/include/asm-arm/arch-pxa/lpd270.h b/include/asm-arm/arch-pxa/lpd270.h
new file mode 100644
index 000000000000..501d240ac120
--- /dev/null
+++ b/include/asm-arm/arch-pxa/lpd270.h
@@ -0,0 +1,38 @@
+/*
+ * include/asm-arm/arch-pxa/lpd270.h
+ *
+ * Author:      Lennert Buytenhek
+ * Created:     Feb 10, 2006
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_LPD270_H
+#define __ASM_ARCH_LPD270_H
+
+#define LPD270_CPLD_PHYS        PXA_CS2_PHYS
+#define LPD270_CPLD_VIRT        0xf0000000
+#define LPD270_CPLD_SIZE        0x00100000
+
+#define LPD270_ETH_PHYS         (PXA_CS2_PHYS + 0x01000000)
+
+/* CPLD registers  */
+#define LPD270_CPLD_REG(x)      ((unsigned long)(LPD270_CPLD_VIRT + (x)))
+#define LPD270_CONTROL          LPD270_CPLD_REG(0x00)
+#define LPD270_PERIPHERAL0      LPD270_CPLD_REG(0x04)
+#define LPD270_PERIPHERAL1      LPD270_CPLD_REG(0x08)
+#define LPD270_CPLD_REVISION    LPD270_CPLD_REG(0x14)
+#define LPD270_EEPROM_SPI_ITF   LPD270_CPLD_REG(0x20)
+#define LPD270_MODE_PINS        LPD270_CPLD_REG(0x24)
+#define LPD270_EGPIO            LPD270_CPLD_REG(0x30)
+#define LPD270_INT_MASK         LPD270_CPLD_REG(0x40)
+#define LPD270_INT_STATUS       LPD270_CPLD_REG(0x50)
+
+#define LPD270_INT_AC97         (1 << 4)  /* AC'97 CODEC IRQ */
+#define LPD270_INT_ETHERNET     (1 << 3)  /* Ethernet controller IRQ */
+#define LPD270_INT_USBC         (1 << 2)  /* USB client cable detection IRQ */
+
+
+#endif
diff --git a/include/asm-arm/arch-pxa/param.h b/include/asm-arm/arch-pxa/param.h
deleted file mode 100644
index 3197d82d7573..000000000000
--- a/include/asm-arm/arch-pxa/param.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-pxa/param.h
- */
diff --git a/include/asm-arm/arch-pxa/uncompress.h b/include/asm-arm/arch-pxa/uncompress.h
index fe38090444e0..178aa2e073ac 100644
--- a/include/asm-arm/arch-pxa/uncompress.h
+++ b/include/asm-arm/arch-pxa/uncompress.h
@@ -17,23 +17,18 @@
 #define UART            FFUART
 
 
-static __inline__ void putc(char c)
+static inline void putc(char c)
 {
-        while (!(UART[5] & 0x20));
+        while (!(UART[5] & 0x20))
+                barrier();
         UART[0] = c;
 }
 
 /*
  * This does not append a newline
  */
-static void putstr(const char *s)
+static inline void flush(void)
 {
-        while (*s) {
-                putc(*s);
-                if (*s == '\n')
-                        putc('\r');
-                s++;
-        }
 }
 
 /*
diff --git a/include/asm-arm/arch-realview/debug-macro.S b/include/asm-arm/arch-realview/debug-macro.S
index 017ad996848d..f17efc65518a 100644
--- a/include/asm-arm/arch-realview/debug-macro.S
+++ b/include/asm-arm/arch-realview/debug-macro.S
@@ -11,8 +11,6 @@
  *
 */
 
-#include <linux/amba/serial.h>
-
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1                 @ MMU enabled?
@@ -21,18 +19,4 @@
                 orr     \rx, \rx, #0x00009000
                 .endm
 
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx, #UART01x_DR]
-                .endm
-
-                .macro  waituart,rd,rx
-1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
-                tst     \rd, #1 << 5            @ UARTFLGUTXFF - 1 when full
-                bne     1001b
-                .endm
-
-                .macro  busyuart,rd,rx
-1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
-                tst     \rd, #1 << 3            @ UARTFLGUBUSY - 1 when busy
-                bne     1001b
-                .endm
+#include <asm/hardware/debug-pl01x.S>
diff --git a/include/asm-arm/arch-realview/param.h b/include/asm-arm/arch-realview/param.h
deleted file mode 100644
index 89b1235d32bd..000000000000
--- a/include/asm-arm/arch-realview/param.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-realview/param.h
- *
- *  Copyright (C) 2002 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/include/asm-arm/arch-realview/uncompress.h b/include/asm-arm/arch-realview/uncompress.h
index b5e4d360665b..f05631d76743 100644
--- a/include/asm-arm/arch-realview/uncompress.h
+++ b/include/asm-arm/arch-realview/uncompress.h
@@ -27,22 +27,16 @@
 /*
  * This does not append a newline
  */
-static void putstr(const char *s)
+static inline void putc(int c)
 {
-        while (*s) {
-                while (AMBA_UART_FR & (1 << 5))
-                        barrier();
-
-                AMBA_UART_DR = *s;
+        while (AMBA_UART_FR & (1 << 5))
+                barrier();
 
-                if (*s == '\n') {
-                        while (AMBA_UART_FR & (1 << 5))
-                                barrier();
+        AMBA_UART_DR = c;
+}
 
-                        AMBA_UART_DR = '\r';
-                }
-                s++;
-        }
+static inline void flush(void)
+{
         while (AMBA_UART_FR & (1 << 3))
                 barrier();
 }
diff --git a/include/asm-arm/arch-rpc/debug-macro.S b/include/asm-arm/arch-rpc/debug-macro.S
index 456d3d754c3d..c634c8d8f4a1 100644
--- a/include/asm-arm/arch-rpc/debug-macro.S
+++ b/include/asm-arm/arch-rpc/debug-macro.S
@@ -20,19 +20,6 @@
                 orr     \rx, \rx, #0x00000fe0
                 .endm
 
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx]
-                .endm
-
-                .macro  busyuart,rd,rx
-1001:           ldrb    \rd, [\rx, #0x14]
-                and     \rd, \rd, #0x60
-                teq     \rd, #0x60
-                bne     1001b
-                .endm
-
-                .macro  waituart,rd,rx
-1001:           ldrb    \rd, [\rx, #0x18]
-                tst     \rd, #0x10
-                beq     1001b
-                .endm
+#define UART_SHIFT      2
+#define FLOW_CONTROL
+#include <asm/hardware/debug-8250.S>
diff --git a/include/asm-arm/arch-rpc/param.h b/include/asm-arm/arch-rpc/param.h
deleted file mode 100644
index 721dcd658858..000000000000
--- a/include/asm-arm/arch-rpc/param.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-rpc/param.h
- */
diff --git a/include/asm-arm/arch-rpc/uncompress.h b/include/asm-arm/arch-rpc/uncompress.h
index 43035fec64d2..06231ede54e5 100644
--- a/include/asm-arm/arch-rpc/uncompress.h
+++ b/include/asm-arm/arch-rpc/uncompress.h
@@ -67,31 +67,28 @@ extern __attribute__((pure)) struct param_struct *params(void);
 /*
  * This does not append a newline
  */
-static void putstr(const char *s)
+static void putc(int c)
 {
         extern void ll_write_char(char *, char c, char white);
         int x,y;
-        unsigned char c;
         char *ptr;
 
         x = params->video_x;
         y = params->video_y;
 
-        while ( ( c = *(unsigned char *)s++ ) != '\0' ) {
-                if ( c == '\n' ) {
+        if (c == '\n') {
+                if (++y >= video_num_lines)
+                        y--;
+        } else if (c == '\r') {
+                x = 0;
+        } else {
+                ptr = VIDMEM + ((y*video_num_columns*params->bytes_per_char_v+x)*bytes_per_char_h);
+                ll_write_char(ptr, c, white);
+                if (++x >= video_num_columns) {
                         x = 0;
                         if ( ++y >= video_num_lines ) {
                                 y--;
                         }
-                } else {
-                        ptr = VIDMEM + ((y*video_num_columns*params->bytes_per_char_v+x)*bytes_per_char_h);
-                        ll_write_char(ptr, c, white);
-                        if ( ++x >= video_num_columns ) {
-                                x = 0;
-                                if ( ++y >= video_num_lines ) {
-                                        y--;
-                                }
-                        }
                 }
         }
 
@@ -99,6 +96,10 @@ static void putstr(const char *s)
         params->video_y = y;
 }
 
+static inline void flush(void)
+{
+}
+
 static void error(char *x);
 
 /*
diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h
new file mode 100644
index 000000000000..e9d1ae1f354f
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h
@@ -0,0 +1,25 @@
+/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
+ *
+ * (c) 2005 Simtec Electronics
+ *      http://www.simtec.co.uk/products/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * OSIRIS - CPLD control constants
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_OSIRISCPLD_H
+#define __ASM_ARCH_OSIRISCPLD_H
+
+/* CTRL1 - NAND WP control */
+
+#define OSIRIS_CTRL1_NANDSEL            (0x3)
+#define OSIRIS_CTRL1_BOOT_INT           (1<<3)
+#define OSIRIS_CTRL1_PCMCIA             (1<<4)
+#define OSIRIS_CTRL1_PCMCIA_nWAIT       (1<<6)
+#define OSIRIS_CTRL1_PCMCIA_nIOIS16     (1<<7)
+
+#endif /* __ASM_ARCH_OSIRISCPLD_H */
diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h
new file mode 100644
index 000000000000..7c4b0cd2d14d
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/osiris-map.h
@@ -0,0 +1,41 @@
+/* linux/include/asm-arm/arch-s3c2410/osiris-map.h
+ *
+ * (c) 2005 Simtec Electronics
+ *      http://www.simtec.co.uk/products/
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * OSIRIS - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Changelog:
+*/
+
+/* needs arch/map.h including with this */
+
+#ifndef __ASM_ARCH_OSIRISMAP_H
+#define __ASM_ARCH_OSIRISMAP_H
+
+/* start peripherals off after the S3C2410 */
+
+#define OSIRIS_IOADDR(x)        (S3C2410_ADDR((x) + 0x05000000))
+
+#define OSIRIS_PA_CPLD          (S3C2410_CS1 | (3<<25))
+
+/* we put the CPLD registers next, to get them out of the way */
+
+#define OSIRIS_VA_CTRL1     OSIRIS_IOADDR(0x00000000)    /* 0x01300000 */
+#define OSIRIS_PA_CTRL1     (OSIRIS_PA_CPLD)
+
+#define OSIRIS_VA_CTRL2     OSIRIS_IOADDR(0x00100000)    /* 0x01400000 */
+#define OSIRIS_PA_CTRL2     (OSIRIS_PA_CPLD + (1<<24))
+
+#define OSIRIS_VA_CTRL3     OSIRIS_IOADDR(0x00200000)    /* 0x01500000 */
+#define OSIRIS_PA_CTRL3     (OSIRIS_PA_CPLD + (2<<24))
+
+#define OSIRIS_VA_CTRL4     OSIRIS_IOADDR(0x00300000)    /* 0x01600000 */
+#define OSIRIS_PA_CTRL4     (OSIRIS_PA_CPLD + (3<<24))
+
+#endif /* __ASM_ARCH_OSIRISMAP_H */
diff --git a/include/asm-arm/arch-s3c2410/param.h b/include/asm-arm/arch-s3c2410/param.h
deleted file mode 100644
index 483d3f149883..000000000000
--- a/include/asm-arm/arch-s3c2410/param.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* linux/include/asm-arm/arch-s3c2410/param.h
- *
- * (c) 2003 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2410 - Machine parameters
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Changelog:
- *  02-Sep-2003 BJD  Created file
- *  12-Mar-2004 BJD  Added include protection
-*/
-
-#ifndef __ASM_ARCH_PARAM_H
-#define __ASM_ARCH_PARAM_H
-
-/* we cannot get our timer down to 100Hz with the setup as is, but we can
- * manage 200 clock ticks per second... if this is a problem, we can always
- * add a software pre-scaler to the evil timer systems.
-*/
-
-#define HZ   200
-
-#endif /* __ASM_ARCH_PARAM_H */
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h
index 9697f93afe74..d2574084697f 100644
--- a/include/asm-arm/arch-s3c2410/regs-gpio.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpio.h
@@ -979,6 +979,7 @@
 #define S3C2410_MISCCR_CLK0_HCLK    (3<<4)
 #define S3C2410_MISCCR_CLK0_PCLK    (4<<4)
 #define S3C2410_MISCCR_CLK0_DCLK0   (5<<4)
+#define S3C2410_MISCCR_CLK0_MASK    (7<<4)
 
 #define S3C2410_MISCCR_CLK1_MPLL    (0<<8)
 #define S3C2410_MISCCR_CLK1_UPLL    (1<<8)
@@ -986,6 +987,7 @@
 #define S3C2410_MISCCR_CLK1_HCLK    (3<<8)
 #define S3C2410_MISCCR_CLK1_PCLK    (4<<8)
 #define S3C2410_MISCCR_CLK1_DCLK1   (5<<8)
+#define S3C2410_MISCCR_CLK1_MASK    (7<<8)
 
 #define S3C2410_MISCCR_USBSUSPND0   (1<<12)
 #define S3C2410_MISCCR_USBSUSPND1   (1<<13)
diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h
index 4367ec054b51..a6f6a0e44afa 100644
--- a/include/asm-arm/arch-s3c2410/uncompress.h
+++ b/include/asm-arm/arch-s3c2410/uncompress.h
@@ -67,8 +67,7 @@ uart_rd(unsigned int reg)
  * waiting for tx to happen...
 */
 
-static void
-putc(char ch)
+static void putc(int ch)
 {
         int cpuid = S3C2410_GSTATUS1_2410;
 
@@ -77,9 +76,6 @@ putc(char ch)
         cpuid &= S3C2410_GSTATUS1_IDMASK;
 #endif
 
-        if (ch == '\n')
-                putc('\r');    /* expand newline to \r\n */
-
         if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
                 int level;
 
@@ -101,19 +97,16 @@ putc(char ch)
         } else {
                 /* not using fifos */
 
-                while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE);
+                while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
+                        barrier();
         }
 
         /* write byte to transmission register */
         uart_wr(S3C2410_UTXH, ch);
 }
 
-static void
-putstr(const char *ptr)
+static inline void flush(void)
 {
-        for (; *ptr != '\0'; ptr++) {
-                putc(*ptr);
-        }
 }
 
 #define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0)
diff --git a/include/asm-arm/arch-sa1100/debug-macro.S b/include/asm-arm/arch-sa1100/debug-macro.S
index 755fa3453862..267c317a7408 100644
--- a/include/asm-arm/arch-sa1100/debug-macro.S
+++ b/include/asm-arm/arch-sa1100/debug-macro.S
@@ -10,6 +10,7 @@
  * published by the Free Software Foundation.
  *
 */
+#include <asm/hardware.h>
 
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
diff --git a/include/asm-arm/arch-sa1100/param.h b/include/asm-arm/arch-sa1100/param.h
deleted file mode 100644
index 867488909ecd..000000000000
--- a/include/asm-arm/arch-sa1100/param.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-sa1100/param.h
- */
diff --git a/include/asm-arm/arch-sa1100/uncompress.h b/include/asm-arm/arch-sa1100/uncompress.h
index 43453501ee66..2601a77a6dda 100644
--- a/include/asm-arm/arch-sa1100/uncompress.h
+++ b/include/asm-arm/arch-sa1100/uncompress.h
@@ -17,7 +17,7 @@
 
 #define UART(x)         (*(volatile unsigned long *)(serial_port + (x)))
 
-static void putstr( const char *s )
+static void putc(int c)
 {
         unsigned long serial_port;
 
@@ -31,19 +31,16 @@ static void putstr( const char *s )
                 return;
         } while (0);
 
-        for (; *s; s++) {
-                /* wait for space in the UART's transmitter */
-                while (!(UART(UTSR1) & UTSR1_TNF));
+        /* wait for space in the UART's transmitter */
+        while (!(UART(UTSR1) & UTSR1_TNF))
+                barrier();
 
-                /* send the character out. */
-                UART(UTDR) = *s;
+        /* send the character out. */
+        UART(UTDR) = c;
+}
 
-                /* if a LF, also do CR... */
-                if (*s == 10) {
-                        while (!(UART(UTSR1) & UTSR1_TNF));
-                        UART(UTDR) = 13;
-                }
-        }
+static inline void flush(void)
+{
 }
 
 /*
diff --git a/include/asm-arm/arch-shark/param.h b/include/asm-arm/arch-shark/param.h
deleted file mode 100644
index 997eeb71de00..000000000000
--- a/include/asm-arm/arch-shark/param.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-shark/param.h
- *
- * by Alexander Schulz
- */
diff --git a/include/asm-arm/arch-shark/uncompress.h b/include/asm-arm/arch-shark/uncompress.h
index 910a8e0a0ca5..7eca6534f1bb 100644
--- a/include/asm-arm/arch-shark/uncompress.h
+++ b/include/asm-arm/arch-shark/uncompress.h
@@ -9,7 +9,7 @@
 
 #define SERIAL_BASE ((volatile unsigned char *)0x400003f8)
 
-static __inline__ void putc(char c)
+static inline void putc(int c)
 {
         int t;
 
@@ -18,17 +18,8 @@ static __inline__ void putc(char c)
         while (t--);
 }
 
-/*
- * This does not append a newline
- */
-static void putstr(const char *s)
+static inline void flush(void)
 {
-        while (*s) {
-                putc(*s);
-                if (*s == '\n')
-                        putc('\r');
-                s++;
-        }
 }
 
 #ifdef DEBUG
diff --git a/include/asm-arm/arch-versatile/debug-macro.S b/include/asm-arm/arch-versatile/debug-macro.S
index ef6167116dbb..fe106d184e62 100644
--- a/include/asm-arm/arch-versatile/debug-macro.S
+++ b/include/asm-arm/arch-versatile/debug-macro.S
@@ -11,8 +11,6 @@
  *
 */
 
-#include <linux/amba/serial.h>
-
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
                 tst     \rx, #1                 @ MMU enabled?
@@ -22,18 +20,4 @@
                 orr     \rx, \rx, #0x00001000
                 .endm
 
-                .macro  senduart,rd,rx
-                strb    \rd, [\rx, #UART01x_DR]
-                .endm
-
-                .macro  waituart,rd,rx
-1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
-                tst     \rd, #1 << 5            @ UARTFLGUTXFF - 1 when full
-                bne     1001b
-                .endm
-
-                .macro  busyuart,rd,rx
-1001:           ldr     \rd, [\rx, #0x18]       @ UARTFLG
-                tst     \rd, #1 << 3            @ UARTFLGUBUSY - 1 when busy
-                bne     1001b
-                .endm
+#include <asm/hardware/debug-pl01x.S>
diff --git a/include/asm-arm/arch-versatile/param.h b/include/asm-arm/arch-versatile/param.h
deleted file mode 100644
index 34b897335f87..000000000000
--- a/include/asm-arm/arch-versatile/param.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-versatile/param.h
- *
- *  Copyright (C) 2002 ARM Limited
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
diff --git a/include/asm-arm/arch-versatile/uncompress.h b/include/asm-arm/arch-versatile/uncompress.h
index 2f57499c7b92..7215133d0514 100644
--- a/include/asm-arm/arch-versatile/uncompress.h
+++ b/include/asm-arm/arch-versatile/uncompress.h
@@ -25,22 +25,16 @@
 /*
  * This does not append a newline
  */
-static void putstr(const char *s)
+static inline void putc(int c)
 {
-        while (*s) {
-                while (AMBA_UART_FR & (1 << 5))
-                        barrier();
-
-                AMBA_UART_DR = *s;
+        while (AMBA_UART_FR & (1 << 5))
+                barrier();
 
-                if (*s == '\n') {
-                        while (AMBA_UART_FR & (1 << 5))
-                                barrier();
+        AMBA_UART_DR = c;
+}
 
-                        AMBA_UART_DR = '\r';
-                }
-                s++;
-        }
+static inline void flush(void)
+{
         while (AMBA_UART_FR & (1 << 3))
                 barrier();
 }
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
index f31ac92b6c7f..d53bafa9bf1c 100644
--- a/include/asm-arm/assembler.h
+++ b/include/asm-arm/assembler.h
@@ -80,16 +80,33 @@
         instr   regs
 
 /*
- * Save the current IRQ state and disable IRQs.  Note that this macro
- * assumes FIQs are enabled, and that the processor is in SVC mode.
+ * Enable and disable interrupts
  */
-        .macro  save_and_disable_irqs, oldcpsr
-        mrs     \oldcpsr, cpsr
 #if __LINUX_ARM_ARCH__ >= 6
+        .macro  disable_irq
         cpsid   i
+        .endm
+
+        .macro  enable_irq
+        cpsie   i
+        .endm
 #else
-        msr     cpsr_c, #PSR_I_BIT | MODE_SVC
+        .macro  disable_irq
+        msr     cpsr_c, #PSR_I_BIT | SVC_MODE
+        .endm
+
+        .macro  enable_irq
+        msr     cpsr_c, #SVC_MODE
+        .endm
 #endif
+
+/*
+ * Save the current IRQ state and disable IRQs.  Note that this macro
+ * assumes FIQs are enabled, and that the processor is in SVC mode.
+ */
+        .macro  save_and_disable_irqs, oldcpsr
+        mrs     \oldcpsr, cpsr
+        disable_irq
         .endm
 
 /*
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h
index d02de721ecc1..0ac54b1a8bad 100644
--- a/include/asm-arm/bitops.h
+++ b/include/asm-arm/bitops.h
@@ -117,65 +117,7 @@ ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
         return res & mask;
 }
 
-/*
- * Now the non-atomic variants.  We let the compiler handle all
- * optimisations for these.  These are all _native_ endian.
- */
-static inline void __set_bit(int nr, volatile unsigned long *p)
-{
-        p[nr >> 5] |= (1UL << (nr & 31));
-}
-
-static inline void __clear_bit(int nr, volatile unsigned long *p)
-{
-        p[nr >> 5] &= ~(1UL << (nr & 31));
-}
-
-static inline void __change_bit(int nr, volatile unsigned long *p)
-{
-        p[nr >> 5] ^= (1UL << (nr & 31));
-}
-
-static inline int __test_and_set_bit(int nr, volatile unsigned long *p)
-{
-        unsigned long oldval, mask = 1UL << (nr & 31);
-
-        p += nr >> 5;
-
-        oldval = *p;
-        *p = oldval | mask;
-        return oldval & mask;
-}
-
-static inline int __test_and_clear_bit(int nr, volatile unsigned long *p)
-{
-        unsigned long oldval, mask = 1UL << (nr & 31);
-
-        p += nr >> 5;
-
-        oldval = *p;
-        *p = oldval & ~mask;
-        return oldval & mask;
-}
-
-static inline int __test_and_change_bit(int nr, volatile unsigned long *p)
-{
-        unsigned long oldval, mask = 1UL << (nr & 31);
-
-        p += nr >> 5;
-
-        oldval = *p;
-        *p = oldval ^ mask;
-        return oldval & mask;
-}
-
-/*
- * This routine doesn't need to be atomic.
- */
-static inline int __test_bit(int nr, const volatile unsigned long * p)
-{
-        return (p[nr >> 5] >> (nr & 31)) & 1UL;
-}
+#include <asm-generic/bitops/non-atomic.h>
 
 /*
  *  A note about Endian-ness.
@@ -261,7 +203,6 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
 #define test_and_set_bit(nr,p)          ATOMIC_BITOP_LE(test_and_set_bit,nr,p)
 #define test_and_clear_bit(nr,p)        ATOMIC_BITOP_LE(test_and_clear_bit,nr,p)
 #define test_and_change_bit(nr,p)       ATOMIC_BITOP_LE(test_and_change_bit,nr,p)
-#define test_bit(nr,p)                  __test_bit(nr,p)
 #define find_first_zero_bit(p,sz)       _find_first_zero_bit_le(p,sz)
 #define find_next_zero_bit(p,sz,off)    _find_next_zero_bit_le(p,sz,off)
 #define find_first_bit(p,sz)            _find_first_bit_le(p,sz)
@@ -280,7 +221,6 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
 #define test_and_set_bit(nr,p)          ATOMIC_BITOP_BE(test_and_set_bit,nr,p)
 #define test_and_clear_bit(nr,p)        ATOMIC_BITOP_BE(test_and_clear_bit,nr,p)
 #define test_and_change_bit(nr,p)       ATOMIC_BITOP_BE(test_and_change_bit,nr,p)
-#define test_bit(nr,p)                  __test_bit(nr,p)
 #define find_first_zero_bit(p,sz)       _find_first_zero_bit_be(p,sz)
 #define find_next_zero_bit(p,sz,off)    _find_next_zero_bit_be(p,sz,off)
 #define find_first_bit(p,sz)            _find_first_bit_be(p,sz)
@@ -292,57 +232,41 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
 
 #if __LINUX_ARM_ARCH__ < 5
 
-/*
- * ffz = Find First Zero in word. Undefined if no zero exists,
- * so code should check against ~0UL first..
- */
-static inline unsigned long ffz(unsigned long word)
-{
-        int k;
-
-        word = ~word;
-        k = 31;
-        if (word & 0x0000ffff) { k -= 16; word <<= 16; }
-        if (word & 0x00ff0000) { k -= 8;  word <<= 8;  }
-        if (word & 0x0f000000) { k -= 4;  word <<= 4;  }
-        if (word & 0x30000000) { k -= 2;  word <<= 2;  }
-        if (word & 0x40000000) { k -= 1; }
-        return k;
-}
-
-/*
- * ffz = Find First Zero in word. Undefined if no zero exists,
- * so code should check against ~0UL first..
- */
-static inline unsigned long __ffs(unsigned long word)
-{
-        int k;
-
-        k = 31;
-        if (word & 0x0000ffff) { k -= 16; word <<= 16; }
-        if (word & 0x00ff0000) { k -= 8;  word <<= 8;  }
-        if (word & 0x0f000000) { k -= 4;  word <<= 4;  }
-        if (word & 0x30000000) { k -= 2;  word <<= 2;  }
-        if (word & 0x40000000) { k -= 1; }
-        return k;
-}
-
-/*
- * fls: find last bit set.
- */
+#include <asm-generic/bitops/ffz.h>
+#include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/ffs.h>
 
-#define fls(x) generic_fls(x)
-#define fls64(x)   generic_fls64(x)
-
-/*
- * ffs: find first bit set. This is defined the same way as
- * the libc and compiler builtin ffs routines, therefore
- * differs in spirit from the above ffz (man ffs).
- */
+#else
 
-#define ffs(x) generic_ffs(x)
+static inline int constant_fls(int x)
+{
+        int r = 32;
 
-#else
+        if (!x)
+                return 0;
+        if (!(x & 0xffff0000u)) {
+                x <<= 16;
+                r -= 16;
+        }
+        if (!(x & 0xff000000u)) {
+                x <<= 8;
+                r -= 8;
+        }
+        if (!(x & 0xf0000000u)) {
+                x <<= 4;
+                r -= 4;
+        }
+        if (!(x & 0xc0000000u)) {
+                x <<= 2;
+                r -= 2;
+        }
+        if (!(x & 0x80000000u)) {
+                x <<= 1;
+                r -= 1;
+        }
+        return r;
+}
 
 /*
  * On ARMv5 and above those functions can be implemented around
@@ -350,39 +274,18 @@ static inline unsigned long __ffs(unsigned long word)
  */
 
 #define fls(x) \
-        ( __builtin_constant_p(x) ? generic_fls(x) : \
+        ( __builtin_constant_p(x) ? constant_fls(x) : \
           ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
-#define fls64(x)   generic_fls64(x)
 #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
 #define __ffs(x) (ffs(x) - 1)
 #define ffz(x) __ffs( ~(x) )
 
 #endif
 
-/*
- * Find first bit set in a 168-bit bitmap, where the first
- * 128 bits are unlikely to be set.
- */
-static inline int sched_find_first_bit(const unsigned long *b)
-{
-        unsigned long v;
-        unsigned int off;
-
-        for (off = 0; v = b[off], off < 4; off++) {
-                if (unlikely(v))
-                        break;
-        }
-        return __ffs(v) + off * 32;
-}
-
-/*
- * hweightN: returns the hamming weight (i.e. the number
- * of bits set) of a N-bit word
- */
+#include <asm-generic/bitops/fls64.h>
 
-#define hweight32(x) generic_hweight32(x)
-#define hweight16(x) generic_hweight16(x)
-#define hweight8(x) generic_hweight8(x)
+#include <asm-generic/bitops/sched.h>
+#include <asm-generic/bitops/hweight.h>
 
 /*
  * Ext2 is defined to use little-endian byte ordering.
@@ -397,7 +300,7 @@ static inline int sched_find_first_bit(const unsigned long *b)
 #define ext2_clear_bit_atomic(lock,nr,p)        \
                 test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 #define ext2_test_bit(nr,p)                     \
-                __test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+                test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 #define ext2_find_first_zero_bit(p,sz)          \
                 _find_first_zero_bit_le(p,sz)
 #define ext2_find_next_zero_bit(p,sz,off)       \
@@ -410,7 +313,7 @@ static inline int sched_find_first_bit(const unsigned long *b)
 #define minix_set_bit(nr,p)                     \
                 __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 #define minix_test_bit(nr,p)                    \
-                __test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+                test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 #define minix_test_and_set_bit(nr,p)            \
                 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 #define minix_test_and_clear_bit(nr,p)          \
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index 09e19a783a51..746be56b1b70 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -71,6 +71,14 @@
 # endif
 #endif
 
+#if defined(CONFIG_CPU_XSC3)
+# ifdef _CACHE
+#  define MULTI_CACHE 1
+# else
+#  define _CACHE xsc3
+# endif
+#endif
+
 #if defined(CONFIG_CPU_V6)
 //# ifdef _CACHE
 #  define MULTI_CACHE 1
diff --git a/include/asm-arm/delay.h b/include/asm-arm/delay.h
index 1704360e9699..b2deda181549 100644
--- a/include/asm-arm/delay.h
+++ b/include/asm-arm/delay.h
@@ -6,6 +6,8 @@
 #ifndef __ASM_ARM_DELAY_H
 #define __ASM_ARM_DELAY_H
 
+#include <asm/param.h>  /* HZ */
+
 extern void __delay(int loops);
 
 /*
@@ -13,7 +15,7 @@ extern void __delay(int loops);
  * it, it means that you're calling udelay() with an out of range value.
  *
  * With currently imposed limits, this means that we support a max delay
- * of 2000us and 671 bogomips
+ * of 2000us. Further limits: HZ<=1000 and bogomips<=3355
  */
 extern void __bad_udelay(void);
 
@@ -32,10 +34,10 @@ extern void __const_udelay(unsigned long);
 
 #define MAX_UDELAY_MS 2
 
-#define udelay(n)                                               \
-        (__builtin_constant_p(n) ?                              \
-          ((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() :      \
-                        __const_udelay((n) * 0x68dbul)) :       \
+#define udelay(n)                                                       \
+        (__builtin_constant_p(n) ?                                      \
+          ((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() :              \
+                        __const_udelay((n) * ((2199023U*HZ)>>11))) :    \
           __udelay(n))
 
 #endif /* defined(_ARM_DELAY_H) */
diff --git a/include/asm-arm/domain.h b/include/asm-arm/domain.h
index da1d960387d9..f8ea2de4848e 100644
--- a/include/asm-arm/domain.h
+++ b/include/asm-arm/domain.h
@@ -16,11 +16,29 @@
  *  DOMAIN_IO     - domain 2 includes all IO only
  *  DOMAIN_USER   - domain 1 includes all user memory only
  *  DOMAIN_KERNEL - domain 0 includes all kernel memory only
+ *
+ * The domain numbering depends on whether we support 36 physical
+ * address for I/O or not.  Addresses above the 32 bit boundary can
+ * only be mapped using supersections and supersections can only
+ * be set for domain 0.  We could just default to DOMAIN_IO as zero,
+ * but there may be systems with supersection support and no 36-bit
+ * addressing.  In such cases, we want to map system memory with
+ * supersections to reduce TLB misses and footprint.
+ *
+ * 36-bit addressing and supersections are only available on
+ * CPUs based on ARMv6+ or the Intel XSC3 core.
  */
+#ifndef CONFIG_IO_36
 #define DOMAIN_KERNEL   0
 #define DOMAIN_TABLE    0
 #define DOMAIN_USER     1
 #define DOMAIN_IO       2
+#else
+#define DOMAIN_KERNEL   2
+#define DOMAIN_TABLE    2
+#define DOMAIN_USER     1
+#define DOMAIN_IO       0
+#endif
 
 /*
  * Domain types
diff --git a/include/asm-arm/hardware/debug-8250.S b/include/asm-arm/hardware/debug-8250.S
new file mode 100644
index 000000000000..4594fea91ec1
--- /dev/null
+++ b/include/asm-arm/hardware/debug-8250.S
@@ -0,0 +1,29 @@
+/*
+ * linux/include/asm-arm/hardware/debug-8250.h
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/serial_reg.h>
+
+                .macro  senduart,rd,rx
+                strb    \rd, [\rx, #UART_TX << UART_SHIFT]
+                .endm
+
+                .macro  busyuart,rd,rx
+1002:           ldrb    \rd, [\rx, #UART_LSR << UART_SHIFT]
+                and     \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
+                teq     \rd, #UART_LSR_TEMT | UART_LSR_THRE
+                bne     1002b
+                .endm
+
+                .macro  waituart,rd,rx
+#ifdef FLOW_CONTROL
+1001:           ldrb    \rd, [\rx, #UART_MSR << UART_SHIFT]
+                tst     \rd, #UART_MSR_CTS
+                beq     1001b
+#endif
+                .endm
diff --git a/include/asm-arm/hardware/debug-pl01x.S b/include/asm-arm/hardware/debug-pl01x.S
new file mode 100644
index 000000000000..db0d0f7de5e9
--- /dev/null
+++ b/include/asm-arm/hardware/debug-pl01x.S
@@ -0,0 +1,29 @@
+/* linux/include/asm-arm/arch-integrator/debug-macro.S
+ *
+ * Debugging macro include header
+ *
+ *  Copyright (C) 1994-1999 Russell King
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+#include <linux/amba/serial.h>
+
+                .macro  senduart,rd,rx
+                strb    \rd, [\rx, #UART01x_DR]
+                .endm
+
+                .macro  waituart,rd,rx
+1001:           ldr     \rd, [\rx, #UART01x_FR]
+                tst     \rd, #UART01x_FR_TXFF
+                bne     1001b
+                .endm
+
+                .macro  busyuart,rd,rx
+1001:           ldr     \rd, [\rx, #UART01x_FR]
+                tst     \rd, #UART01x_FR_BUSY
+                bne     1001b
+                .endm
diff --git a/include/asm-arm/arch-ixp2000/uengine.h b/include/asm-arm/hardware/uengine.h
index b442d65c6593..b442d65c6593 100644
--- a/include/asm-arm/arch-ixp2000/uengine.h
+++ b/include/asm-arm/hardware/uengine.h
diff --git a/include/asm-arm/hardware/vic.h b/include/asm-arm/hardware/vic.h
index 81825eb54c9e..ed9ca3736a0b 100644
--- a/include/asm-arm/hardware/vic.h
+++ b/include/asm-arm/hardware/vic.h
@@ -39,7 +39,7 @@
 #define VIC_VECT_CNTL_ENABLE            (1 << 5)
 
 #ifndef __ASSEMBLY__
-void vic_init(void __iomem *base, u32 vic_sources);
+void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources);
 #endif
 
 #endif
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index fd0147e52dbb..b3479fc1cc8f 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -226,42 +226,6 @@ out:
 #endif  /* __mem_pci */
 
 /*
- * If this architecture has ISA IO, then define the isa_read/isa_write
- * macros.
- */
-#ifdef __mem_isa
-
-#define isa_readb(addr)                 __raw_readb(__mem_isa(addr))
-#define isa_readw(addr)                 __raw_readw(__mem_isa(addr))
-#define isa_readl(addr)                 __raw_readl(__mem_isa(addr))
-#define isa_writeb(val,addr)            __raw_writeb(val,__mem_isa(addr))
-#define isa_writew(val,addr)            __raw_writew(val,__mem_isa(addr))
-#define isa_writel(val,addr)            __raw_writel(val,__mem_isa(addr))
-#define isa_memset_io(a,b,c)            _memset_io(__mem_isa(a),(b),(c))
-#define isa_memcpy_fromio(a,b,c)        _memcpy_fromio((a),__mem_isa(b),(c))
-#define isa_memcpy_toio(a,b,c)          _memcpy_toio(__mem_isa((a)),(b),(c))
-
-#define isa_eth_io_copy_and_sum(a,b,c,d) \
-                                eth_copy_and_sum((a),__mem_isa(b),(c),(d))
-
-#else   /* __mem_isa */
-
-#define isa_readb(addr)                 (__readwrite_bug("isa_readb"),0)
-#define isa_readw(addr)                 (__readwrite_bug("isa_readw"),0)
-#define isa_readl(addr)                 (__readwrite_bug("isa_readl"),0)
-#define isa_writeb(val,addr)            __readwrite_bug("isa_writeb")
-#define isa_writew(val,addr)            __readwrite_bug("isa_writew")
-#define isa_writel(val,addr)            __readwrite_bug("isa_writel")
-#define isa_memset_io(a,b,c)            __readwrite_bug("isa_memset_io")
-#define isa_memcpy_fromio(a,b,c)        __readwrite_bug("isa_memcpy_fromio")
-#define isa_memcpy_toio(a,b,c)          __readwrite_bug("isa_memcpy_toio")
-
-#define isa_eth_io_copy_and_sum(a,b,c,d) \
-                                __readwrite_bug("isa_eth_io_copy_and_sum")
-
-#endif  /* __mem_isa */
-
-/*
  * ioremap and friends.
  *
  * ioremap takes a PCI memory address, as specified in
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index 2cd57b4d64d9..fd2f9bf4dcc6 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -10,19 +10,16 @@
 
 #ifndef __ASSEMBLY__
 
-#include <linux/compiler.h>
-
 struct tag;
 struct meminfo;
 struct sys_timer;
 
 struct machine_desc {
         /*
-         * Note! The first five elements are used
+         * Note! The first four elements are used
          * by assembler code in head-armv.S
          */
         unsigned int            nr;             /* architecture number  */
-        unsigned int __deprecated phys_ram;     /* start of physical ram */
         unsigned int            phys_io;        /* start of physical io */
         unsigned int            io_pg_offst;    /* byte offset for io 
                                                  * page tabe entry      */
diff --git a/include/asm-arm/mach/irq.h b/include/asm-arm/mach/irq.h
index 0ce6ca588d8c..d4d420ecf3a8 100644
--- a/include/asm-arm/mach/irq.h
+++ b/include/asm-arm/mach/irq.h
@@ -61,7 +61,7 @@ struct irqdesc {
         struct irqchip  *chip;
         struct irqaction *action;
         struct list_head pend;
-        void            *chipdata;
+        void __iomem    *base;
         void            *data;
         unsigned int    disable_depth;
 
@@ -74,6 +74,7 @@ struct irqdesc {
         unsigned int    noautoenable : 1;       /* don't automatically enable IRQ */
         unsigned int    unused   :25;
 
+        unsigned int    irqs_unhandled;
         struct proc_dir_entry *procdir;
 
 #ifdef CONFIG_SMP
@@ -113,8 +114,8 @@ void __set_irq_handler(unsigned int irq, irq_handler_t, int);
 #define set_irq_handler(irq,handler)            __set_irq_handler(irq,handler,0)
 #define set_irq_chained_handler(irq,handler)    __set_irq_handler(irq,handler,1)
 #define set_irq_data(irq,d)                     do { irq_desc[irq].data = d; } while (0)
-#define set_irq_chipdata(irq,d)                 do { irq_desc[irq].chipdata = d; } while (0)
-#define get_irq_chipdata(irq)                   (irq_desc[irq].chipdata)
+#define set_irq_chipdata(irq,d)                 do { irq_desc[irq].base = d; } while (0)
+#define get_irq_chipdata(irq)                   (irq_desc[irq].base)
 
 void set_irq_chip(unsigned int irq, struct irqchip *);
 void set_irq_flags(unsigned int irq, unsigned int flags);
diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h
index b4e1146ab682..afa5c3ea077c 100644
--- a/include/asm-arm/memory.h
+++ b/include/asm-arm/memory.h
@@ -172,9 +172,7 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
  *  virt_addr_valid(k)  indicates whether a virtual address is valid
  */
 #ifndef CONFIG_DISCONTIGMEM
-
-#define page_to_pfn(page)       (((page) - mem_map) + PHYS_PFN_OFFSET)
-#define pfn_to_page(pfn)        ((mem_map + (pfn)) - PHYS_PFN_OFFSET)
+#define ARCH_PFN_OFFSET         (PHYS_PFN_OFFSET)
 #define pfn_valid(pfn)          ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
 
 #define virt_to_page(kaddr)     (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT))
@@ -189,13 +187,8 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
  * around in memory.
  */
 #include <linux/numa.h>
-
-#define page_to_pfn(page)                                       \
-        (( (page) - page_zone(page)->zone_mem_map)              \
-          + page_zone(page)->zone_start_pfn)
-
-#define pfn_to_page(pfn)                                        \
-        (PFN_TO_MAPBASE(pfn) + LOCAL_MAP_NR((pfn) << PAGE_SHIFT))
+#define arch_pfn_to_nid(pfn)    (PFN_TO_NID(pfn))
+#define arch_local_page_offset(pfn, nid) (LOCAL_MAP_NR((pfn) << PAGE_OFFSET))
 
 #define pfn_valid(pfn)                                          \
         ({                                                      \
@@ -243,4 +236,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
 
 #endif
 
+#include <asm-generic/memory_model.h>
+
 #endif
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 416320d95419..a404d2bf0c68 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -40,6 +40,7 @@
  *        v4wb          - ARMv4 with writeback cache, without minicache
  *        v4_mc         - ARMv4 with minicache
  *        xscale        - Xscale
+ *        xsc3          - XScalev3
  */
 #undef _USER
 #undef MULTI_USER
@@ -84,6 +85,14 @@
 # endif
 #endif
 
+#ifdef CONFIG_CPU_XSC3
+# ifdef _USER
+#  define MULTI_USER 1
+# else
+#  define _USER xsc3_mc
+# endif
+#endif
+
 #ifdef CONFIG_CPU_COPY_V6
 # define MULTI_USER 1
 #endif
diff --git a/include/asm-arm/param.h b/include/asm-arm/param.h
index 94223d4d7e88..15806468ba72 100644
--- a/include/asm-arm/param.h
+++ b/include/asm-arm/param.h
@@ -11,12 +11,7 @@
 #define __ASM_PARAM_H
 
 #ifdef __KERNEL__
-# include <asm/arch/param.h>            /* for kernel version of HZ */
-
-# ifndef HZ
-#  define HZ            100             /* Internal kernel timer frequency */
-# endif
-
+# define HZ             CONFIG_HZ       /* Internal kernel timer frequency */
 # define USER_HZ        100             /* User interfaces are in "ticks" */
 # define CLOCKS_PER_SEC (USER_HZ)       /* like times() */
 #else
diff --git a/include/asm-arm/pgalloc.h b/include/asm-arm/pgalloc.h
index bc18ff405181..c4ac2e67768d 100644
--- a/include/asm-arm/pgalloc.h
+++ b/include/asm-arm/pgalloc.h
@@ -10,10 +10,15 @@
 #ifndef _ASMARM_PGALLOC_H
 #define _ASMARM_PGALLOC_H
 
+#include <asm/domain.h>
+#include <asm/pgtable-hwdef.h>
 #include <asm/processor.h>
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
 
+#define _PAGE_USER_TABLE        (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
+#define _PAGE_KERNEL_TABLE      (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
+
 /*
  * Since we have only two-level page tables, these are trivial
  */
diff --git a/include/asm-arm/pgtable-hwdef.h b/include/asm-arm/pgtable-hwdef.h
new file mode 100644
index 000000000000..1d033495cc75
--- /dev/null
+++ b/include/asm-arm/pgtable-hwdef.h
@@ -0,0 +1,88 @@
+/*
+ *  linux/include/asm-arm/pgtable-hwdef.h
+ *
+ *  Copyright (C) 1995-2002 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASMARM_PGTABLE_HWDEF_H
+#define _ASMARM_PGTABLE_HWDEF_H
+
+/*
+ * Hardware page table definitions.
+ *
+ * + Level 1 descriptor (PMD)
+ *   - common
+ */
+#define PMD_TYPE_MASK           (3 << 0)
+#define PMD_TYPE_FAULT          (0 << 0)
+#define PMD_TYPE_TABLE          (1 << 0)
+#define PMD_TYPE_SECT           (2 << 0)
+#define PMD_BIT4                (1 << 4)
+#define PMD_DOMAIN(x)           ((x) << 5)
+#define PMD_PROTECTION          (1 << 9)        /* v5 */
+/*
+ *   - section
+ */
+#define PMD_SECT_BUFFERABLE     (1 << 2)
+#define PMD_SECT_CACHEABLE      (1 << 3)
+#define PMD_SECT_AP_WRITE       (1 << 10)
+#define PMD_SECT_AP_READ        (1 << 11)
+#define PMD_SECT_TEX(x)         ((x) << 12)     /* v5 */
+#define PMD_SECT_APX            (1 << 15)       /* v6 */
+#define PMD_SECT_S              (1 << 16)       /* v6 */
+#define PMD_SECT_nG             (1 << 17)       /* v6 */
+#define PMD_SECT_SUPER          (1 << 18)       /* v6 */
+
+#define PMD_SECT_UNCACHED       (0)
+#define PMD_SECT_BUFFERED       (PMD_SECT_BUFFERABLE)
+#define PMD_SECT_WT             (PMD_SECT_CACHEABLE)
+#define PMD_SECT_WB             (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
+#define PMD_SECT_MINICACHE      (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
+#define PMD_SECT_WBWA           (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
+#define PMD_SECT_NONSHARED_DEV  (PMD_SECT_TEX(2))
+
+/*
+ *   - coarse table (not used)
+ */
+
+/*
+ * + Level 2 descriptor (PTE)
+ *   - common
+ */
+#define PTE_TYPE_MASK           (3 << 0)
+#define PTE_TYPE_FAULT          (0 << 0)
+#define PTE_TYPE_LARGE          (1 << 0)
+#define PTE_TYPE_SMALL          (2 << 0)
+#define PTE_TYPE_EXT            (3 << 0)        /* v5 */
+#define PTE_BUFFERABLE          (1 << 2)
+#define PTE_CACHEABLE           (1 << 3)
+
+/*
+ *   - extended small page/tiny page
+ */
+#define PTE_EXT_XN              (1 << 0)        /* v6 */
+#define PTE_EXT_AP_MASK         (3 << 4)
+#define PTE_EXT_AP0             (1 << 4)
+#define PTE_EXT_AP1             (2 << 4)
+#define PTE_EXT_AP_UNO_SRO      (0 << 4)
+#define PTE_EXT_AP_UNO_SRW      (PTE_EXT_AP0)
+#define PTE_EXT_AP_URO_SRW      (PTE_EXT_AP1)
+#define PTE_EXT_AP_URW_SRW      (PTE_EXT_AP1|PTE_EXT_AP0)
+#define PTE_EXT_TEX(x)          ((x) << 6)      /* v5 */
+#define PTE_EXT_APX             (1 << 9)        /* v6 */
+#define PTE_EXT_SHARED          (1 << 10)       /* v6 */
+#define PTE_EXT_NG              (1 << 11)       /* v6 */
+
+/*
+ *   - small page
+ */
+#define PTE_SMALL_AP_MASK       (0xff << 4)
+#define PTE_SMALL_AP_UNO_SRO    (0x00 << 4)
+#define PTE_SMALL_AP_UNO_SRW    (0x55 << 4)
+#define PTE_SMALL_AP_URO_SRW    (0xaa << 4)
+#define PTE_SMALL_AP_URW_SRW    (0xff << 4)
+
+#endif
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
index 70e00d08345e..e595ae24efe2 100644
--- a/include/asm-arm/pgtable.h
+++ b/include/asm-arm/pgtable.h
@@ -137,81 +137,6 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
 #define SUPERSECTION_MASK       (~(SUPERSECTION_SIZE-1))
 
 /*
- * Hardware page table definitions.
- *
- * + Level 1 descriptor (PMD)
- *   - common
- */
-#define PMD_TYPE_MASK           (3 << 0)
-#define PMD_TYPE_FAULT          (0 << 0)
-#define PMD_TYPE_TABLE          (1 << 0)
-#define PMD_TYPE_SECT           (2 << 0)
-#define PMD_BIT4                (1 << 4)
-#define PMD_DOMAIN(x)           ((x) << 5)
-#define PMD_PROTECTION          (1 << 9)        /* v5 */
-/*
- *   - section
- */
-#define PMD_SECT_BUFFERABLE     (1 << 2)
-#define PMD_SECT_CACHEABLE      (1 << 3)
-#define PMD_SECT_AP_WRITE       (1 << 10)
-#define PMD_SECT_AP_READ        (1 << 11)
-#define PMD_SECT_TEX(x)         ((x) << 12)     /* v5 */
-#define PMD_SECT_APX            (1 << 15)       /* v6 */
-#define PMD_SECT_S              (1 << 16)       /* v6 */
-#define PMD_SECT_nG             (1 << 17)       /* v6 */
-#define PMD_SECT_SUPER          (1 << 18)       /* v6 */
-
-#define PMD_SECT_UNCACHED       (0)
-#define PMD_SECT_BUFFERED       (PMD_SECT_BUFFERABLE)
-#define PMD_SECT_WT             (PMD_SECT_CACHEABLE)
-#define PMD_SECT_WB             (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
-#define PMD_SECT_MINICACHE      (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
-#define PMD_SECT_WBWA           (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
-#define PMD_SECT_NONSHARED_DEV  (PMD_SECT_TEX(2))
-
-/*
- *   - coarse table (not used)
- */
-
-/*
- * + Level 2 descriptor (PTE)
- *   - common
- */
-#define PTE_TYPE_MASK           (3 << 0)
-#define PTE_TYPE_FAULT          (0 << 0)
-#define PTE_TYPE_LARGE          (1 << 0)
-#define PTE_TYPE_SMALL          (2 << 0)
-#define PTE_TYPE_EXT            (3 << 0)        /* v5 */
-#define PTE_BUFFERABLE          (1 << 2)
-#define PTE_CACHEABLE           (1 << 3)
-
-/*
- *   - extended small page/tiny page
- */
-#define PTE_EXT_XN              (1 << 0)        /* v6 */
-#define PTE_EXT_AP_MASK         (3 << 4)
-#define PTE_EXT_AP0             (1 << 4)
-#define PTE_EXT_AP1             (2 << 4)
-#define PTE_EXT_AP_UNO_SRO      (0 << 4)
-#define PTE_EXT_AP_UNO_SRW      (PTE_EXT_AP0)
-#define PTE_EXT_AP_URO_SRW      (PTE_EXT_AP1)
-#define PTE_EXT_AP_URW_SRW      (PTE_EXT_AP1|PTE_EXT_AP0)
-#define PTE_EXT_TEX(x)          ((x) << 6)      /* v5 */
-#define PTE_EXT_APX             (1 << 9)        /* v6 */
-#define PTE_EXT_SHARED          (1 << 10)       /* v6 */
-#define PTE_EXT_NG              (1 << 11)       /* v6 */
-
-/*
- *   - small page
- */
-#define PTE_SMALL_AP_MASK       (0xff << 4)
-#define PTE_SMALL_AP_UNO_SRO    (0x00 << 4)
-#define PTE_SMALL_AP_UNO_SRW    (0x55 << 4)
-#define PTE_SMALL_AP_URO_SRW    (0xaa << 4)
-#define PTE_SMALL_AP_URW_SRW    (0xff << 4)
-
-/*
  * "Linux" PTE definitions.
  *
  * We keep two sets of PTEs - the hardware and the linux version.
@@ -236,11 +161,6 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
 
 #ifndef __ASSEMBLY__
 
-#include <asm/domain.h>
-
-#define _PAGE_USER_TABLE        (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
-#define _PAGE_KERNEL_TABLE      (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
-
 /*
  * The following macros handle the cache and bufferable bits...
  */
diff --git a/include/asm-arm/poll.h b/include/asm-arm/poll.h
index 2744ca831f5d..5030b2b232a3 100644
--- a/include/asm-arm/poll.h
+++ b/include/asm-arm/poll.h
@@ -16,6 +16,7 @@
 #define POLLWRBAND      0x0200
 #define POLLMSG         0x0400
 #define POLLREMOVE      0x1000
+#define POLLRDHUP       0x2000
 
 struct pollfd {
         int fd;
diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h
index 7bef2bf6be51..106045edb862 100644
--- a/include/asm-arm/proc-fns.h
+++ b/include/asm-arm/proc-fns.h
@@ -138,6 +138,14 @@
 #   define CPU_NAME cpu_xscale
 #  endif
 # endif
+# ifdef CONFIG_CPU_XSC3
+#  ifdef CPU_NAME
+#   undef  MULTI_CPU
+#   define MULTI_CPU
+#  else
+#   define CPU_NAME cpu_xsc3
+#  endif
+# endif
 # ifdef CONFIG_CPU_V6
 #  ifdef CPU_NAME
 #   undef  MULTI_CPU
diff --git a/include/asm-arm/rtc.h b/include/asm-arm/rtc.h
index 370dfe77589d..1a5c9232a91e 100644
--- a/include/asm-arm/rtc.h
+++ b/include/asm-arm/rtc.h
@@ -25,9 +25,6 @@ struct rtc_ops {
         int             (*proc)(char *buf);
 };
 
-void rtc_time_to_tm(unsigned long, struct rtc_time *);
-int rtc_tm_to_time(struct rtc_time *, unsigned long *);
-int rtc_valid_tm(struct rtc_time *);
 void rtc_next_alarm_time(struct rtc_time *, struct rtc_time *, struct rtc_time *);
 void rtc_update(unsigned long, unsigned long);
 int register_rtc(struct rtc_ops *);
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index ec91d1ff032a..95b3abf4851b 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -108,6 +108,25 @@ extern void __show_regs(struct pt_regs *);
 extern int cpu_architecture(void);
 extern void cpu_init(void);
 
+/*
+ * Intel's XScale3 core supports some v6 features (supersections, L2)
+ * but advertises itself as v5 as it does not support the v6 ISA.  For
+ * this reason, we need a way to explicitly test for this type of CPU.
+ */
+#ifndef CONFIG_CPU_XSC3
+#define cpu_is_xsc3()   0
+#else
+static inline int cpu_is_xsc3(void)
+{
+        extern unsigned int processor_id;
+
+        if ((processor_id & 0xffffe000) == 0x69056000)
+                return 1;
+
+        return 0;
+}
+#endif
+
 #define set_cr(x)                                       \
         __asm__ __volatile__(                           \
         "mcr    p15, 0, %0, c1, c0, 0   @ set CR"       \
diff --git a/include/asm-arm/tlb.h b/include/asm-arm/tlb.h
index f49bfb78c221..cb740025d413 100644
--- a/include/asm-arm/tlb.h
+++ b/include/asm-arm/tlb.h
@@ -19,6 +19,14 @@
 
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
+
+#ifndef CONFIG_MMU
+
+#include <linux/pagemap.h>
+#include <asm-generic/tlb.h>
+
+#else /* !CONFIG_MMU */
+
 #include <asm/pgalloc.h>
 
 /*
@@ -82,4 +90,5 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
 
 #define tlb_migrate_finish(mm)          do { } while (0)
 
+#endif /* CONFIG_MMU */
 #endif
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 0c2acc944a0a..728992451dd1 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -11,6 +11,13 @@
 #define _ASMARM_TLBFLUSH_H
 
 #include <linux/config.h>
+
+#ifndef CONFIG_MMU
+
+#define tlb_flush(tlb)  ((void) tlb)
+
+#else /* CONFIG_MMU */
+
 #include <asm/glue.h>
 
 #define TLB_V3_PAGE     (1 << 0)
@@ -423,4 +430,6 @@ extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte
 
 #endif
 
+#endif /* CONFIG_MMU */
+
 #endif