aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-arm
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-imx/imx-uart.h10
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h7
-rw-r--r--include/asm-arm/arch-ixp4xx/memory.h2
-rw-r--r--include/asm-arm/unistd.h21
4 files changed, 32 insertions, 8 deletions
diff --git a/include/asm-arm/arch-imx/imx-uart.h b/include/asm-arm/arch-imx/imx-uart.h
new file mode 100644
index 000000000000..3a685e1780ea
--- /dev/null
+++ b/include/asm-arm/arch-imx/imx-uart.h
@@ -0,0 +1,10 @@
1#ifndef ASMARM_ARCH_UART_H
2#define ASMARM_ARCH_UART_H
3
4#define IMXUART_HAVE_RTSCTS (1<<0)
5
6struct imxuart_platform_data {
7 unsigned int flags;
8};
9
10#endif
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 942b622455bc..b59520e56fc7 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -260,6 +260,12 @@ out:
260 260
261#endif 261#endif
262 262
263#ifndef CONFIG_PCI
264
265#define __io(v) v
266
267#else
268
263/* 269/*
264 * IXP4xx does not have a transparent cpu -> PCI I/O translation 270 * IXP4xx does not have a transparent cpu -> PCI I/O translation
265 * window. Instead, it has a set of registers that must be tweaked 271 * window. Instead, it has a set of registers that must be tweaked
@@ -578,6 +584,7 @@ __ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count)
578 584
579#define ioport_map(port, nr) ((void __iomem*)(port + PIO_OFFSET)) 585#define ioport_map(port, nr) ((void __iomem*)(port + PIO_OFFSET))
580#define ioport_unmap(addr) 586#define ioport_unmap(addr)
587#endif // !CONFIG_PCI
581 588
582#endif // __ASM_ARM_ARCH_IO_H 589#endif // __ASM_ARM_ARCH_IO_H
583 590
diff --git a/include/asm-arm/arch-ixp4xx/memory.h b/include/asm-arm/arch-ixp4xx/memory.h
index ee211d28a3ef..af9667b57ab3 100644
--- a/include/asm-arm/arch-ixp4xx/memory.h
+++ b/include/asm-arm/arch-ixp4xx/memory.h
@@ -14,7 +14,7 @@
14 */ 14 */
15#define PHYS_OFFSET UL(0x00000000) 15#define PHYS_OFFSET UL(0x00000000)
16 16
17#ifndef __ASSEMBLY__ 17#if !defined(__ASSEMBLY__) && defined(CONFIG_PCI)
18 18
19void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes); 19void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes);
20 20
diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h
index ee8dfea549bc..26f2f4828e03 100644
--- a/include/asm-arm/unistd.h
+++ b/include/asm-arm/unistd.h
@@ -410,7 +410,8 @@ type name(void) { \
410 __asm__ __volatile__ ( \ 410 __asm__ __volatile__ ( \
411 __syscall(name) \ 411 __syscall(name) \
412 : "=r" (__res_r0) \ 412 : "=r" (__res_r0) \
413 : __SYS_REG_LIST() ); \ 413 : __SYS_REG_LIST() \
414 : "memory" ); \
414 __res = __res_r0; \ 415 __res = __res_r0; \
415 __syscall_return(type,__res); \ 416 __syscall_return(type,__res); \
416} 417}
@@ -424,7 +425,8 @@ type name(type1 arg1) { \
424 __asm__ __volatile__ ( \ 425 __asm__ __volatile__ ( \
425 __syscall(name) \ 426 __syscall(name) \
426 : "=r" (__res_r0) \ 427 : "=r" (__res_r0) \
427 : __SYS_REG_LIST( "0" (__r0) ) ); \ 428 : __SYS_REG_LIST( "0" (__r0) ) \
429 : "memory" ); \
428 __res = __res_r0; \ 430 __res = __res_r0; \
429 __syscall_return(type,__res); \ 431 __syscall_return(type,__res); \
430} 432}
@@ -439,7 +441,8 @@ type name(type1 arg1,type2 arg2) { \
439 __asm__ __volatile__ ( \ 441 __asm__ __volatile__ ( \
440 __syscall(name) \ 442 __syscall(name) \
441 : "=r" (__res_r0) \ 443 : "=r" (__res_r0) \
442 : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) ); \ 444 : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) \
445 : "memory" ); \
443 __res = __res_r0; \ 446 __res = __res_r0; \
444 __syscall_return(type,__res); \ 447 __syscall_return(type,__res); \
445} 448}
@@ -456,7 +459,8 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \
456 __asm__ __volatile__ ( \ 459 __asm__ __volatile__ ( \
457 __syscall(name) \ 460 __syscall(name) \
458 : "=r" (__res_r0) \ 461 : "=r" (__res_r0) \
459 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) ); \ 462 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) \
463 : "memory" ); \
460 __res = __res_r0; \ 464 __res = __res_r0; \
461 __syscall_return(type,__res); \ 465 __syscall_return(type,__res); \
462} 466}
@@ -474,7 +478,8 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
474 __asm__ __volatile__ ( \ 478 __asm__ __volatile__ ( \
475 __syscall(name) \ 479 __syscall(name) \
476 : "=r" (__res_r0) \ 480 : "=r" (__res_r0) \
477 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) ); \ 481 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) \
482 : "memory" ); \
478 __res = __res_r0; \ 483 __res = __res_r0; \
479 __syscall_return(type,__res); \ 484 __syscall_return(type,__res); \
480} 485}
@@ -494,7 +499,8 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
494 __syscall(name) \ 499 __syscall(name) \
495 : "=r" (__res_r0) \ 500 : "=r" (__res_r0) \
496 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \ 501 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
497 "r" (__r3), "r" (__r4) ) ); \ 502 "r" (__r3), "r" (__r4) ) \
503 : "memory" ); \
498 __res = __res_r0; \ 504 __res = __res_r0; \
499 __syscall_return(type,__res); \ 505 __syscall_return(type,__res); \
500} 506}
@@ -514,7 +520,8 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6
514 __syscall(name) \ 520 __syscall(name) \
515 : "=r" (__res_r0) \ 521 : "=r" (__res_r0) \
516 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \ 522 : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \
517 "r" (__r3), "r" (__r4), "r" (__r5) ) ); \ 523 "r" (__r3), "r" (__r4), "r" (__r5) ) \
524 : "memory" ); \
518 __res = __res_r0; \ 525 __res = __res_r0; \
519 __syscall_return(type,__res); \ 526 __syscall_return(type,__res); \
520} 527}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-15 13:56:30 -0500