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-rw-r--r--include/asm-arm/arch-h720x/system.h8
-rw-r--r--include/asm-arm/arch-imx/imx-regs.h48
-rw-r--r--include/asm-arm/arch-ixp4xx/entry-macro.S9
-rw-r--r--include/asm-arm/arch-ixp4xx/hardware.h2
-rw-r--r--include/asm-arm/arch-ixp4xx/platform.h2
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h9
-rw-r--r--include/asm-arm/arch-pxa/pxafb.h1
-rw-r--r--include/asm-arm/arch-rpc/hardware.h4
-rw-r--r--include/asm-arm/arch-s3c2410/anubis-map.h10
-rw-r--r--include/asm-arm/arch-s3c2410/hardware.h7
-rw-r--r--include/asm-arm/arch-s3c2410/io.h58
-rw-r--r--include/asm-arm/arch-s3c2410/regs-clock.h21
-rw-r--r--include/asm-arm/arch-versatile/io.h6
-rw-r--r--include/asm-arm/bitops.h1
-rw-r--r--include/asm-arm/dma-mapping.h4
-rw-r--r--include/asm-arm/elf.h2
-rw-r--r--include/asm-arm/hardware/scoop.h2
-rw-r--r--include/asm-arm/io.h6
-rw-r--r--include/asm-arm/locks.h4
-rw-r--r--include/asm-arm/signal.h1
20 files changed, 142 insertions, 63 deletions
diff --git a/include/asm-arm/arch-h720x/system.h b/include/asm-arm/arch-h720x/system.h
index 0b025e227ec2..09eda84592ff 100644
--- a/include/asm-arm/arch-h720x/system.h
+++ b/include/asm-arm/arch-h720x/system.h
@@ -17,9 +17,11 @@
17static void arch_idle(void) 17static void arch_idle(void)
18{ 18{
19 CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; 19 CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE;
20 __asm__ __volatile__( 20 nop();
21 "mov r0, r0\n\t" 21 nop();
22 "mov r0, r0"); 22 CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN;
23 nop();
24 nop();
23} 25}
24 26
25 27
diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h
index 93b840e8fa60..a6912b3d8671 100644
--- a/include/asm-arm/arch-imx/imx-regs.h
+++ b/include/asm-arm/arch-imx/imx-regs.h
@@ -76,6 +76,7 @@
76#define GPIO_PIN_MASK 0x1f 76#define GPIO_PIN_MASK 0x1f
77#define GPIO_PORT_MASK (0x3 << 5) 77#define GPIO_PORT_MASK (0x3 << 5)
78 78
79#define GPIO_PORT_SHIFT 5
79#define GPIO_PORTA (0<<5) 80#define GPIO_PORTA (0<<5)
80#define GPIO_PORTB (1<<5) 81#define GPIO_PORTB (1<<5)
81#define GPIO_PORTC (2<<5) 82#define GPIO_PORTC (2<<5)
@@ -88,24 +89,37 @@
88#define GPIO_PF (0<<9) 89#define GPIO_PF (0<<9)
89#define GPIO_AF (1<<9) 90#define GPIO_AF (1<<9)
90 91
92#define GPIO_OCR_SHIFT 10
91#define GPIO_OCR_MASK (3<<10) 93#define GPIO_OCR_MASK (3<<10)
92#define GPIO_AIN (0<<10) 94#define GPIO_AIN (0<<10)
93#define GPIO_BIN (1<<10) 95#define GPIO_BIN (1<<10)
94#define GPIO_CIN (2<<10) 96#define GPIO_CIN (2<<10)
95#define GPIO_GPIO (3<<10) 97#define GPIO_DR (3<<10)
96 98
97#define GPIO_AOUT (1<<12) 99#define GPIO_AOUT_SHIFT 12
98#define GPIO_BOUT (1<<13) 100#define GPIO_AOUT_MASK (3<<12)
101#define GPIO_AOUT (0<<12)
102#define GPIO_AOUT_ISR (1<<12)
103#define GPIO_AOUT_0 (2<<12)
104#define GPIO_AOUT_1 (3<<12)
105
106#define GPIO_BOUT_SHIFT 14
107#define GPIO_BOUT_MASK (3<<14)
108#define GPIO_BOUT (0<<14)
109#define GPIO_BOUT_ISR (1<<14)
110#define GPIO_BOUT_0 (2<<14)
111#define GPIO_BOUT_1 (3<<14)
112
113#define GPIO_GIUS (1<<16)
99 114
100/* assignements for GPIO alternate/primary functions */ 115/* assignements for GPIO alternate/primary functions */
101 116
102/* FIXME: This list is not completed. The correct directions are 117/* FIXME: This list is not completed. The correct directions are
103 * missing on some (many) pins 118 * missing on some (many) pins
104 */ 119 */
105#define PA0_PF_A24 ( GPIO_PORTA | GPIO_PF | 0 ) 120#define PA0_AIN_SPI2_CLK ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 0 )
106#define PA0_AIN_SPI2_CLK ( GPIO_PORTA | GPIO_OUT | GPIO_AIN | 0 )
107#define PA0_AF_ETMTRACESYNC ( GPIO_PORTA | GPIO_AF | 0 ) 121#define PA0_AF_ETMTRACESYNC ( GPIO_PORTA | GPIO_AF | 0 )
108#define PA1_AOUT_SPI2_RXD ( GPIO_PORTA | GPIO_IN | GPIO_AOUT | 1 ) 122#define PA1_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTA | GPIO_IN | 1 )
109#define PA1_PF_TIN ( GPIO_PORTA | GPIO_PF | 1 ) 123#define PA1_PF_TIN ( GPIO_PORTA | GPIO_PF | 1 )
110#define PA2_PF_PWM0 ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 2 ) 124#define PA2_PF_PWM0 ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 2 )
111#define PA3_PF_CSI_MCLK ( GPIO_PORTA | GPIO_PF | 3 ) 125#define PA3_PF_CSI_MCLK ( GPIO_PORTA | GPIO_PF | 3 )
@@ -123,7 +137,7 @@
123#define PA15_PF_I2C_SDA ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 15 ) 137#define PA15_PF_I2C_SDA ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 15 )
124#define PA16_PF_I2C_SCL ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 16 ) 138#define PA16_PF_I2C_SCL ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 16 )
125#define PA17_AF_ETMTRACEPKT4 ( GPIO_PORTA | GPIO_AF | 17 ) 139#define PA17_AF_ETMTRACEPKT4 ( GPIO_PORTA | GPIO_AF | 17 )
126#define PA17_AIN_SPI2_SS ( GPIO_PORTA | GPIO_AIN | 17 ) 140#define PA17_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 17 )
127#define PA18_AF_ETMTRACEPKT5 ( GPIO_PORTA | GPIO_AF | 18 ) 141#define PA18_AF_ETMTRACEPKT5 ( GPIO_PORTA | GPIO_AF | 18 )
128#define PA19_AF_ETMTRACEPKT6 ( GPIO_PORTA | GPIO_AF | 19 ) 142#define PA19_AF_ETMTRACEPKT6 ( GPIO_PORTA | GPIO_AF | 19 )
129#define PA20_AF_ETMTRACEPKT7 ( GPIO_PORTA | GPIO_AF | 20 ) 143#define PA20_AF_ETMTRACEPKT7 ( GPIO_PORTA | GPIO_AF | 20 )
@@ -191,19 +205,27 @@
191#define PC15_PF_SPI1_SS ( GPIO_PORTC | GPIO_PF | 15 ) 205#define PC15_PF_SPI1_SS ( GPIO_PORTC | GPIO_PF | 15 )
192#define PC16_PF_SPI1_MISO ( GPIO_PORTC | GPIO_PF | 16 ) 206#define PC16_PF_SPI1_MISO ( GPIO_PORTC | GPIO_PF | 16 )
193#define PC17_PF_SPI1_MOSI ( GPIO_PORTC | GPIO_PF | 17 ) 207#define PC17_PF_SPI1_MOSI ( GPIO_PORTC | GPIO_PF | 17 )
208#define PC24_BIN_UART3_RI ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24 )
209#define PC25_BIN_UART3_DSR ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25 )
210#define PC26_AOUT_UART3_DTR ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 26 )
211#define PC27_BIN_UART3_DCD ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27 )
212#define PC28_BIN_UART3_CTS ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28 )
213#define PC29_AOUT_UART3_RTS ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 29 )
214#define PC30_BIN_UART3_TX ( GPIO_GIUS | GPIO_PORTC | GPIO_BIN | 30 )
215#define PC31_AOUT_UART3_RX ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 31)
194#define PD6_PF_LSCLK ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 6 ) 216#define PD6_PF_LSCLK ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 6 )
195#define PD7_PF_REV ( GPIO_PORTD | GPIO_PF | 7 ) 217#define PD7_PF_REV ( GPIO_PORTD | GPIO_PF | 7 )
196#define PD7_AF_UART2_DTR ( GPIO_PORTD | GPIO_IN | GPIO_AF | 7 ) 218#define PD7_AF_UART2_DTR ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | GPIO_AF | 7 )
197#define PD7_AIN_SPI2_SCLK ( GPIO_PORTD | GPIO_AIN | 7 ) 219#define PD7_AIN_SPI2_SCLK ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 7 )
198#define PD8_PF_CLS ( GPIO_PORTD | GPIO_PF | 8 ) 220#define PD8_PF_CLS ( GPIO_PORTD | GPIO_PF | 8 )
199#define PD8_AF_UART2_DCD ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 8 ) 221#define PD8_AF_UART2_DCD ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 8 )
200#define PD8_AIN_SPI2_SS ( GPIO_PORTD | GPIO_AIN | 8 ) 222#define PD8_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 8 )
201#define PD9_PF_PS ( GPIO_PORTD | GPIO_PF | 9 ) 223#define PD9_PF_PS ( GPIO_PORTD | GPIO_PF | 9 )
202#define PD9_AF_UART2_RI ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 9 ) 224#define PD9_AF_UART2_RI ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 9 )
203#define PD9_AOUT_SPI2_RXD ( GPIO_PORTD | GPIO_IN | GPIO_AOUT | 9 ) 225#define PD9_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | 9 )
204#define PD10_PF_SPL_SPR ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 10 ) 226#define PD10_PF_SPL_SPR ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 10 )
205#define PD10_AF_UART2_DSR ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 10 ) 227#define PD10_AF_UART2_DSR ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 10 )
206#define PD10_AIN_SPI2_TXD ( GPIO_PORTD | GPIO_OUT | GPIO_AIN | 10 ) 228#define PD10_AIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_OUT | 10 )
207#define PD11_PF_CONTRAST ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 11 ) 229#define PD11_PF_CONTRAST ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 11 )
208#define PD12_PF_ACD_OE ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 12 ) 230#define PD12_PF_ACD_OE ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 12 )
209#define PD13_PF_LP_HSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 13 ) 231#define PD13_PF_LP_HSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 13 )
@@ -225,7 +247,7 @@
225#define PD29_PF_LD14 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 29 ) 247#define PD29_PF_LD14 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 29 )
226#define PD30_PF_LD15 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 30 ) 248#define PD30_PF_LD15 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 30 )
227#define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 ) 249#define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 )
228#define PD31_BIN_SPI2_TXD ( GPIO_PORTD | GPIO_BIN | 31 ) 250#define PD31_BIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_BIN | 31 )
229 251
230/* 252/*
231 * PWM controller 253 * PWM controller
diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S
index 455da64832de..323b0bc4a39c 100644
--- a/include/asm-arm/arch-ixp4xx/entry-macro.S
+++ b/include/asm-arm/arch-ixp4xx/entry-macro.S
@@ -15,25 +15,26 @@
15 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) 15 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
16 ldr \irqstat, [\irqstat] @ get interrupts 16 ldr \irqstat, [\irqstat] @ get interrupts
17 cmp \irqstat, #0 17 cmp \irqstat, #0
18 beq 1001f 18 beq 1001f @ upper IRQ?
19 clz \irqnr, \irqstat 19 clz \irqnr, \irqstat
20 mov \base, #31 20 mov \base, #31
21 subs \irqnr, \base, \irqnr 21 sub \irqnr, \base, \irqnr
22 b 1002f @ lower IRQ being
23 @ handled
22 24
231001: 251001:
24 /* 26 /*
25 * IXP465 has an upper IRQ status register 27 * IXP465 has an upper IRQ status register
26 */ 28 */
27#if defined(CONFIG_CPU_IXP46X) 29#if defined(CONFIG_CPU_IXP46X)
28 bne 1002f
29 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET) 30 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET)
30 ldr \irqstat, [\irqstat] @ get upper interrupts 31 ldr \irqstat, [\irqstat] @ get upper interrupts
31 mov \irqnr, #63 32 mov \irqnr, #63
32 clz \irqstat, \irqstat 33 clz \irqstat, \irqstat
33 cmp \irqstat, #32 34 cmp \irqstat, #32
34 subne \irqnr, \irqnr, \irqstat 35 subne \irqnr, \irqnr, \irqstat
351002:
36#endif 36#endif
371002:
37 .endm 38 .endm
38 39
39 40
diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h
index 4ac964b9078a..55d85eea8c1a 100644
--- a/include/asm-arm/arch-ixp4xx/hardware.h
+++ b/include/asm-arm/arch-ixp4xx/hardware.h
@@ -27,7 +27,7 @@
27 27
28#define pcibios_assign_all_busses() 1 28#define pcibios_assign_all_busses() 1
29 29
30#if defined(CONFIG_CPU_IXP465) && !defined(__ASSEMBLY__) 30#if defined(CONFIG_CPU_IXP46X) && !defined(__ASSEMBLY__)
31extern unsigned int processor_id; 31extern unsigned int processor_id;
32#define cpu_is_ixp465() ((processor_id & 0xffffffc0) == 0x69054200) 32#define cpu_is_ixp465() ((processor_id & 0xffffffc0) == 0x69054200)
33#else 33#else
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
index d13ee7f78c70..f14ed63590c3 100644
--- a/include/asm-arm/arch-ixp4xx/platform.h
+++ b/include/asm-arm/arch-ixp4xx/platform.h
@@ -93,7 +93,7 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
93 93
94static inline void gpio_line_config(u8 line, u32 direction) 94static inline void gpio_line_config(u8 line, u32 direction)
95{ 95{
96 if (direction == IXP4XX_GPIO_OUT) 96 if (direction == IXP4XX_GPIO_IN)
97 *IXP4XX_GPIO_GPOER |= (1 << line); 97 *IXP4XX_GPIO_GPOER |= (1 << line);
98 else 98 else
99 *IXP4XX_GPIO_GPOER &= ~(1 << line); 99 *IXP4XX_GPIO_GPOER &= ~(1 << line);
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 939d9e5020a0..3af7165ab0d7 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -126,8 +126,8 @@
126#define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */ 126#define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */
127#define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */ 127#define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */
128#define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */ 128#define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */
129#define DRCMR15 __REG(0x4000013c) /* Reserved */ 129#define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for SSP2 receive Request */
130#define DRCMR16 __REG(0x40000140) /* Reserved */ 130#define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for SSP2 transmit Request */
131#define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */ 131#define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */
132#define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */ 132#define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */
133#define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */ 133#define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */
@@ -151,7 +151,8 @@
151#define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */ 151#define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */
152#define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */ 152#define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */
153#define DRCMR39 __REG(0x4000019C) /* Reserved */ 153#define DRCMR39 __REG(0x4000019C) /* Reserved */
154 154#define DRCMR66 __REG(0x40001108) /* Request to Channel Map Register for SSP3 receive Request */
155#define DRCMR67 __REG(0x4000110C) /* Request to Channel Map Register for SSP3 transmit Request */
155#define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */ 156#define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */
156#define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */ 157#define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */
157#define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */ 158#define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */
@@ -652,7 +653,7 @@
652 653
653#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ 654#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */
654#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ 655#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */
655#define UDCCS_IO_ROF (1 << 3) /* Receive overflow */ 656#define UDCCS_IO_ROF (1 << 2) /* Receive overflow */
656#define UDCCS_IO_DME (1 << 3) /* DMA enable */ 657#define UDCCS_IO_DME (1 << 3) /* DMA enable */
657#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ 658#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */
658#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ 659#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */
diff --git a/include/asm-arm/arch-pxa/pxafb.h b/include/asm-arm/arch-pxa/pxafb.h
index 21c0e16dce5f..aba9b30f4249 100644
--- a/include/asm-arm/arch-pxa/pxafb.h
+++ b/include/asm-arm/arch-pxa/pxafb.h
@@ -66,4 +66,5 @@ struct pxafb_mach_info {
66 66
67}; 67};
68void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info); 68void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info);
69void set_pxa_fb_parent(struct device *parent_dev);
69unsigned long pxafb_get_hsync_time(struct device *dev); 70unsigned long pxafb_get_hsync_time(struct device *dev);
diff --git a/include/asm-arm/arch-rpc/hardware.h b/include/asm-arm/arch-rpc/hardware.h
index be9754a05c19..9d7f87375aa7 100644
--- a/include/asm-arm/arch-rpc/hardware.h
+++ b/include/asm-arm/arch-rpc/hardware.h
@@ -15,7 +15,7 @@
15#include <asm/arch/memory.h> 15#include <asm/arch/memory.h>
16 16
17#ifndef __ASSEMBLY__ 17#ifndef __ASSEMBLY__
18#define IOMEM(x) ((void __iomem *)(x)) 18#define IOMEM(x) ((void __iomem *)(unsigned long)(x))
19#else 19#else
20#define IOMEM(x) x 20#define IOMEM(x) x
21#endif /* __ASSEMBLY__ */ 21#endif /* __ASSEMBLY__ */
@@ -52,7 +52,7 @@
52/* 52/*
53 * IO Addresses 53 * IO Addresses
54 */ 54 */
55#define VIDC_BASE (void __iomem *)0xe0400000 55#define VIDC_BASE IOMEM(0xe0400000)
56#define EXPMASK_BASE 0xe0360000 56#define EXPMASK_BASE 0xe0360000
57#define IOMD_BASE IOMEM(0xe0200000) 57#define IOMD_BASE IOMEM(0xe0200000)
58#define IOC_BASE IOMEM(0xe0200000) 58#define IOC_BASE IOMEM(0xe0200000)
diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h
index 97741d6e506a..d529ffda8599 100644
--- a/include/asm-arm/arch-s3c2410/anubis-map.h
+++ b/include/asm-arm/arch-s3c2410/anubis-map.h
@@ -20,22 +20,22 @@
20 20
21/* start peripherals off after the S3C2410 */ 21/* start peripherals off after the S3C2410 */
22 22
23#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x02000000)) 23#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000))
24 24
25#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26)) 25#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26))
26 26
27/* we put the CPLD registers next, to get them out of the way */ 27/* we put the CPLD registers next, to get them out of the way */
28 28
29#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01300000 */ 29#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */
30#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) 30#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD)
31 31
32#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01400000 */ 32#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */
33#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) 33#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD)
34 34
35#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01500000 */ 35#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */
36#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD) 36#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD)
37 37
38#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01600000 */ 38#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
39#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD) 39#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD)
40 40
41#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) 41#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h
index 48a39918a760..1c9de29cafef 100644
--- a/include/asm-arm/arch-s3c2410/hardware.h
+++ b/include/asm-arm/arch-s3c2410/hardware.h
@@ -92,6 +92,13 @@ extern unsigned int s3c2410_gpio_getpin(unsigned int pin);
92 92
93extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg); 93extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg);
94 94
95#ifdef CONFIG_CPU_S3C2440
96
97extern int s3c2440_set_dsc(unsigned int pin, unsigned int value);
98
99#endif /* CONFIG_CPU_S3C2440 */
100
101
95#endif /* __ASSEMBLY__ */ 102#endif /* __ASSEMBLY__ */
96 103
97#include <asm/sizes.h> 104#include <asm/sizes.h>
diff --git a/include/asm-arm/arch-s3c2410/io.h b/include/asm-arm/arch-s3c2410/io.h
index 418233a7ee6f..4bf272ed9add 100644
--- a/include/asm-arm/arch-s3c2410/io.h
+++ b/include/asm-arm/arch-s3c2410/io.h
@@ -9,7 +9,7 @@
9 * 06-Dec-1997 RMK Created. 9 * 06-Dec-1997 RMK Created.
10 * 02-Sep-2003 BJD Modified for S3C2410 10 * 02-Sep-2003 BJD Modified for S3C2410
11 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA 11 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
12 * 12 * 13-Oct-2005 BJD Fixed problems with LDRH/STRH offset range
13 */ 13 */
14 14
15#ifndef __ASM_ARM_ARCH_IO_H 15#ifndef __ASM_ARM_ARCH_IO_H
@@ -97,7 +97,7 @@ DECLARE_IO(int,l,"")
97 else \ 97 else \
98 __asm__ __volatile__( \ 98 __asm__ __volatile__( \
99 "strb %0, [%1, #0] @ outbc" \ 99 "strb %0, [%1, #0] @ outbc" \
100 : : "r" (value), "r" ((port))); \ 100 : : "r" (value), "r" ((port))); \
101}) 101})
102 102
103#define __inbc(port) \ 103#define __inbc(port) \
@@ -110,35 +110,61 @@ DECLARE_IO(int,l,"")
110 else \ 110 else \
111 __asm__ __volatile__( \ 111 __asm__ __volatile__( \
112 "ldrb %0, [%1, #0] @ inbc" \ 112 "ldrb %0, [%1, #0] @ inbc" \
113 : "=r" (result) : "r" ((port))); \ 113 : "=r" (result) : "r" ((port))); \
114 result; \ 114 result; \
115}) 115})
116 116
117#define __outwc(value,port) \ 117#define __outwc(value,port) \
118({ \ 118({ \
119 unsigned long v = value; \ 119 unsigned long v = value; \
120 if (__PORT_PCIO((port))) \ 120 if (__PORT_PCIO((port))) { \
121 __asm__ __volatile__( \ 121 if ((port) < 256 && (port) > -256) \
122 "strh %0, [%1, %2] @ outwc" \ 122 __asm__ __volatile__( \
123 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ 123 "strh %0, [%1, %2] @ outwc" \
124 else \ 124 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \
125 else if ((port) > 0) \
126 __asm__ __volatile__( \
127 "strh %0, [%1, %2] @ outwc" \
128 : : "r" (v), \
129 "r" (PCIO_BASE + ((port) & ~0xff)), \
130 "Jr" (((port) & 0xff))); \
131 else \
132 __asm__ __volatile__( \
133 "strh %0, [%1, #0] @ outwc" \
134 : : "r" (v), \
135 "r" (PCIO_BASE + (port))); \
136 } else \
125 __asm__ __volatile__( \ 137 __asm__ __volatile__( \
126 "strh %0, [%1, #0] @ outwc" \ 138 "strh %0, [%1, #0] @ outwc" \
127 : : "r" (v), "r" ((port))); \ 139 : : "r" (v), "r" ((port))); \
128}) 140})
129 141
130#define __inwc(port) \ 142#define __inwc(port) \
131({ \ 143({ \
132 unsigned short result; \ 144 unsigned short result; \
133 if (__PORT_PCIO((port))) \ 145 if (__PORT_PCIO((port))) { \
134 __asm__ __volatile__( \ 146 if ((port) < 256 && (port) > -256 ) \
135 "ldrh %0, [%1, %2] @ inwc" \ 147 __asm__ __volatile__( \
136 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \ 148 "ldrh %0, [%1, %2] @ inwc" \
137 else \ 149 : "=r" (result) \
150 : "r" (PCIO_BASE), \
151 "Jr" ((port))); \
152 else if ((port) > 0) \
153 __asm__ __volatile__( \
154 "ldrh %0, [%1, %2] @ inwc" \
155 : "=r" (result) \
156 : "r" (PCIO_BASE + ((port) & ~0xff)), \
157 "Jr" (((port) & 0xff))); \
158 else \
159 __asm__ __volatile__( \
160 "ldrh %0, [%1, #0] @ inwc" \
161 : "=r" (result) \
162 : "r" (PCIO_BASE + ((port)))); \
163 } else \
138 __asm__ __volatile__( \ 164 __asm__ __volatile__( \
139 "ldrh %0, [%1, #0] @ inwc" \ 165 "ldrh %0, [%1, #0] @ inwc" \
140 : "=r" (result) : "r" ((port))); \ 166 : "=r" (result) : "r" ((port))); \
141 result; \ 167 result; \
142}) 168})
143 169
144#define __outlc(value,port) \ 170#define __outlc(value,port) \
diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h
index 16f4c3cc1388..34360706e016 100644
--- a/include/asm-arm/arch-s3c2410/regs-clock.h
+++ b/include/asm-arm/arch-s3c2410/regs-clock.h
@@ -18,7 +18,9 @@
18 * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat) 18 * 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat)
19 * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA 19 * 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA
20 * 27-Aug-2005 Ben Dooks Add clock-slow info 20 * 27-Aug-2005 Ben Dooks Add clock-slow info
21 */ 21 * 20-Oct-2005 Ben Dooks Fixed overflow in PLL (Guillaume Gourat)
22 * 20-Oct-2005 Ben Dooks Add masks for DCLK (Guillaume Gourat)
23*/
22 24
23#ifndef __ASM_ARM_REGS_CLOCK 25#ifndef __ASM_ARM_REGS_CLOCK
24#define __ASM_ARM_REGS_CLOCK "$Id: clock.h,v 1.4 2003/04/30 14:50:51 ben Exp $" 26#define __ASM_ARM_REGS_CLOCK "$Id: clock.h,v 1.4 2003/04/30 14:50:51 ben Exp $"
@@ -66,11 +68,16 @@
66#define S3C2410_DCLKCON_DCLK0_UCLK (1<<1) 68#define S3C2410_DCLKCON_DCLK0_UCLK (1<<1)
67#define S3C2410_DCLKCON_DCLK0_DIV(x) (((x) - 1 )<<4) 69#define S3C2410_DCLKCON_DCLK0_DIV(x) (((x) - 1 )<<4)
68#define S3C2410_DCLKCON_DCLK0_CMP(x) (((x) - 1 )<<8) 70#define S3C2410_DCLKCON_DCLK0_CMP(x) (((x) - 1 )<<8)
71#define S3C2410_DCLKCON_DCLK0_DIV_MASK ((0xf)<<4)
72#define S3C2410_DCLKCON_DCLK0_CMP_MASK ((0xf)<<8)
69 73
70#define S3C2410_DCLKCON_DCLK1EN (1<<16) 74#define S3C2410_DCLKCON_DCLK1EN (1<<16)
71#define S3C2410_DCLKCON_DCLK1_PCLK (0<<17) 75#define S3C2410_DCLKCON_DCLK1_PCLK (0<<17)
72#define S3C2410_DCLKCON_DCLK1_UCLK (1<<17) 76#define S3C2410_DCLKCON_DCLK1_UCLK (1<<17)
73#define S3C2410_DCLKCON_DCLK1_DIV(x) (((x) - 1) <<20) 77#define S3C2410_DCLKCON_DCLK1_DIV(x) (((x) - 1) <<20)
78#define S3C2410_DCLKCON_DCLK1_CMP(x) (((x) - 1) <<24)
79#define S3C2410_DCLKCON_DCLK1_DIV_MASK ((0xf) <<20)
80#define S3C2410_DCLKCON_DCLK1_CMP_MASK ((0xf) <<24)
74 81
75#define S3C2410_CLKDIVN_PDIVN (1<<0) 82#define S3C2410_CLKDIVN_PDIVN (1<<0)
76#define S3C2410_CLKDIVN_HDIVN (1<<1) 83#define S3C2410_CLKDIVN_HDIVN (1<<1)
@@ -83,10 +90,13 @@
83 90
84#ifndef __ASSEMBLY__ 91#ifndef __ASSEMBLY__
85 92
93#include <asm/div64.h>
94
86static inline unsigned int 95static inline unsigned int
87s3c2410_get_pll(int pllval, int baseclk) 96s3c2410_get_pll(unsigned int pllval, unsigned int baseclk)
88{ 97{
89 int mdiv, pdiv, sdiv; 98 unsigned int mdiv, pdiv, sdiv;
99 uint64_t fvco;
90 100
91 mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT; 101 mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT;
92 pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT; 102 pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT;
@@ -96,7 +106,10 @@ s3c2410_get_pll(int pllval, int baseclk)
96 pdiv &= S3C2410_PLLCON_PDIVMASK; 106 pdiv &= S3C2410_PLLCON_PDIVMASK;
97 sdiv &= S3C2410_PLLCON_SDIVMASK; 107 sdiv &= S3C2410_PLLCON_SDIVMASK;
98 108
99 return (baseclk * (mdiv + 8)) / ((pdiv + 2) << sdiv); 109 fvco = (uint64_t)baseclk * (mdiv + 8);
110 do_div(fvco, (pdiv + 2) << sdiv);
111
112 return (unsigned int)fvco;
100} 113}
101 114
102#endif /* __ASSEMBLY__ */ 115#endif /* __ASSEMBLY__ */
diff --git a/include/asm-arm/arch-versatile/io.h b/include/asm-arm/arch-versatile/io.h
index 9f895bf61494..47e904cf25c7 100644
--- a/include/asm-arm/arch-versatile/io.h
+++ b/include/asm-arm/arch-versatile/io.h
@@ -22,7 +22,11 @@
22 22
23#define IO_SPACE_LIMIT 0xffffffff 23#define IO_SPACE_LIMIT 0xffffffff
24 24
25#define __io(a) ((void __iomem *)(a)) 25static inline void __iomem *__io(unsigned long addr)
26{
27 return (void __iomem *)addr;
28}
29#define __io(a) __io(a)
26#define __mem_pci(a) (a) 30#define __mem_pci(a) (a)
27#define __mem_isa(a) (a) 31#define __mem_isa(a) (a)
28 32
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h
index aad7aad026b3..e007dd990da5 100644
--- a/include/asm-arm/bitops.h
+++ b/include/asm-arm/bitops.h
@@ -347,7 +347,6 @@ static inline unsigned long __ffs(unsigned long word)
347 * the clz instruction for much better code efficiency. 347 * the clz instruction for much better code efficiency.
348 */ 348 */
349 349
350static __inline__ int generic_fls(int x);
351#define fls(x) \ 350#define fls(x) \
352 ( __builtin_constant_p(x) ? generic_fls(x) : \ 351 ( __builtin_constant_p(x) ? generic_fls(x) : \
353 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) ) 352 ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h
index d62ade4e4cbb..e3e8541ee63b 100644
--- a/include/asm-arm/dma-mapping.h
+++ b/include/asm-arm/dma-mapping.h
@@ -70,7 +70,7 @@ static inline int dma_mapping_error(dma_addr_t dma_addr)
70 * device-viewed address. 70 * device-viewed address.
71 */ 71 */
72extern void * 72extern void *
73dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, int gfp); 73dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
74 74
75/** 75/**
76 * dma_free_coherent - free memory allocated by dma_alloc_coherent 76 * dma_free_coherent - free memory allocated by dma_alloc_coherent
@@ -117,7 +117,7 @@ int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
117 * device-viewed address. 117 * device-viewed address.
118 */ 118 */
119extern void * 119extern void *
120dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, int gfp); 120dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
121 121
122#define dma_free_writecombine(dev,size,cpu_addr,handle) \ 122#define dma_free_writecombine(dev,size,cpu_addr,handle) \
123 dma_free_coherent(dev,size,cpu_addr,handle) 123 dma_free_coherent(dev,size,cpu_addr,handle)
diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h
index a1696ba238d3..7da97a937548 100644
--- a/include/asm-arm/elf.h
+++ b/include/asm-arm/elf.h
@@ -124,6 +124,8 @@ do { \
124 if (((ex).e_flags & EF_ARM_EABI_MASK) || \ 124 if (((ex).e_flags & EF_ARM_EABI_MASK) || \
125 ((ex).e_flags & EF_ARM_SOFT_FLOAT)) \ 125 ((ex).e_flags & EF_ARM_SOFT_FLOAT)) \
126 set_thread_flag(TIF_USING_IWMMXT); \ 126 set_thread_flag(TIF_USING_IWMMXT); \
127 else \
128 clear_thread_flag(TIF_USING_IWMMXT); \
127} while (0) 129} while (0)
128 130
129#endif 131#endif
diff --git a/include/asm-arm/hardware/scoop.h b/include/asm-arm/hardware/scoop.h
index 527404b5a8df..a8f1013930e3 100644
--- a/include/asm-arm/hardware/scoop.h
+++ b/include/asm-arm/hardware/scoop.h
@@ -38,6 +38,8 @@
38struct scoop_config { 38struct scoop_config {
39 unsigned short io_out; 39 unsigned short io_out;
40 unsigned short io_dir; 40 unsigned short io_dir;
41 unsigned short suspend_clr;
42 unsigned short suspend_set;
41}; 43};
42 44
43/* Structure for linking scoop devices to PCMCIA sockets */ 45/* Structure for linking scoop devices to PCMCIA sockets */
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index cfa71a0dffb6..5c4ae8f5dbb0 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -136,9 +136,9 @@ extern void __readwrite_bug(const char *fn);
136/* 136/*
137 * String version of IO memory access ops: 137 * String version of IO memory access ops:
138 */ 138 */
139extern void _memcpy_fromio(void *, void __iomem *, size_t); 139extern void _memcpy_fromio(void *, const volatile void __iomem *, size_t);
140extern void _memcpy_toio(void __iomem *, const void *, size_t); 140extern void _memcpy_toio(volatile void __iomem *, const void *, size_t);
141extern void _memset_io(void __iomem *, int, size_t); 141extern void _memset_io(volatile void __iomem *, int, size_t);
142 142
143#define mmiowb() 143#define mmiowb()
144 144
diff --git a/include/asm-arm/locks.h b/include/asm-arm/locks.h
index f08dc8447913..852220eecdbc 100644
--- a/include/asm-arm/locks.h
+++ b/include/asm-arm/locks.h
@@ -103,7 +103,7 @@
103 ({ \ 103 ({ \
104 smp_mb(); \ 104 smp_mb(); \
105 __asm__ __volatile__( \ 105 __asm__ __volatile__( \
106 "@ up_op_read\n" \ 106 "@ up_op_write\n" \
107"1: ldrex lr, [%0]\n" \ 107"1: ldrex lr, [%0]\n" \
108" adds lr, lr, %1\n" \ 108" adds lr, lr, %1\n" \
109" strex ip, lr, [%0]\n" \ 109" strex ip, lr, [%0]\n" \
@@ -231,7 +231,7 @@
231#define __up_op_write(ptr,wake) \ 231#define __up_op_write(ptr,wake) \
232 ({ \ 232 ({ \
233 __asm__ __volatile__( \ 233 __asm__ __volatile__( \
234 "@ up_op_read\n" \ 234 "@ up_op_write\n" \
235" mrs ip, cpsr\n" \ 235" mrs ip, cpsr\n" \
236" orr lr, ip, #128\n" \ 236" orr lr, ip, #128\n" \
237" msr cpsr_c, lr\n" \ 237" msr cpsr_c, lr\n" \
diff --git a/include/asm-arm/signal.h b/include/asm-arm/signal.h
index 760f6e65af05..ced69161917b 100644
--- a/include/asm-arm/signal.h
+++ b/include/asm-arm/signal.h
@@ -115,7 +115,6 @@ typedef unsigned long sigset_t;
115 115
116#ifdef __KERNEL__ 116#ifdef __KERNEL__
117#define SA_TIMER 0x40000000 117#define SA_TIMER 0x40000000
118#define SA_IRQNOMASK 0x08000000
119#endif 118#endif
120 119
121#include <asm-generic/signal.h> 120#include <asm-generic/signal.h>
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-29 01:21:00 -0500