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-rw-r--r--include/asm-arm/arch-at91/io.h2
-rw-r--r--include/asm-arm/arch-omap/board-palmte.h2
-rw-r--r--include/asm-arm/arch-omap/clock.h5
-rw-r--r--include/asm-arm/arch-omap/common.h4
-rw-r--r--include/asm-arm/arch-omap/control.h2
-rw-r--r--include/asm-arm/arch-omap/entry-macro.S1
-rw-r--r--include/asm-arm/arch-omap/gpio.h1
-rw-r--r--include/asm-arm/arch-omap/hardware.h1
-rw-r--r--include/asm-arm/arch-omap/mmc.h24
-rw-r--r--include/asm-arm/arch-pxa/mfp-pxa27x.h1
-rw-r--r--include/asm-arm/arch-pxa/pxa2xx-gpio.h9
-rw-r--r--include/asm-arm/arch-pxa/regs-lcd.h5
-rw-r--r--include/asm-arm/arch-sa1100/collie.h4
-rw-r--r--include/asm-arm/arch-sa1100/irqs.h2
-rw-r--r--include/asm-arm/hardware/locomo.h19
-rw-r--r--include/asm-arm/page.h4
-rw-r--r--include/asm-arm/pgtable-nommu.h1
-rw-r--r--include/asm-arm/spinlock.h2
-rw-r--r--include/asm-arm/system.h29
19 files changed, 74 insertions, 44 deletions
diff --git a/include/asm-arm/arch-at91/io.h b/include/asm-arm/arch-at91/io.h
index 80073fd36b8e..f8beaa228467 100644
--- a/include/asm-arm/arch-at91/io.h
+++ b/include/asm-arm/arch-at91/io.h
@@ -21,8 +21,6 @@
21#ifndef __ASM_ARCH_IO_H 21#ifndef __ASM_ARCH_IO_H
22#define __ASM_ARCH_IO_H 22#define __ASM_ARCH_IO_H
23 23
24#include <asm/io.h>
25
26#define IO_SPACE_LIMIT 0xFFFFFFFF 24#define IO_SPACE_LIMIT 0xFFFFFFFF
27 25
28#define __io(a) ((void __iomem *)(a)) 26#define __io(a) ((void __iomem *)(a))
diff --git a/include/asm-arm/arch-omap/board-palmte.h b/include/asm-arm/arch-omap/board-palmte.h
index cd22035a7160..6fac2c8935be 100644
--- a/include/asm-arm/arch-omap/board-palmte.h
+++ b/include/asm-arm/arch-omap/board-palmte.h
@@ -14,8 +14,6 @@
14#ifndef __OMAP_BOARD_PALMTE_H 14#ifndef __OMAP_BOARD_PALMTE_H
15#define __OMAP_BOARD_PALMTE_H 15#define __OMAP_BOARD_PALMTE_H
16 16
17#include <asm/arch/gpio.h>
18
19#define PALMTE_USBDETECT_GPIO 0 17#define PALMTE_USBDETECT_GPIO 0
20#define PALMTE_USB_OR_DC_GPIO 1 18#define PALMTE_USB_OR_DC_GPIO 1
21#define PALMTE_TSC_GPIO 4 19#define PALMTE_TSC_GPIO 4
diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h
index 57523bdb642b..12a5e4de9518 100644
--- a/include/asm-arm/arch-omap/clock.h
+++ b/include/asm-arm/arch-omap/clock.h
@@ -73,6 +73,8 @@ struct clk {
73#endif 73#endif
74}; 74};
75 75
76struct cpufreq_frequency_table;
77
76struct clk_functions { 78struct clk_functions {
77 int (*clk_enable)(struct clk *clk); 79 int (*clk_enable)(struct clk *clk);
78 void (*clk_disable)(struct clk *clk); 80 void (*clk_disable)(struct clk *clk);
@@ -83,6 +85,9 @@ struct clk_functions {
83 void (*clk_allow_idle)(struct clk *clk); 85 void (*clk_allow_idle)(struct clk *clk);
84 void (*clk_deny_idle)(struct clk *clk); 86 void (*clk_deny_idle)(struct clk *clk);
85 void (*clk_disable_unused)(struct clk *clk); 87 void (*clk_disable_unused)(struct clk *clk);
88#ifdef CONFIG_CPU_FREQ
89 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
90#endif
86}; 91};
87 92
88extern unsigned int mpurate; 93extern unsigned int mpurate;
diff --git a/include/asm-arm/arch-omap/common.h b/include/asm-arm/arch-omap/common.h
index 224e009e5296..36a3b62d4d8d 100644
--- a/include/asm-arm/arch-omap/common.h
+++ b/include/asm-arm/arch-omap/common.h
@@ -47,4 +47,8 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
47} 47}
48#endif 48#endif
49 49
50void omap2_set_globals_242x(void);
51void omap2_set_globals_243x(void);
52void omap2_set_globals_343x(void);
53
50#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ 54#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
diff --git a/include/asm-arm/arch-omap/control.h b/include/asm-arm/arch-omap/control.h
index 9944bb5d5330..59c0686f8be7 100644
--- a/include/asm-arm/arch-omap/control.h
+++ b/include/asm-arm/arch-omap/control.h
@@ -80,7 +80,7 @@
80#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064) 80#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064)
81#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c) 81#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c)
82#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070) 82#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070)
83#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074 83#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074)
84#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) 84#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080)
85#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) 85#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084)
86#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088) 86#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088)
diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S
index 74cd57221c8e..369093a45fcf 100644
--- a/include/asm-arm/arch-omap/entry-macro.S
+++ b/include/asm-arm/arch-omap/entry-macro.S
@@ -8,6 +8,7 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10#include <asm/hardware.h> 10#include <asm/hardware.h>
11#include <asm/arch/io.h>
11#include <asm/arch/irqs.h> 12#include <asm/arch/irqs.h>
12 13
13#if defined(CONFIG_ARCH_OMAP1) 14#if defined(CONFIG_ARCH_OMAP1)
diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h
index 86621a04cd8f..5ee6a49864c3 100644
--- a/include/asm-arm/arch-omap/gpio.h
+++ b/include/asm-arm/arch-omap/gpio.h
@@ -26,7 +26,6 @@
26#ifndef __ASM_ARCH_OMAP_GPIO_H 26#ifndef __ASM_ARCH_OMAP_GPIO_H
27#define __ASM_ARCH_OMAP_GPIO_H 27#define __ASM_ARCH_OMAP_GPIO_H
28 28
29#include <asm/hardware.h>
30#include <asm/arch/irqs.h> 29#include <asm/arch/irqs.h>
31#include <asm/io.h> 30#include <asm/io.h>
32 31
diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h
index da572092e255..91d85b3417b7 100644
--- a/include/asm-arm/arch-omap/hardware.h
+++ b/include/asm-arm/arch-omap/hardware.h
@@ -41,7 +41,6 @@
41#include <asm/types.h> 41#include <asm/types.h>
42#include <asm/arch/cpu.h> 42#include <asm/arch/cpu.h>
43#endif 43#endif
44#include <asm/arch/io.h>
45#include <asm/arch/serial.h> 44#include <asm/arch/serial.h>
46 45
47/* 46/*
diff --git a/include/asm-arm/arch-omap/mmc.h b/include/asm-arm/arch-omap/mmc.h
index c9588f49eb52..7cfc5f258560 100644
--- a/include/asm-arm/arch-omap/mmc.h
+++ b/include/asm-arm/arch-omap/mmc.h
@@ -15,21 +15,16 @@
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/mmc/host.h> 16#include <linux/mmc/host.h>
17 17
18#include <asm/arch/board.h>
19
18#define OMAP_MMC_MAX_SLOTS 2 20#define OMAP_MMC_MAX_SLOTS 2
19 21
20struct omap_mmc_platform_data { 22struct omap_mmc_platform_data {
21 struct omap_mmc_conf conf; 23 struct omap_mmc_conf conf;
22 24
23 unsigned enabled:1;
24 /* number of slots on board */ 25 /* number of slots on board */
25 unsigned nr_slots:2; 26 unsigned nr_slots:2;
26 /* nomux means "standard" muxing is wrong on this board, and that 27
27 * board-specific code handled it before common init logic.
28 */
29 unsigned nomux:1;
30 /* 4 wire signaling is optional, and is only used for SD/SDIO and
31 * MMCv4 */
32 unsigned wire4:1;
33 /* set if your board has components or wiring that limits the 28 /* set if your board has components or wiring that limits the
34 * maximum frequency on the MMC bus */ 29 * maximum frequency on the MMC bus */
35 unsigned int max_freq; 30 unsigned int max_freq;
@@ -40,6 +35,11 @@ struct omap_mmc_platform_data {
40 * not supported */ 35 * not supported */
41 int (* init)(struct device *dev); 36 int (* init)(struct device *dev);
42 void (* cleanup)(struct device *dev); 37 void (* cleanup)(struct device *dev);
38 void (* shutdown)(struct device *dev);
39
40 /* To handle board related suspend/resume functionality for MMC */
41 int (*suspend)(struct device *dev, int slot);
42 int (*resume)(struct device *dev, int slot);
43 43
44 struct omap_mmc_slot_data { 44 struct omap_mmc_slot_data {
45 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); 45 int (* set_bus_mode)(struct device *dev, int slot, int bus_mode);
@@ -56,13 +56,19 @@ struct omap_mmc_platform_data {
56 56
57 const char *name; 57 const char *name;
58 u32 ocr_mask; 58 u32 ocr_mask;
59
60 /* Card detection IRQs */
61 int card_detect_irq;
62 int (* card_detect)(int irq);
63
64 unsigned int ban_openended:1;
65
59 } slots[OMAP_MMC_MAX_SLOTS]; 66 } slots[OMAP_MMC_MAX_SLOTS];
60}; 67};
61 68
62extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); 69extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info);
63 70
64/* called from board-specific card detection service routine */ 71/* called from board-specific card detection service routine */
65extern void omap_mmc_notify_card_detect(struct device *dev, int slot, int detected);
66extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); 72extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed);
67 73
68#endif 74#endif
diff --git a/include/asm-arm/arch-pxa/mfp-pxa27x.h b/include/asm-arm/arch-pxa/mfp-pxa27x.h
index eb6eaa174f8d..bc73ab84167c 100644
--- a/include/asm-arm/arch-pxa/mfp-pxa27x.h
+++ b/include/asm-arm/arch-pxa/mfp-pxa27x.h
@@ -112,6 +112,7 @@
112#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1) 112#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1)
113#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1) 113#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1)
114#define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH) 114#define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH)
115#define GPIO104_PSKTSEL MFP_CFG_OUT(GPIO104, AF1, DRIVE_HIGH)
115 116
116/* I2C */ 117/* I2C */
117#define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1) 118#define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1)
diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
index 763313c5e6be..b81cd63cb2eb 100644
--- a/include/asm-arm/arch-pxa/pxa2xx-gpio.h
+++ b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
@@ -134,7 +134,11 @@
134#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */ 134#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */
135#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */ 135#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */
136#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */ 136#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */
137#define GPIO96_FFRXD 96 /* FFUART recieve */
138#define GPIO98_FFRTS 98 /* FFUART request to send */
137#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */ 139#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */
140#define GPIO99_FFTXD 99 /* FFUART transmit data */
141#define GPIO100_FFCTS 100 /* FFUART Clear to send */
138#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */ 142#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
139#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */ 143#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */
140#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */ 144#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */
@@ -316,6 +320,8 @@
316#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) 320#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
317#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN) 321#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN)
318#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT) 322#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT)
323#define GPIO88_USBH1_PWR_MD (88 | GPIO_ALT_FN_1_IN)
324#define GPIO89_USBH1_PEN_MD (89 | GPIO_ALT_FN_2_OUT)
319#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN) 325#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN)
320#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN) 326#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN)
321#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) 327#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
@@ -324,8 +330,11 @@
324#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN) 330#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN)
325#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN) 331#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN)
326#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN) 332#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN)
333#define GPIO96_FFRXD_MD (96 | GPIO_ALT_FN_3_IN)
327#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN) 334#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN)
328#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN) 335#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN)
336#define GPIO98_FFRTS_MD (98 | GPIO_ALT_FN_3_OUT)
337#define GPIO99_FFTXD_MD (99 | GPIO_ALT_FN_3_OUT)
329#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN) 338#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN)
330#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN) 339#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN)
331#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) 340#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h
index f762493f5141..3ba464c913a5 100644
--- a/include/asm-arm/arch-pxa/regs-lcd.h
+++ b/include/asm-arm/arch-pxa/regs-lcd.h
@@ -1,5 +1,8 @@
1#ifndef __ASM_ARCH_REGS_LCD_H 1#ifndef __ASM_ARCH_REGS_LCD_H
2#define __ASM_ARCH_REGS_LCD_H 2#define __ASM_ARCH_REGS_LCD_H
3
4#include <asm/arch/bitfield.h>
5
3/* 6/*
4 * LCD Controller Registers and Bits Definitions 7 * LCD Controller Registers and Bits Definitions
5 */ 8 */
@@ -69,7 +72,7 @@
69#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ 72#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */
70#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ 73#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */
71#define LCCR0_PDD_S 12 74#define LCCR0_PDD_S 12
72#define LCCR0_BM (1 << 20) /* Branch mask */ 75#define LCCR0_BM (1 << 20) /* Branch mask */
73#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ 76#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */
74#define LCCR0_LCDT (1 << 22) /* LCD panel type */ 77#define LCCR0_LCDT (1 << 22) /* LCD panel type */
75#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ 78#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */
diff --git a/include/asm-arm/arch-sa1100/collie.h b/include/asm-arm/arch-sa1100/collie.h
index 14a344aa3cc7..762eba535813 100644
--- a/include/asm-arm/arch-sa1100/collie.h
+++ b/include/asm-arm/arch-sa1100/collie.h
@@ -34,9 +34,12 @@
34 34
35#define COLLIE_GPIO_ON_KEY GPIO_GPIO (0) 35#define COLLIE_GPIO_ON_KEY GPIO_GPIO (0)
36#define COLLIE_GPIO_AC_IN GPIO_GPIO (1) 36#define COLLIE_GPIO_AC_IN GPIO_GPIO (1)
37#define COLLIE_GPIO_SDIO_INT GPIO_GPIO (11)
37#define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14) 38#define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14)
38#define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15) 39#define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15)
39#define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16) 40#define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16)
41#define COLLIE_GPIO_nMIC_ON GPIO_GPIO (17)
42#define COLLIE_GPIO_nREMOCON_ON GPIO_GPIO (18)
40#define COLLIE_GPIO_CO GPIO_GPIO (20) 43#define COLLIE_GPIO_CO GPIO_GPIO (20)
41#define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21) 44#define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21)
42#define COLLIE_GPIO_CF_CD GPIO_GPIO (22) 45#define COLLIE_GPIO_CF_CD GPIO_GPIO (22)
@@ -49,6 +52,7 @@
49 52
50#define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0 53#define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0
51#define COLLIE_IRQ_GPIO_AC_IN IRQ_GPIO1 54#define COLLIE_IRQ_GPIO_AC_IN IRQ_GPIO1
55#define COLLIE_IRQ_GPIO_SDIO_IRQ IRQ_GPIO11
52#define COLLIE_IRQ_GPIO_CF_IRQ IRQ_GPIO14 56#define COLLIE_IRQ_GPIO_CF_IRQ IRQ_GPIO14
53#define COLLIE_IRQ_GPIO_nREMOCON_INT IRQ_GPIO15 57#define COLLIE_IRQ_GPIO_nREMOCON_INT IRQ_GPIO15
54#define COLLIE_IRQ_GPIO_CO IRQ_GPIO20 58#define COLLIE_IRQ_GPIO_CO IRQ_GPIO20
diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h
index d7940683efb1..7bf80484bb77 100644
--- a/include/asm-arm/arch-sa1100/irqs.h
+++ b/include/asm-arm/arch-sa1100/irqs.h
@@ -141,7 +141,7 @@
141#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17) 141#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17)
142#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18) 142#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18)
143#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19) 143#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19)
144#define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20) 144#define IRQ_LOCOMO_SPI_REND (IRQ_BOARD_END + 20)
145#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21) 145#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21)
146 146
147/* 147/*
diff --git a/include/asm-arm/hardware/locomo.h b/include/asm-arm/hardware/locomo.h
index adab77780ed3..fb0645de6f31 100644
--- a/include/asm-arm/hardware/locomo.h
+++ b/include/asm-arm/hardware/locomo.h
@@ -58,6 +58,11 @@
58#define LOCOMO_SPIMD 0x00 /* SPI mode setting */ 58#define LOCOMO_SPIMD 0x00 /* SPI mode setting */
59#define LOCOMO_SPICT 0x04 /* SPI mode control */ 59#define LOCOMO_SPICT 0x04 /* SPI mode control */
60#define LOCOMO_SPIST 0x08 /* SPI status */ 60#define LOCOMO_SPIST 0x08 /* SPI status */
61#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */
62#define LOCOMO_SPI_REND (1 << 2) /* Receive end bit */
63#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */
64#define LOCOMO_SPI_RFR (1) /* read buffer bit */
65
61#define LOCOMO_SPIIS 0x10 /* SPI interrupt status */ 66#define LOCOMO_SPIIS 0x10 /* SPI interrupt status */
62#define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */ 67#define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */
63#define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */ 68#define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */
@@ -66,16 +71,12 @@
66#define LOCOMO_SPIRD 0x24 /* SPI receive data read */ 71#define LOCOMO_SPIRD 0x24 /* SPI receive data read */
67#define LOCOMO_SPITS 0x28 /* SPI transfer data shift */ 72#define LOCOMO_SPITS 0x28 /* SPI transfer data shift */
68#define LOCOMO_SPIRS 0x2C /* SPI receive data shift */ 73#define LOCOMO_SPIRS 0x2C /* SPI receive data shift */
69#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */
70#define LOCOMO_SPI_OVRN (1 << 2) /* Over Run bit */
71#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */
72#define LOCOMO_SPI_RFR (1) /* read buffer bit */
73 74
74/* GPIO */ 75/* GPIO */
75#define LOCOMO_GPD 0x90 /* GPIO direction */ 76#define LOCOMO_GPD 0x90 /* GPIO direction */
76#define LOCOMO_GPE 0x94 /* GPIO input enable */ 77#define LOCOMO_GPE 0x94 /* GPIO input enable */
77#define LOCOMO_GPL 0x98 /* GPIO level */ 78#define LOCOMO_GPL 0x98 /* GPIO level */
78#define LOCOMO_GPO 0x9c /* GPIO out data setteing */ 79#define LOCOMO_GPO 0x9c /* GPIO out data setting */
79#define LOCOMO_GRIE 0xa0 /* GPIO rise detection */ 80#define LOCOMO_GRIE 0xa0 /* GPIO rise detection */
80#define LOCOMO_GFIE 0xa4 /* GPIO fall detection */ 81#define LOCOMO_GFIE 0xa4 /* GPIO fall detection */
81#define LOCOMO_GIS 0xa8 /* GPIO edge detection status */ 82#define LOCOMO_GIS 0xa8 /* GPIO edge detection status */
@@ -96,6 +97,9 @@
96#define LOCOMO_GPIO_DAC_SDATA LOCOMO_GPIO(10) 97#define LOCOMO_GPIO_DAC_SDATA LOCOMO_GPIO(10)
97#define LOCOMO_GPIO_DAC_SCK LOCOMO_GPIO(11) 98#define LOCOMO_GPIO_DAC_SCK LOCOMO_GPIO(11)
98#define LOCOMO_GPIO_DAC_SLOAD LOCOMO_GPIO(12) 99#define LOCOMO_GPIO_DAC_SLOAD LOCOMO_GPIO(12)
100#define LOCOMO_GPIO_CARD_DETECT LOCOMO_GPIO(13)
101#define LOCOMO_GPIO_WRITE_PROT LOCOMO_GPIO(14)
102#define LOCOMO_GPIO_CARD_POWER LOCOMO_GPIO(15)
99 103
100/* Start the definitions of the devices. Each device has an initial 104/* Start the definitions of the devices. Each device has an initial
101 * base address and a series of offsets from that base address. */ 105 * base address and a series of offsets from that base address. */
@@ -122,7 +126,7 @@
122/* Audio controller */ 126/* Audio controller */
123#define LOCOMO_AUDIO 0x54 127#define LOCOMO_AUDIO 0x54
124#define LOCOMO_ACC 0x00 /* Audio clock */ 128#define LOCOMO_ACC 0x00 /* Audio clock */
125#define LOCOMO_PAIF 0x7C /* PCM audio interface */ 129#define LOCOMO_PAIF 0xD0 /* PCM audio interface */
126/* Audio clock */ 130/* Audio clock */
127#define LOCOMO_ACC_XON 0x80 131#define LOCOMO_ACC_XON 0x80
128#define LOCOMO_ACC_XEN 0x40 132#define LOCOMO_ACC_XEN 0x40
@@ -162,7 +166,7 @@ extern struct bus_type locomo_bus_type;
162#define LOCOMO_DEVID_AUDIO 3 166#define LOCOMO_DEVID_AUDIO 3
163#define LOCOMO_DEVID_LED 4 167#define LOCOMO_DEVID_LED 4
164#define LOCOMO_DEVID_UART 5 168#define LOCOMO_DEVID_UART 5
165#define LOCOMO_DEVID_SPI 6 169#define LOCOMO_DEVID_SPI 6
166 170
167struct locomo_dev { 171struct locomo_dev {
168 struct device dev; 172 struct device dev;
@@ -204,7 +208,6 @@ int locomo_gpio_read_level(struct device *dev, unsigned int bits);
204int locomo_gpio_read_output(struct device *dev, unsigned int bits); 208int locomo_gpio_read_output(struct device *dev, unsigned int bits);
205void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set); 209void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set);
206 210
207
208/* M62332 control function */ 211/* M62332 control function */
209void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel); 212void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel);
210 213
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 5c22b0112106..8e05bdb5f12f 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -179,10 +179,10 @@ typedef unsigned long pgprot_t;
179 179
180#endif /* STRICT_MM_TYPECHECKS */ 180#endif /* STRICT_MM_TYPECHECKS */
181 181
182typedef struct page *pgtable_t;
183
184#endif /* CONFIG_MMU */ 182#endif /* CONFIG_MMU */
185 183
184typedef struct page *pgtable_t;
185
186#include <asm/memory.h> 186#include <asm/memory.h>
187 187
188#endif /* !__ASSEMBLY__ */ 188#endif /* !__ASSEMBLY__ */
diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h
index 2e5868bbe03b..386fcc10a973 100644
--- a/include/asm-arm/pgtable-nommu.h
+++ b/include/asm-arm/pgtable-nommu.h
@@ -16,7 +16,6 @@
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include <asm/processor.h> 17#include <asm/processor.h>
18#include <asm/page.h> 18#include <asm/page.h>
19#include <asm/io.h>
20 19
21/* 20/*
22 * Trivial page table functions. 21 * Trivial page table functions.
diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h
index 800ba5254daf..2b41ebbfa7ff 100644
--- a/include/asm-arm/spinlock.h
+++ b/include/asm-arm/spinlock.h
@@ -142,7 +142,7 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw)
142} 142}
143 143
144/* write_can_lock - would write_trylock() succeed? */ 144/* write_can_lock - would write_trylock() succeed? */
145#define __raw_write_can_lock(x) ((x)->lock == 0x80000000) 145#define __raw_write_can_lock(x) ((x)->lock == 0)
146 146
147/* 147/*
148 * Read locks are a bit more hairy: 148 * Read locks are a bit more hairy:
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 6335de9a2bb3..514af792a598 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -48,20 +48,6 @@
48#define CPUID_TCM 2 48#define CPUID_TCM 2
49#define CPUID_TLBTYPE 3 49#define CPUID_TLBTYPE 3
50 50
51#ifdef CONFIG_CPU_CP15
52#define read_cpuid(reg) \
53 ({ \
54 unsigned int __val; \
55 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
56 : "=r" (__val) \
57 : \
58 : "cc"); \
59 __val; \
60 })
61#else
62#define read_cpuid(reg) (processor_id)
63#endif
64
65/* 51/*
66 * This is used to ensure the compiler did actually allocate the register we 52 * This is used to ensure the compiler did actually allocate the register we
67 * asked it for some inline assembly sequences. Apparently we can't trust 53 * asked it for some inline assembly sequences. Apparently we can't trust
@@ -78,6 +64,21 @@
78#include <linux/stringify.h> 64#include <linux/stringify.h>
79#include <linux/irqflags.h> 65#include <linux/irqflags.h>
80 66
67#ifdef CONFIG_CPU_CP15
68#define read_cpuid(reg) \
69 ({ \
70 unsigned int __val; \
71 asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \
72 : "=r" (__val) \
73 : \
74 : "cc"); \
75 __val; \
76 })
77#else
78extern unsigned int processor_id;
79#define read_cpuid(reg) (processor_id)
80#endif
81
81/* 82/*
82 * The CPU ID never changes at run time, so we might as well tell the 83 * The CPU ID never changes at run time, so we might as well tell the
83 * compiler that it's constant. Use this function to read the CPU ID 84 * compiler that it's constant. Use this function to read the CPU ID
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-04 05:34:52 -0400