107 files changed, 7919 insertions, 0 deletions

diff --git a/include/asm-arm26/a.out.h b/include/asm-arm26/a.out.h
new file mode 100644
index 000000000000..9b2702c42c87
--- /dev/null
+++ b/include/asm-arm26/a.out.h
@@ -0,0 +1,38 @@
+#ifndef __ARM_A_OUT_H__
+#define __ARM_A_OUT_H__
+
+#include <linux/personality.h>
+#include <asm/types.h>
+
+struct exec
+{
+  __u32 a_info;         /* Use macros N_MAGIC, etc for access */
+  __u32 a_text;         /* length of text, in bytes */
+  __u32 a_data;         /* length of data, in bytes */
+  __u32 a_bss;          /* length of uninitialized data area for file, in bytes */
+  __u32 a_syms;         /* length of symbol table data in file, in bytes */
+  __u32 a_entry;        /* start address */
+  __u32 a_trsize;       /* length of relocation info for text, in bytes */
+  __u32 a_drsize;       /* length of relocation info for data, in bytes */
+};
+
+/*
+ * This is always the same
+ */
+#define N_TXTADDR(a)    (0x00008000)
+
+#define N_TRSIZE(a)     ((a).a_trsize)
+#define N_DRSIZE(a)     ((a).a_drsize)
+#define N_SYMSIZE(a)    ((a).a_syms)
+
+#define M_ARM 103
+
+#ifdef __KERNEL__
+#define STACK_TOP       TASK_SIZE
+#endif
+
+#ifndef LIBRARY_START_TEXT
+#define LIBRARY_START_TEXT      (0x00c00000)
+#endif
+
+#endif /* __A_OUT_GNU_H__ */
diff --git a/include/asm-arm26/assembler.h b/include/asm-arm26/assembler.h
new file mode 100644
index 000000000000..83f9aec55e4f
--- /dev/null
+++ b/include/asm-arm26/assembler.h
@@ -0,0 +1,106 @@
+/*
+ * linux/asm/assembler.h
+ *
+ * This file contains arm architecture specific defines
+ * for the different processors.
+ *
+ * Do not include any C declarations in this file - it is included by
+ * assembler source.
+ */
+#ifndef __ASSEMBLY__
+#error "Only include this from assembly code"
+#endif
+
+/*
+ * Endian independent macros for shifting bytes within registers.
+ */
+#define pull            lsr
+#define push            lsl
+#define byte(x)         (x*8)
+
+#ifdef __STDC__
+#define LOADREGS(cond, base, reglist...)\
+        ldm##cond       base,reglist^
+
+#define RETINSTR(instr, regs...)\
+        instr##s        regs
+#else
+#define LOADREGS(cond, base, reglist...)\
+        ldm/**/cond     base,reglist^
+
+#define RETINSTR(instr, regs...)\
+        instr/**/s      regs
+#endif
+
+#define MODENOP\
+        mov     r0, r0
+
+#define MODE(savereg,tmpreg,mode) \
+        mov     savereg, pc; \
+        bic     tmpreg, savereg, $0x0c000003; \
+        orr     tmpreg, tmpreg, $mode; \
+        teqp    tmpreg, $0
+
+#define RESTOREMODE(savereg) \
+        teqp    savereg, $0
+
+#define SAVEIRQS(tmpreg)
+
+#define RESTOREIRQS(tmpreg)
+
+#define DISABLEIRQS(tmpreg)\
+        teqp    pc, $0x08000003
+
+#define ENABLEIRQS(tmpreg)\
+        teqp    pc, $0x00000003
+
+#define USERMODE(tmpreg)\
+        teqp    pc, $0x00000000;\
+        mov     r0, r0
+
+#define SVCMODE(tmpreg)\
+        teqp    pc, $0x00000003;\
+        mov     r0, r0
+
+
+/*
+ * Save the current IRQ state and disable IRQs
+ * Note that this macro assumes FIQs are enabled, and
+ * that the processor is in SVC mode.
+ */
+        .macro  save_and_disable_irqs, oldcpsr, temp
+  mov \oldcpsr, pc
+  orr \temp, \oldcpsr, #0x08000000
+  teqp \temp, #0
+  .endm
+
+/*
+ * Restore interrupt state previously stored in
+ * a register
+ * ** Actually do nothing on Arc - hope that the caller uses a MOVS PC soon
+ * after!
+ */
+        .macro  restore_irqs, oldcpsr
+  @ This be restore_irqs
+  .endm
+
+/*
+ * These two are used to save LR/restore PC over a user-based access.
+ * The old 26-bit architecture requires that we save lr (R14)
+ */
+        .macro  save_lr
+        str     lr, [sp, #-4]!
+        .endm
+
+        .macro  restore_pc
+        ldmfd   sp!, {pc}^
+        .endm
+
+#define USER(x...)                              \
+9999:   x;                                      \
+        .section __ex_table,"a";                \
+        .align  3;                              \
+        .long   9999b,9001f;                    \
+        .previous
+
+
diff --git a/include/asm-arm26/atomic.h b/include/asm-arm26/atomic.h
new file mode 100644
index 000000000000..4a88235c0e76
--- /dev/null
+++ b/include/asm-arm26/atomic.h
@@ -0,0 +1,93 @@
+/*
+ *  linux/include/asm-arm26/atomic.h
+ *
+ *  Copyright (c) 1996 Russell King.
+ *  Modified for arm26 by Ian Molton
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Changelog:
+ *   25-11-2004 IM      Updated for 2.6.9
+ *   27-06-1996 RMK     Created
+ *   13-04-1997 RMK     Made functions atomic!
+ *   07-12-1997 RMK     Upgraded for v2.1.
+ *   26-08-1998 PJB     Added #ifdef __KERNEL__
+ *
+ *  FIXME - its probably worth seeing what these compile into...
+ */
+#ifndef __ASM_ARM_ATOMIC_H
+#define __ASM_ARM_ATOMIC_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_SMP
+#error SMP is NOT supported
+#endif
+
+typedef struct { volatile int counter; } atomic_t;
+
+#define ATOMIC_INIT(i)  { (i) }
+
+#ifdef __KERNEL__
+#include <asm/system.h>
+
+#define atomic_read(v) ((v)->counter)
+#define atomic_set(v,i) (((v)->counter) = (i))
+
+static inline int atomic_add_return(int i, atomic_t *v)
+{
+        unsigned long flags;
+        int val;
+
+        local_irq_save(flags);
+        val = v->counter;
+        v->counter = val += i;
+        local_irq_restore(flags);
+
+        return val;
+}
+
+static inline int atomic_sub_return(int i, atomic_t *v)
+{
+        unsigned long flags;
+        int val;
+
+        local_irq_save(flags);
+        val = v->counter;
+        v->counter = val -= i;
+        local_irq_restore(flags);
+
+        return val;
+}
+
+static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
+{
+        unsigned long flags;
+
+        local_irq_save(flags);
+        *addr &= ~mask;
+        local_irq_restore(flags);
+}
+
+#define atomic_add(i, v)        (void) atomic_add_return(i, v)
+#define atomic_inc(v)           (void) atomic_add_return(1, v)
+#define atomic_sub(i, v)        (void) atomic_sub_return(i, v)
+#define atomic_dec(v)           (void) atomic_sub_return(1, v)
+
+#define atomic_inc_and_test(v)  (atomic_add_return(1, v) == 0)
+#define atomic_dec_and_test(v)  (atomic_sub_return(1, v) == 0)
+#define atomic_inc_return(v)    (atomic_add_return(1, v))
+#define atomic_dec_return(v)    (atomic_sub_return(1, v))
+
+#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
+
+/* Atomic operations are already serializing on ARM26 */
+#define smp_mb__before_atomic_dec()     barrier()
+#define smp_mb__after_atomic_dec()      barrier()
+#define smp_mb__before_atomic_inc()     barrier()
+#define smp_mb__after_atomic_inc()      barrier()
+
+#endif
+#endif
diff --git a/include/asm-arm26/bitops.h b/include/asm-arm26/bitops.h
new file mode 100644
index 000000000000..7d062fb2e343
--- /dev/null
+++ b/include/asm-arm26/bitops.h
@@ -0,0 +1,332 @@
+/*
+ * Copyright 1995, Russell King.
+ *
+ * Based on the arm32 version by RMK (and others). Their copyrights apply to
+ * Those parts.
+ * Modified for arm26 by Ian Molton on 25/11/04
+ *
+ * bit 0 is the LSB of an "unsigned long" quantity.
+ *
+ * Please note that the code in this file should never be included
+ * from user space.  Many of these are not implemented in assembler
+ * since they would be too costly.  Also, they require privileged
+ * instructions (which are not available from user mode) to ensure
+ * that they are atomic.
+ */
+
+#ifndef __ASM_ARM_BITOPS_H
+#define __ASM_ARM_BITOPS_H
+
+#ifdef __KERNEL__
+
+#include <linux/compiler.h>
+#include <asm/system.h>
+
+#define smp_mb__before_clear_bit()      do { } while (0)
+#define smp_mb__after_clear_bit()       do { } while (0)
+
+/*
+ * These functions are the basis of our bit ops.
+ *
+ * First, the atomic bitops. These use native endian.
+ */
+static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
+{
+        unsigned long flags;
+        unsigned long mask = 1UL << (bit & 31);
+
+        p += bit >> 5;
+
+        local_irq_save(flags);
+        *p |= mask;
+        local_irq_restore(flags);
+}
+
+static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p)
+{
+        unsigned long flags;
+        unsigned long mask = 1UL << (bit & 31);
+
+        p += bit >> 5;
+
+        local_irq_save(flags);
+        *p &= ~mask;
+        local_irq_restore(flags);
+}
+
+static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p)
+{
+        unsigned long flags;
+        unsigned long mask = 1UL << (bit & 31);
+
+        p += bit >> 5;
+
+        local_irq_save(flags);
+        *p ^= mask;
+        local_irq_restore(flags);
+}
+
+static inline int
+____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
+{
+        unsigned long flags;
+        unsigned int res;
+        unsigned long mask = 1UL << (bit & 31);
+
+        p += bit >> 5;
+
+        local_irq_save(flags);
+        res = *p;
+        *p = res | mask;
+        local_irq_restore(flags);
+
+        return res & mask;
+}
+
+static inline int
+____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
+{
+        unsigned long flags;
+        unsigned int res;
+        unsigned long mask = 1UL << (bit & 31);
+
+        p += bit >> 5;
+
+        local_irq_save(flags);
+        res = *p;
+        *p = res & ~mask;
+        local_irq_restore(flags);
+
+        return res & mask;
+}
+
+static inline int
+____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
+{
+        unsigned long flags;
+        unsigned int res;
+        unsigned long mask = 1UL << (bit & 31);
+
+        p += bit >> 5;
+
+        local_irq_save(flags);
+        res = *p;
+        *p = res ^ mask;
+        local_irq_restore(flags);
+
+        return res & mask;
+}
+
+/*
+ * Now the non-atomic variants.  We let the compiler handle all
+ * optimisations for these.  These are all _native_ endian.
+ */
+static inline void __set_bit(int nr, volatile unsigned long *p)
+{
+        p[nr >> 5] |= (1UL << (nr & 31));
+}
+
+static inline void __clear_bit(int nr, volatile unsigned long *p)
+{
+        p[nr >> 5] &= ~(1UL << (nr & 31));
+}
+
+static inline void __change_bit(int nr, volatile unsigned long *p)
+{
+        p[nr >> 5] ^= (1UL << (nr & 31));
+}
+
+static inline int __test_and_set_bit(int nr, volatile unsigned long *p)
+{
+        unsigned long oldval, mask = 1UL << (nr & 31);
+
+        p += nr >> 5;
+
+        oldval = *p;
+        *p = oldval | mask;
+        return oldval & mask;
+}
+
+static inline int __test_and_clear_bit(int nr, volatile unsigned long *p)
+{
+        unsigned long oldval, mask = 1UL << (nr & 31);
+
+        p += nr >> 5;
+
+        oldval = *p;
+        *p = oldval & ~mask;
+        return oldval & mask;
+}
+
+static inline int __test_and_change_bit(int nr, volatile unsigned long *p)
+{
+        unsigned long oldval, mask = 1UL << (nr & 31);
+
+        p += nr >> 5;
+
+        oldval = *p;
+        *p = oldval ^ mask;
+        return oldval & mask;
+}
+
+/*
+ * This routine doesn't need to be atomic.
+ */
+static inline int __test_bit(int nr, const volatile unsigned long * p)
+{
+        return (p[nr >> 5] >> (nr & 31)) & 1UL;
+}
+
+/*
+ * Little endian assembly bitops.  nr = 0 -> byte 0 bit 0.
+ */
+extern void _set_bit_le(int nr, volatile unsigned long * p);
+extern void _clear_bit_le(int nr, volatile unsigned long * p);
+extern void _change_bit_le(int nr, volatile unsigned long * p);
+extern int _test_and_set_bit_le(int nr, volatile unsigned long * p);
+extern int _test_and_clear_bit_le(int nr, volatile unsigned long * p);
+extern int _test_and_change_bit_le(int nr, volatile unsigned long * p);
+extern int _find_first_zero_bit_le(void * p, unsigned size);
+extern int _find_next_zero_bit_le(void * p, int size, int offset);
+extern int _find_first_bit_le(const unsigned long *p, unsigned size);
+extern int _find_next_bit_le(const unsigned long *p, int size, int offset);
+
+/*
+ * The __* form of bitops are non-atomic and may be reordered.
+ */
+#define ATOMIC_BITOP_LE(name,nr,p)              \
+        (__builtin_constant_p(nr) ?             \
+         ____atomic_##name(nr, p) :             \
+         _##name##_le(nr,p))
+
+#define NONATOMIC_BITOP(name,nr,p)              \
+        (____nonatomic_##name(nr, p))
+
+/*
+ * These are the little endian, atomic definitions.
+ */
+#define set_bit(nr,p)                   ATOMIC_BITOP_LE(set_bit,nr,p)
+#define clear_bit(nr,p)                 ATOMIC_BITOP_LE(clear_bit,nr,p)
+#define change_bit(nr,p)                ATOMIC_BITOP_LE(change_bit,nr,p)
+#define test_and_set_bit(nr,p)          ATOMIC_BITOP_LE(test_and_set_bit,nr,p)
+#define test_and_clear_bit(nr,p)        ATOMIC_BITOP_LE(test_and_clear_bit,nr,p)
+#define test_and_change_bit(nr,p)       ATOMIC_BITOP_LE(test_and_change_bit,nr,p)
+#define test_bit(nr,p)                  __test_bit(nr,p)
+#define find_first_zero_bit(p,sz)       _find_first_zero_bit_le(p,sz)
+#define find_next_zero_bit(p,sz,off)    _find_next_zero_bit_le(p,sz,off)
+#define find_first_bit(p,sz)            _find_first_bit_le(p,sz)
+#define find_next_bit(p,sz,off)         _find_next_bit_le(p,sz,off)
+
+#define WORD_BITOFF_TO_LE(x)            ((x))
+
+/*
+ * ffz = Find First Zero in word. Undefined if no zero exists,
+ * so code should check against ~0UL first..
+ */
+static inline unsigned long ffz(unsigned long word)
+{
+        int k;
+
+        word = ~word;
+        k = 31;
+        if (word & 0x0000ffff) { k -= 16; word <<= 16; }
+        if (word & 0x00ff0000) { k -= 8;  word <<= 8;  }
+        if (word & 0x0f000000) { k -= 4;  word <<= 4;  }
+        if (word & 0x30000000) { k -= 2;  word <<= 2;  }
+        if (word & 0x40000000) { k -= 1; }
+        return k;
+}
+
+/*
+ * ffz = Find First Zero in word. Undefined if no zero exists,
+ * so code should check against ~0UL first..
+ */
+static inline unsigned long __ffs(unsigned long word)
+{
+        int k;
+
+        k = 31;
+        if (word & 0x0000ffff) { k -= 16; word <<= 16; }
+        if (word & 0x00ff0000) { k -= 8;  word <<= 8;  }
+        if (word & 0x0f000000) { k -= 4;  word <<= 4;  }
+        if (word & 0x30000000) { k -= 2;  word <<= 2;  }
+        if (word & 0x40000000) { k -= 1; }
+        return k;
+}
+
+/*
+ * fls: find last bit set.
+ */
+
+#define fls(x) generic_fls(x)
+
+/*
+ * ffs: find first bit set. This is defined the same way as
+ * the libc and compiler builtin ffs routines, therefore
+ * differs in spirit from the above ffz (man ffs).
+ */
+
+#define ffs(x) generic_ffs(x)
+
+/*
+ * Find first bit set in a 168-bit bitmap, where the first
+ * 128 bits are unlikely to be set.
+ */
+static inline int sched_find_first_bit(unsigned long *b)
+{
+        unsigned long v;
+        unsigned int off;
+
+        for (off = 0; v = b[off], off < 4; off++) {
+                if (unlikely(v))
+                        break;
+        }
+        return __ffs(v) + off * 32;
+}
+
+/*
+ * hweightN: returns the hamming weight (i.e. the number
+ * of bits set) of a N-bit word
+ */
+
+#define hweight32(x) generic_hweight32(x)
+#define hweight16(x) generic_hweight16(x)
+#define hweight8(x) generic_hweight8(x)
+
+/*
+ * Ext2 is defined to use little-endian byte ordering.
+ * These do not need to be atomic.
+ */
+#define ext2_set_bit(nr,p)                      \
+                __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+#define ext2_set_bit_atomic(lock,nr,p)          \
+                test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+#define ext2_clear_bit(nr,p)                    \
+                __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+#define ext2_clear_bit_atomic(lock,nr,p)        \
+                test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+#define ext2_test_bit(nr,p)                     \
+                __test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+#define ext2_find_first_zero_bit(p,sz)          \
+                _find_first_zero_bit_le(p,sz)
+#define ext2_find_next_zero_bit(p,sz,off)       \
+                _find_next_zero_bit_le(p,sz,off)
+
+/*
+ * Minix is defined to use little-endian byte ordering.
+ * These do not need to be atomic.
+ */
+#define minix_set_bit(nr,p)                     \
+                __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+#define minix_test_bit(nr,p)                    \
+                __test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+#define minix_test_and_set_bit(nr,p)            \
+                __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+#define minix_test_and_clear_bit(nr,p)          \
+                __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
+#define minix_find_first_zero_bit(p,sz)         \
+                _find_first_zero_bit_le(p,sz)
+
+#endif /* __KERNEL__ */
+
+#endif /* _ARM_BITOPS_H */
diff --git a/include/asm-arm26/bug.h b/include/asm-arm26/bug.h
new file mode 100644
index 000000000000..920b70533368
--- /dev/null
+++ b/include/asm-arm26/bug.h
@@ -0,0 +1,17 @@
+#ifndef _ASMARM_BUG_H
+#define _ASMARM_BUG_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_DEBUG_BUGVERBOSE
+extern volatile void __bug(const char *file, int line, void *data);
+/* give file/line information */
+#define BUG()           __bug(__FILE__, __LINE__, NULL)
+#else
+#define BUG()           (*(int *)0 = 0)
+#endif
+
+#define HAVE_ARCH_BUG
+#include <asm-generic/bug.h>
+
+#endif
diff --git a/include/asm-arm26/bugs.h b/include/asm-arm26/bugs.h
new file mode 100644
index 000000000000..e99ac2e46d7f
--- /dev/null
+++ b/include/asm-arm26/bugs.h
@@ -0,0 +1,15 @@
+/*
+ *  linux/include/asm-arm26/bugs.h
+ *
+ *  Copyright (C) 1995  Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_BUGS_H
+#define __ASM_BUGS_H
+
+#define check_bugs() cpu_check_bugs()
+
+#endif
diff --git a/include/asm-arm26/byteorder.h b/include/asm-arm26/byteorder.h
new file mode 100644
index 000000000000..0b4af9ac76e9
--- /dev/null
+++ b/include/asm-arm26/byteorder.h
@@ -0,0 +1,24 @@
+/*
+ *  linux/include/asm-arm/byteorder.h
+ *
+ * ARM Endian-ness.  In little endian mode, the data bus is connected such
+ * that byte accesses appear as:
+ *  0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
+ * and word accesses (data or instruction) appear as:
+ *  d0...d31
+ *
+ */
+#ifndef __ASM_ARM_BYTEORDER_H
+#define __ASM_ARM_BYTEORDER_H
+
+#include <asm/types.h>
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+#  define __BYTEORDER_HAS_U64__
+#  define __SWAB_64_THRU_32__
+#endif
+
+#include <linux/byteorder/little_endian.h>
+
+#endif
+
diff --git a/include/asm-arm26/cache.h b/include/asm-arm26/cache.h
new file mode 100644
index 000000000000..f52ca1b808cd
--- /dev/null
+++ b/include/asm-arm26/cache.h
@@ -0,0 +1,11 @@
+/*
+ *  linux/include/asm-arm26/cache.h
+ */
+#ifndef __ASMARM_CACHE_H
+#define __ASMARM_CACHE_H
+
+#define        L1_CACHE_BYTES  32
+#define        L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
+#define        SMP_CACHE_BYTES L1_CACHE_BYTES
+
+#endif
diff --git a/include/asm-arm26/cacheflush.h b/include/asm-arm26/cacheflush.h
new file mode 100644
index 000000000000..9c1b9c7f2ebd
--- /dev/null
+++ b/include/asm-arm26/cacheflush.h
@@ -0,0 +1,52 @@
+/*
+ *  linux/include/asm-arm/cacheflush.h
+ *
+ *  Copyright (C) 2000-2002 Russell King
+ *  Copyright (C) 2003 Ian Molton
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * ARM26 cache 'functions'
+ *
+ */
+
+#ifndef _ASMARM_CACHEFLUSH_H
+#define _ASMARM_CACHEFLUSH_H
+
+#if 1     //FIXME - BAD INCLUDES!!!
+#include <linux/sched.h>
+#include <linux/mm.h>
+#endif
+
+#define flush_cache_all()                       do { } while (0)
+#define flush_cache_mm(mm)                      do { } while (0)
+#define flush_cache_range(vma,start,end)        do { } while (0)
+#define flush_cache_page(vma,vmaddr,pfn)        do { } while (0)
+#define flush_cache_vmap(start, end)            do { } while (0)
+#define flush_cache_vunmap(start, end)          do { } while (0)
+
+#define invalidate_dcache_range(start,end)      do { } while (0)
+#define clean_dcache_range(start,end)           do { } while (0)
+#define flush_dcache_range(start,end)           do { } while (0)
+#define flush_dcache_page(page)                 do { } while (0)
+#define flush_dcache_mmap_lock(mapping)         do { } while (0)
+#define flush_dcache_mmap_unlock(mapping)       do { } while (0)
+#define clean_dcache_entry(_s)                  do { } while (0)
+#define clean_cache_entry(_start)               do { } while (0)
+
+#define flush_icache_user_range(start,end, bob, fred) do { } while (0)
+#define flush_icache_range(start,end)           do { } while (0)
+#define flush_icache_page(vma,page)             do { } while (0)
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+        memcpy(dst, src, len)
+#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+        memcpy(dst, src, len)
+
+/* DAG: ARM3 will flush cache on MEMC updates anyway? so don't bother */
+/* IM : Yes, it will, but only if setup to do so (we do this). */
+#define clean_cache_area(_start,_size)          do { } while (0)
+
+#endif
diff --git a/include/asm-arm26/checksum.h b/include/asm-arm26/checksum.h
new file mode 100644
index 000000000000..d4256d5f3a7c
--- /dev/null
+++ b/include/asm-arm26/checksum.h
@@ -0,0 +1,160 @@
+/*
+ *  linux/include/asm-arm/checksum.h
+ *
+ * IP checksum routines
+ *
+ * Copyright (C) Original authors of ../asm-i386/checksum.h
+ * Copyright (C) 1996-1999 Russell King
+ */
+#ifndef __ASM_ARM_CHECKSUM_H
+#define __ASM_ARM_CHECKSUM_H
+
+#include <linux/in6.h>
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+unsigned int csum_partial(const unsigned char * buff, int len, unsigned int sum);
+
+/*
+ * the same as csum_partial, but copies from src while it
+ * checksums, and handles user-space pointer exceptions correctly, when needed.
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+
+unsigned int
+csum_partial_copy_nocheck(const char *src, char *dst, int len, int sum);
+
+unsigned int
+csum_partial_copy_from_user(const char __user *src, char *dst, int len, int sum, int *err_ptr);
+
+/*
+ * This is the old (and unsafe) way of doing checksums, a warning message will
+ * be printed if it is used and an exception occurs.
+ *
+ * this functions should go away after some time.
+ */
+#define csum_partial_copy(src,dst,len,sum)      csum_partial_copy_nocheck(src,dst,len,sum)
+
+/*
+ *      This is a version of ip_compute_csum() optimized for IP headers,
+ *      which always checksum on 4 octet boundaries.
+ */
+static inline unsigned short
+ip_fast_csum(unsigned char * iph, unsigned int ihl)
+{
+        unsigned int sum, tmp1;
+
+        __asm__ __volatile__(
+        "ldr    %0, [%1], #4            @ ip_fast_csum          \n\
+        ldr     %3, [%1], #4                                    \n\
+        sub     %2, %2, #5                                      \n\
+        adds    %0, %0, %3                                      \n\
+        ldr     %3, [%1], #4                                    \n\
+        adcs    %0, %0, %3                                      \n\
+        ldr     %3, [%1], #4                                    \n\
+1:      adcs    %0, %0, %3                                      \n\
+        ldr     %3, [%1], #4                                    \n\
+        tst     %2, #15                 @ do this carefully     \n\
+        subne   %2, %2, #1              @ without destroying    \n\
+        bne     1b                      @ the carry flag        \n\
+        adcs    %0, %0, %3                                      \n\
+        adc     %0, %0, #0                                      \n\
+        adds    %0, %0, %0, lsl #16                             \n\
+        addcs   %0, %0, #0x10000                                \n\
+        mvn     %0, %0                                          \n\
+        mov     %0, %0, lsr #16"
+        : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (tmp1)
+        : "1" (iph), "2" (ihl)
+        : "cc");
+        return sum;
+}
+
+/*
+ *      Fold a partial checksum without adding pseudo headers
+ */
+static inline unsigned int
+csum_fold(unsigned int sum)
+{
+        __asm__(
+        "adds   %0, %1, %1, lsl #16     @ csum_fold             \n\
+        addcs   %0, %0, #0x10000"
+        : "=r" (sum)
+        : "r" (sum)
+        : "cc");
+        return (~sum) >> 16;
+}
+
+static inline unsigned int
+csum_tcpudp_nofold(unsigned long saddr, unsigned long daddr, unsigned short len,
+                   unsigned int proto, unsigned int sum)
+{
+        __asm__(
+        "adds   %0, %1, %2              @ csum_tcpudp_nofold    \n\
+        adcs    %0, %0, %3                                      \n\
+        adcs    %0, %0, %4                                      \n\
+        adcs    %0, %0, %5                                      \n\
+        adc     %0, %0, #0"
+        : "=&r"(sum)
+        : "r" (sum), "r" (daddr), "r" (saddr), "r" (ntohs(len)), "Ir" (ntohs(proto))
+        : "cc");
+        return sum;
+}       
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline unsigned short int
+csum_tcpudp_magic(unsigned long saddr, unsigned long daddr, unsigned short len,
+                  unsigned int proto, unsigned int sum)
+{
+        __asm__(
+        "adds   %0, %1, %2              @ csum_tcpudp_magic     \n\
+        adcs    %0, %0, %3                                      \n\
+        adcs    %0, %0, %4                                      \n\
+        adcs    %0, %0, %5                                      \n\
+        adc     %0, %0, #0                                      \n\
+        adds    %0, %0, %0, lsl #16                             \n\
+        addcs   %0, %0, #0x10000                                \n\
+        mvn     %0, %0"
+        : "=&r"(sum)
+        : "r" (sum), "r" (daddr), "r" (saddr), "r" (ntohs(len)), "Ir" (ntohs(proto))
+        : "cc");
+        return sum >> 16;
+}
+
+
+/*
+ * this routine is used for miscellaneous IP-like checksums, mainly
+ * in icmp.c
+ */
+static inline unsigned short
+ip_compute_csum(unsigned char * buff, int len)
+{
+        return csum_fold(csum_partial(buff, len, 0));
+}
+
+#define _HAVE_ARCH_IPV6_CSUM
+extern unsigned long
+__csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len,
+                __u32 proto, unsigned int sum);
+
+static inline unsigned short int
+csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len,
+                unsigned short proto, unsigned int sum)
+{
+        return csum_fold(__csum_ipv6_magic(saddr, daddr, htonl(len),
+                                           htonl(proto), sum));
+}
+#endif
diff --git a/include/asm-arm26/constants.h b/include/asm-arm26/constants.h
new file mode 100644
index 000000000000..0d0b14415563
--- /dev/null
+++ b/include/asm-arm26/constants.h
@@ -0,0 +1,28 @@
+#ifndef __ASM_OFFSETS_H__
+#define __ASM_OFFSETS_H__
+/*
+ * DO NOT MODIFY.
+ *
+ * This file was generated by arch/arm26/Makefile
+ *
+ */
+
+#define TSK_ACTIVE_MM 96 /* offsetof(struct task_struct, active_mm) */
+
+#define VMA_VM_MM 0 /* offsetof(struct vm_area_struct, vm_mm) */
+#define VMA_VM_FLAGS 20 /* offsetof(struct vm_area_struct, vm_flags) */
+
+#define VM_EXEC 4 /* VM_EXEC */
+
+
+#define PAGE_PRESENT 1 /* L_PTE_PRESENT */
+#define PAGE_READONLY 95 /* PAGE_READONLY */
+#define PAGE_NOT_USER 3 /* PAGE_NONE */
+#define PAGE_OLD 3 /* PAGE_NONE */
+#define PAGE_CLEAN 128 /* L_PTE_DIRTY */
+
+#define PAGE_SZ 32768 /* PAGE_SIZE */
+
+#define SYS_ERROR0 10420224 /* 0x9f0000 */
+
+#endif
diff --git a/include/asm-arm26/cputime.h b/include/asm-arm26/cputime.h
new file mode 100644
index 000000000000..d2783a9e47b3
--- /dev/null
+++ b/include/asm-arm26/cputime.h
@@ -0,0 +1,6 @@
+#ifndef __ARM26_CPUTIME_H
+#define __ARM26_CPUTIME_H
+
+#include <asm-generic/cputime.h>
+
+#endif /* __ARM26_CPUTIME_H */
diff --git a/include/asm-arm26/current.h b/include/asm-arm26/current.h
new file mode 100644
index 000000000000..75d21e2a3ff7
--- /dev/null
+++ b/include/asm-arm26/current.h
@@ -0,0 +1,15 @@
+#ifndef _ASMARM_CURRENT_H
+#define _ASMARM_CURRENT_H
+
+#include <linux/thread_info.h>
+
+static inline struct task_struct *get_current(void) __attribute_const__;
+
+static inline struct task_struct *get_current(void)
+{
+        return current_thread_info()->task;
+}
+
+#define current (get_current())
+
+#endif /* _ASMARM_CURRENT_H */
diff --git a/include/asm-arm26/delay.h b/include/asm-arm26/delay.h
new file mode 100644
index 000000000000..40fbf7bbe6c2
--- /dev/null
+++ b/include/asm-arm26/delay.h
@@ -0,0 +1,34 @@
+#ifndef __ASM_ARM_DELAY_H
+#define __ASM_ARM_DELAY_H
+
+/*
+ * Copyright (C) 1995 Russell King
+ *
+ * Delay routines, using a pre-computed "loops_per_second" value.
+ */
+
+extern void __delay(int loops);
+
+/*
+ * division by multiplication: you don't have to worry about
+ * loss of precision.
+ *
+ * Use only for very small delays ( < 1 msec).  Should probably use a
+ * lookup table, really, as the multiplications take much too long with
+ * short delays.  This is a "reasonable" implementation, though (and the
+ * first constant multiplications gets optimized away if the delay is
+ * a constant)
+ *
+ * FIXME - lets improve it then...
+ */
+extern void udelay(unsigned long usecs);
+
+static inline unsigned long muldiv(unsigned long a, unsigned long b, unsigned long c)
+{
+        return a * b / c;
+}
+
+        
+
+#endif /* defined(_ARM_DELAY_H) */
+
diff --git a/include/asm-arm26/div64.h b/include/asm-arm26/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/include/asm-arm26/div64.h
@@ -0,0 +1 @@
+#include <asm-generic/div64.h>
diff --git a/include/asm-arm26/dma-mapping.h b/include/asm-arm26/dma-mapping.h
new file mode 100644
index 000000000000..a95eae0aeb77
--- /dev/null
+++ b/include/asm-arm26/dma-mapping.h
@@ -0,0 +1,2 @@
+#include <asm-generic/dma-mapping-broken.h>
+
diff --git a/include/asm-arm26/dma.h b/include/asm-arm26/dma.h
new file mode 100644
index 000000000000..995e223e43a1
--- /dev/null
+++ b/include/asm-arm26/dma.h
@@ -0,0 +1,184 @@
+#ifndef __ASM_ARM_DMA_H
+#define __ASM_ARM_DMA_H
+
+typedef unsigned int dmach_t;
+
+#include <linux/config.h>
+#include <linux/spinlock.h>
+#include <asm/system.h>
+#include <asm/memory.h>
+#include <asm/scatterlist.h>
+
+// FIXME - do we really need this? arm26 cant do 'proper' DMA
+
+typedef struct dma_struct dma_t;
+typedef unsigned int dmamode_t;
+
+struct dma_ops {
+        int     (*request)(dmach_t, dma_t *);           /* optional */
+        void    (*free)(dmach_t, dma_t *);              /* optional */
+        void    (*enable)(dmach_t, dma_t *);            /* mandatory */
+        void    (*disable)(dmach_t, dma_t *);           /* mandatory */
+        int     (*residue)(dmach_t, dma_t *);           /* optional */
+        int     (*setspeed)(dmach_t, dma_t *, int);     /* optional */
+        char    *type;
+};
+
+struct dma_struct {
+        struct scatterlist buf;         /* single DMA                   */
+        int             sgcount;        /* number of DMA SG             */
+        struct scatterlist *sg;         /* DMA Scatter-Gather List      */
+
+        unsigned int    active:1;       /* Transfer active              */
+        unsigned int    invalid:1;      /* Address/Count changed        */
+        unsigned int    using_sg:1;     /* using scatter list?          */
+        dmamode_t       dma_mode;       /* DMA mode                     */
+        int             speed;          /* DMA speed                    */
+
+        unsigned int    lock;           /* Device is allocated          */
+        const char      *device_id;     /* Device name                  */
+
+        unsigned int    dma_base;       /* Controller base address      */
+        int             dma_irq;        /* Controller IRQ               */
+        int             state;          /* Controller state             */
+        struct scatterlist cur_sg;      /* Current controller buffer    */
+
+        struct dma_ops  *d_ops;
+};
+
+/* Prototype: void arch_dma_init(dma)
+ * Purpose  : Initialise architecture specific DMA
+ * Params   : dma - pointer to array of DMA structures
+ */
+extern void arch_dma_init(dma_t *dma);
+
+extern void isa_init_dma(dma_t *dma);
+
+
+#define MAX_DMA_ADDRESS         0x03000000
+#define MAX_DMA_CHANNELS        3
+
+/* ARC */
+#define DMA_VIRTUAL_FLOPPY0     0
+#define DMA_VIRTUAL_FLOPPY1     1
+#define DMA_VIRTUAL_SOUND       2
+
+/* A5K */
+#define DMA_FLOPPY              0
+
+/*
+ * DMA modes
+ */
+#define DMA_MODE_MASK   3
+
+#define DMA_MODE_READ    0
+#define DMA_MODE_WRITE   1
+#define DMA_MODE_CASCADE 2
+#define DMA_AUTOINIT     4
+
+extern spinlock_t  dma_spin_lock;
+
+static inline unsigned long claim_dma_lock(void)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&dma_spin_lock, flags);
+        return flags;
+}
+
+static inline void release_dma_lock(unsigned long flags)
+{
+        spin_unlock_irqrestore(&dma_spin_lock, flags);
+}
+
+/* Clear the 'DMA Pointer Flip Flop'.
+ * Write 0 for LSB/MSB, 1 for MSB/LSB access.
+ */
+#define clear_dma_ff(channel)
+
+/* Set only the page register bits of the transfer address.
+ *
+ * NOTE: This is an architecture specific function, and should
+ *       be hidden from the drivers
+ */
+extern void set_dma_page(dmach_t channel, char pagenr);
+
+/* Request a DMA channel
+ *
+ * Some architectures may need to do allocate an interrupt
+ */
+extern int  request_dma(dmach_t channel, const char * device_id);
+
+/* Free a DMA channel
+ *
+ * Some architectures may need to do free an interrupt
+ */
+extern void free_dma(dmach_t channel);
+
+/* Enable DMA for this channel
+ *
+ * On some architectures, this may have other side effects like
+ * enabling an interrupt and setting the DMA registers.
+ */
+extern void enable_dma(dmach_t channel);
+
+/* Disable DMA for this channel
+ *
+ * On some architectures, this may have other side effects like
+ * disabling an interrupt or whatever.
+ */
+extern void disable_dma(dmach_t channel);
+
+/* Test whether the specified channel has an active DMA transfer
+ */
+extern int dma_channel_active(dmach_t channel);
+
+/* Set the DMA scatter gather list for this channel
+ *
+ * This should not be called if a DMA channel is enabled,
+ * especially since some DMA architectures don't update the
+ * DMA address immediately, but defer it to the enable_dma().
+ */
+extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg);
+
+/* Set the DMA address for this channel
+ *
+ * This should not be called if a DMA channel is enabled,
+ * especially since some DMA architectures don't update the
+ * DMA address immediately, but defer it to the enable_dma().
+ */
+extern void set_dma_addr(dmach_t channel, unsigned long physaddr);
+
+/* Set the DMA byte count for this channel
+ *
+ * This should not be called if a DMA channel is enabled,
+ * especially since some DMA architectures don't update the
+ * DMA count immediately, but defer it to the enable_dma().
+ */
+extern void set_dma_count(dmach_t channel, unsigned long count);
+
+/* Set the transfer direction for this channel
+ *
+ * This should not be called if a DMA channel is enabled,
+ * especially since some DMA architectures don't update the
+ * DMA transfer direction immediately, but defer it to the
+ * enable_dma().
+ */
+extern void set_dma_mode(dmach_t channel, dmamode_t mode);
+
+/* Set the transfer speed for this channel
+ */
+extern void set_dma_speed(dmach_t channel, int cycle_ns);
+
+/* Get DMA residue count. After a DMA transfer, this
+ * should return zero. Reading this while a DMA transfer is
+ * still in progress will return unpredictable results.
+ * If called before the channel has been used, it may return 1.
+ * Otherwise, it returns the number of _bytes_ left to transfer.
+ */
+extern int  get_dma_residue(dmach_t channel);
+
+#ifndef NO_DMA
+#define NO_DMA  255
+#endif
+
+#endif /* _ARM_DMA_H */
diff --git a/include/asm-arm26/ecard.h b/include/asm-arm26/ecard.h
new file mode 100644
index 000000000000..66691939c3c1
--- /dev/null
+++ b/include/asm-arm26/ecard.h
@@ -0,0 +1,294 @@
+/*
+ * linux/include/asm-arm26/ecard.h
+ *
+ * definitions for expansion cards
+ *
+ * This is a new system as from Linux 1.2.3
+ *
+ * Changelog:
+ *  11-12-1996  RMK     Further minor improvements
+ *  12-09-1997  RMK     Added interrupt enable/disable for card level
+ *  18-05-2003  IM      Adjusted for ARM26
+ *
+ * Reference: Acorns Risc OS 3 Programmers Reference Manuals.
+ */
+
+#ifndef __ASM_ECARD_H
+#define __ASM_ECARD_H
+
+/*
+ * Currently understood cards (but not necessarily
+ * supported):
+ *                        Manufacturer  Product ID
+ */
+#define MANU_ACORN              0x0000
+#define PROD_ACORN_SCSI                 0x0002
+#define PROD_ACORN_ETHER1               0x0003
+#define PROD_ACORN_MFM                  0x000b
+
+#define MANU_CCONCEPTS          0x0009
+#define PROD_CCONCEPTS_COLOURCARD       0x0050
+
+#define MANU_ANT2               0x0011
+#define PROD_ANT_ETHER3                 0x00a4
+
+#define MANU_ATOMWIDE           0x0017
+#define PROD_ATOMWIDE_3PSERIAL          0x0090
+
+#define MANU_IRLAM_INSTRUMENTS  0x001f
+#define MANU_IRLAM_INSTRUMENTS_ETHERN   0x5678
+
+#define MANU_OAK                0x0021
+#define PROD_OAK_SCSI                   0x0058
+
+#define MANU_MORLEY             0x002b
+#define PROD_MORLEY_SCSI_UNCACHED       0x0067
+
+#define MANU_CUMANA             0x003a
+#define PROD_CUMANA_SCSI_2              0x003a
+#define PROD_CUMANA_SCSI_1              0x00a0
+
+#define MANU_ICS                0x003c
+#define PROD_ICS_IDE                    0x00ae
+
+#define MANU_ICS2               0x003d
+#define PROD_ICS2_IDE                   0x00ae
+
+#define MANU_SERPORT            0x003f
+#define PROD_SERPORT_DSPORT             0x00b9
+
+#define MANU_ARXE               0x0041
+#define PROD_ARXE_SCSI                  0x00be
+
+#define MANU_I3                 0x0046
+#define PROD_I3_ETHERLAN500             0x00d4
+#define PROD_I3_ETHERLAN600             0x00ec
+#define PROD_I3_ETHERLAN600A            0x011e
+
+#define MANU_ANT                0x0053
+#define PROD_ANT_ETHERM                 0x00d8
+#define PROD_ANT_ETHERB                 0x00e4
+
+#define MANU_ALSYSTEMS          0x005b
+#define PROD_ALSYS_SCSIATAPI            0x0107
+
+#define MANU_MCS                0x0063
+#define PROD_MCS_CONNECT32              0x0125
+
+#define MANU_EESOX              0x0064
+#define PROD_EESOX_SCSI2                0x008c
+
+#define MANU_YELLOWSTONE        0x0096
+#define PROD_YELLOWSTONE_RAPIDE32       0x0120
+
+#define MANU_SIMTEC             0x005f
+#define PROD_SIMTEC_IDE8                0x0130
+#define PROD_SIMTEC_IDE16               0x0131
+
+
+#ifdef ECARD_C
+#define CONST
+#else
+#define CONST const
+#endif
+
+#define MAX_ECARDS      4
+
+typedef enum {                          /* Cards address space          */
+        ECARD_IOC,
+        ECARD_MEMC,
+        ECARD_EASI
+} card_type_t;
+
+typedef enum {                          /* Speed for ECARD_IOC space    */
+        ECARD_SLOW       = 0,
+        ECARD_MEDIUM     = 1,
+        ECARD_FAST       = 2,
+        ECARD_SYNC       = 3
+} card_speed_t;
+
+struct ecard_id {                       /* Card ID structure            */
+        unsigned short  manufacturer;
+        unsigned short  product;
+        void            *data;
+};
+
+struct in_ecid {                        /* Packed card ID information   */
+        unsigned short  product;        /* Product code                 */
+        unsigned short  manufacturer;   /* Manufacturer code            */
+        unsigned char   id:4;           /* Simple ID                    */
+        unsigned char   cd:1;           /* Chunk dir present            */
+        unsigned char   is:1;           /* Interrupt status pointers    */
+        unsigned char   w:2;            /* Width                        */
+        unsigned char   country;        /* Country                      */
+        unsigned char   irqmask;        /* IRQ mask                     */
+        unsigned char   fiqmask;        /* FIQ mask                     */
+        unsigned long   irqoff;         /* IRQ offset                   */
+        unsigned long   fiqoff;         /* FIQ offset                   */
+};
+
+typedef struct expansion_card ecard_t;
+typedef unsigned long *loader_t;
+
+typedef struct {                        /* Card handler routines        */
+        void (*irqenable)(ecard_t *ec, int irqnr);
+        void (*irqdisable)(ecard_t *ec, int irqnr);
+        int  (*irqpending)(ecard_t *ec);
+        void (*fiqenable)(ecard_t *ec, int fiqnr);
+        void (*fiqdisable)(ecard_t *ec, int fiqnr);
+        int  (*fiqpending)(ecard_t *ec);
+} expansioncard_ops_t;
+
+#define ECARD_NUM_RESOURCES     (6)
+
+#define ECARD_RES_IOCSLOW       (0)
+#define ECARD_RES_IOCMEDIUM     (1)
+#define ECARD_RES_IOCFAST       (2)
+#define ECARD_RES_IOCSYNC       (3)
+#define ECARD_RES_MEMC          (4)
+#define ECARD_RES_EASI          (5)
+
+#define ecard_resource_start(ec,nr)     ((ec)->resource[nr].start)
+#define ecard_resource_end(ec,nr)       ((ec)->resource[nr].end)
+#define ecard_resource_len(ec,nr)       ((ec)->resource[nr].end - \
+                                         (ec)->resource[nr].start + 1)
+
+/*
+ * This contains all the info needed on an expansion card
+ */
+struct expansion_card {
+        struct expansion_card  *next;
+
+        struct device           dev;
+        struct resource         resource[ECARD_NUM_RESOURCES];
+
+        /* Public data */
+        volatile unsigned char *irqaddr;     /* address of IRQ register */
+        volatile unsigned char *fiqaddr;     /* address of FIQ register */
+        unsigned char           irqmask;     /* IRQ mask */
+        unsigned char           fiqmask;     /* FIQ mask */
+        unsigned char           claimed;     /* Card claimed? */
+
+        void                    *irq_data;   /* Data for use for IRQ by card */
+        void                    *fiq_data;   /* Data for use for FIQ by card */
+        const expansioncard_ops_t *ops;      /* Enable/Disable Ops for card */
+
+        CONST unsigned int      slot_no;     /* Slot number */
+        CONST unsigned int      dma;         /* DMA number (for request_dma) */
+        CONST unsigned int      irq;         /* IRQ number (for request_irq) */
+        CONST unsigned int      fiq;         /* FIQ number (for request_irq) */
+        CONST card_type_t       type;        /* Type of card */
+        CONST struct in_ecid    cid;         /* Card Identification */
+
+        /* Private internal data */
+        const char              *card_desc;  /* Card description */
+        CONST unsigned int      podaddr;     /* Base Linux address for card */
+        CONST loader_t          loader;      /* loader program */
+        u64                     dma_mask;
+};
+
+struct in_chunk_dir {
+        unsigned int start_offset;
+        union {
+                unsigned char string[256];
+                unsigned char data[1];
+        } d;
+};
+
+/*
+ * ecard_claim: claim an expansion card entry
+ * FIXME - are these atomic / called with interrupts off ?
+ */
+#define ecard_claim(ec) ((ec)->claimed = 1)
+
+/*
+ * ecard_release: release an expansion card entry
+ */
+#define ecard_release(ec) ((ec)->claimed = 0)
+
+/*
+ * Read a chunk from an expansion card
+ * cd : where to put read data
+ * ec : expansion card info struct
+ * id : id number to find
+ * num: (n+1)'th id to find.
+ */
+extern int ecard_readchunk (struct in_chunk_dir *cd, struct expansion_card *ec, int id, int num);
+
+/*
+ * Obtain the address of a card
+ */
+extern unsigned int ecard_address (struct expansion_card *ec, card_type_t card_type, card_speed_t speed);
+
+#ifdef ECARD_C
+/* Definitions internal to ecard.c - for it's use only!!
+ *
+ * External expansion card header as read from the card
+ */
+struct ex_ecid {
+        unsigned char   r_irq:1;
+        unsigned char   r_zero:1;
+        unsigned char   r_fiq:1;
+        unsigned char   r_id:4;
+        unsigned char   r_a:1;
+
+        unsigned char   r_cd:1;
+        unsigned char   r_is:1;
+        unsigned char   r_w:2;
+        unsigned char   r_r1:4;
+
+        unsigned char   r_r2:8;
+
+        unsigned char   r_prod[2];
+
+        unsigned char   r_manu[2];
+
+        unsigned char   r_country;
+
+        unsigned char   r_irqmask;
+        unsigned char   r_irqoff[3];
+
+        unsigned char   r_fiqmask;
+        unsigned char   r_fiqoff[3];
+};
+
+/*
+ * Chunk directory entry as read from the card
+ */
+struct ex_chunk_dir {
+        unsigned char r_id;
+        unsigned char r_len[3];
+        unsigned long r_start;
+        union {
+                char string[256];
+                char data[1];
+        } d;
+#define c_id(x)         ((x)->r_id)
+#define c_len(x)        ((x)->r_len[0]|((x)->r_len[1]<<8)|((x)->r_len[2]<<16))
+#define c_start(x)      ((x)->r_start)
+};
+
+#endif
+
+extern struct bus_type ecard_bus_type;
+
+#define ECARD_DEV(_d)   container_of((_d), struct expansion_card, dev)
+
+struct ecard_driver {
+        int                     (*probe)(struct expansion_card *, const struct ecard_id *id);
+        void                    (*remove)(struct expansion_card *);
+        void                    (*shutdown)(struct expansion_card *);
+        const struct ecard_id   *id_table;
+        unsigned int            id;
+        struct device_driver    drv;
+};
+
+#define ECARD_DRV(_d)   container_of((_d), struct ecard_driver, drv)
+
+#define ecard_set_drvdata(ec,data)      dev_set_drvdata(&(ec)->dev, (data))
+#define ecard_get_drvdata(ec)           dev_get_drvdata(&(ec)->dev)
+
+int ecard_register_driver(struct ecard_driver *);
+void ecard_remove_driver(struct ecard_driver *);
+
+#endif
diff --git a/include/asm-arm26/elf.h b/include/asm-arm26/elf.h
new file mode 100644
index 000000000000..8b149474db24
--- /dev/null
+++ b/include/asm-arm26/elf.h
@@ -0,0 +1,77 @@
+#ifndef __ASMARM_ELF_H
+#define __ASMARM_ELF_H
+
+/*
+ * ELF register definitions..
+ */
+
+#include <asm/ptrace.h>
+#include <asm/procinfo.h>
+
+//FIXME - is it always 32K ?
+
+#define ELF_EXEC_PAGESIZE       32768
+#define SET_PERSONALITY(ex,ibcs2) set_personality(PER_LINUX)
+
+typedef unsigned long elf_greg_t;
+typedef unsigned long elf_freg_t[3];
+
+#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+typedef struct { void *null; } elf_fpregset_t;
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ * We can only execute 26-bit code.
+ */
+
+#define EM_ARM  40
+#define EF_ARM_APCS26 0x08
+
+//#define elf_check_arch(x) ( ((x)->e_machine == EM_ARM) && ((x)->e_flags & EF_ARM_APCS26) )      FIXME!!!!! - this looks OK, but the flags seem to be wrong.
+#define elf_check_arch(x) (1)
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS       ELFCLASS32
+#define ELF_DATA        ELFDATA2LSB;
+#define ELF_ARCH        EM_ARM
+
+#define USE_ELF_CORE_DUMP
+
+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+   use of this is to invoke "./ld.so someprog" to test out a new version of
+   the loader.  We need to make sure that it is out of the way of the program
+   that it will "exec", and that there is sufficient room for the brk.  */
+
+#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
+
+/* When the program starts, a1 contains a pointer to a function to be 
+   registered with atexit, as per the SVR4 ABI.  A value of 0 means we 
+   have no such handler.  */
+#define ELF_PLAT_INIT(_r, load_addr)    (_r)->ARM_r0 = 0
+
+/* This yields a mask that user programs can use to figure out what
+   instruction set this cpu supports. */
+
+extern unsigned int elf_hwcap;
+#define ELF_HWCAP       (elf_hwcap)
+
+/* This yields a string that ld.so will use to load implementation
+   specific libraries for optimization.  This is more specific in
+   intent than poking at uname or /proc/cpuinfo. */
+
+/* For now we just provide a fairly general string that describes the
+   processor family.  This could be made more specific later if someone
+   implemented optimisations that require it.  26-bit CPUs give you
+   "v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't
+   supported).
+ */
+
+#define ELF_PLATFORM_SIZE 8
+extern char elf_platform[];
+#define ELF_PLATFORM    (elf_platform)
+
+#endif
diff --git a/include/asm-arm26/errno.h b/include/asm-arm26/errno.h
new file mode 100644
index 000000000000..6e60f0612bb6
--- /dev/null
+++ b/include/asm-arm26/errno.h
@@ -0,0 +1,6 @@
+#ifndef _ARM_ERRNO_H
+#define _ARM_ERRNO_H
+
+#include <asm-generic/errno.h>
+
+#endif
diff --git a/include/asm-arm26/fcntl.h b/include/asm-arm26/fcntl.h
new file mode 100644
index 000000000000..485b6bdf4d7a
--- /dev/null
+++ b/include/asm-arm26/fcntl.h
@@ -0,0 +1,87 @@
+#ifndef _ARM_FCNTL_H
+#define _ARM_FCNTL_H
+
+/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
+   located on an ext2 file system */
+#define O_ACCMODE          0003
+#define O_RDONLY             00
+#define O_WRONLY             01
+#define O_RDWR               02
+#define O_CREAT            0100 /* not fcntl */
+#define O_EXCL             0200 /* not fcntl */
+#define O_NOCTTY           0400 /* not fcntl */
+#define O_TRUNC           01000 /* not fcntl */
+#define O_APPEND          02000
+#define O_NONBLOCK        04000
+#define O_NDELAY        O_NONBLOCK
+#define O_SYNC           010000
+#define FASYNC           020000 /* fcntl, for BSD compatibility */
+#define O_DIRECTORY      040000 /* must be a directory */
+#define O_NOFOLLOW      0100000 /* don't follow links */
+#define O_DIRECT        0200000 /* direct disk access hint - currently ignored */
+#define O_LARGEFILE     0400000
+#define O_NOATIME       01000000
+
+#define F_DUPFD         0       /* dup */
+#define F_GETFD         1       /* get close_on_exec */
+#define F_SETFD         2       /* set/clear close_on_exec */
+#define F_GETFL         3       /* get file->f_flags */
+#define F_SETFL         4       /* set file->f_flags */
+#define F_GETLK         5
+#define F_SETLK         6
+#define F_SETLKW        7
+
+#define F_SETOWN        8       /*  for sockets. */
+#define F_GETOWN        9       /*  for sockets. */
+#define F_SETSIG        10      /*  for sockets. */
+#define F_GETSIG        11      /*  for sockets. */
+
+#define F_GETLK64       12      /*  using 'struct flock64' */
+#define F_SETLK64       13
+#define F_SETLKW64      14
+
+/* for F_[GET|SET]FL */
+#define FD_CLOEXEC      1       /* actually anything with low bit set goes */
+
+/* for posix fcntl() and lockf() */
+#define F_RDLCK         0
+#define F_WRLCK         1
+#define F_UNLCK         2
+
+/* for old implementation of bsd flock () */
+#define F_EXLCK         4       /* or 3 */
+#define F_SHLCK         8       /* or 4 */
+
+/* for leases */
+#define F_INPROGRESS    16
+
+/* operations for bsd flock(), also used by the kernel implementation */
+#define LOCK_SH         1       /* shared lock */
+#define LOCK_EX         2       /* exclusive lock */
+#define LOCK_NB         4       /* or'd with one of the above to prevent
+                                   blocking */
+#define LOCK_UN         8       /* remove lock */
+
+#define LOCK_MAND       32      /* This is a mandatory flock */
+#define LOCK_READ       64      /* ... Which allows concurrent read operations */
+#define LOCK_WRITE      128     /* ... Which allows concurrent write operations */
+#define LOCK_RW         192     /* ... Which allows concurrent read & write ops */
+
+struct flock {
+        short l_type;
+        short l_whence;
+        off_t l_start;
+        off_t l_len;
+        pid_t l_pid;
+};
+
+struct flock64 {
+        short  l_type;
+        short  l_whence;
+        loff_t l_start;
+        loff_t l_len;
+        pid_t  l_pid;
+};
+
+#define F_LINUX_SPECIFIC_BASE   1024
+#endif
diff --git a/include/asm-arm26/fiq.h b/include/asm-arm26/fiq.h
new file mode 100644
index 000000000000..a3bad09e825c
--- /dev/null
+++ b/include/asm-arm26/fiq.h
@@ -0,0 +1,37 @@
+/*
+ *  linux/include/asm-arm/fiq.h
+ *
+ * Support for FIQ on ARM architectures.
+ * Written by Philip Blundell <philb@gnu.org>, 1998
+ * Re-written by Russell King
+ */
+
+#ifndef __ASM_FIQ_H
+#define __ASM_FIQ_H
+
+#include <asm/ptrace.h>
+
+struct fiq_handler {
+        struct fiq_handler *next;
+        /* Name
+         */
+        const char *name;
+        /* Called to ask driver to relinquish/
+         * reacquire FIQ
+         * return zero to accept, or -<errno>
+         */
+        int (*fiq_op)(void *, int relinquish);
+        /* data for the relinquish/reacquire functions
+         */
+        void *dev_id;
+};
+
+extern int claim_fiq(struct fiq_handler *f);
+extern void release_fiq(struct fiq_handler *f);
+extern void set_fiq_handler(void *start, unsigned int length);
+extern void set_fiq_regs(struct pt_regs *regs);
+extern void get_fiq_regs(struct pt_regs *regs);
+extern void enable_fiq(int fiq);
+extern void disable_fiq(int fiq);
+
+#endif
diff --git a/include/asm-arm26/floppy.h b/include/asm-arm26/floppy.h
new file mode 100644
index 000000000000..9e090ad7e477
--- /dev/null
+++ b/include/asm-arm26/floppy.h
@@ -0,0 +1,141 @@
+/*
+ *  linux/include/asm-arm/floppy.h
+ *
+ *  Copyright (C) 1996-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Note that we don't touch FLOPPY_DMA nor FLOPPY_IRQ here
+ */
+#ifndef __ASM_ARM_FLOPPY_H
+#define __ASM_ARM_FLOPPY_H
+
+#define fd_outb(val,port)                       \
+        do {                                    \
+                if ((port) == FD_DOR)           \
+                        fd_setdor((val));       \
+                else                            \
+                        outb((val),(port));     \
+        } while(0)
+
+#define fd_inb(port)            inb((port))
+#define fd_request_irq()        request_irq(IRQ_FLOPPYDISK,floppy_interrupt,\
+                                        SA_INTERRUPT|SA_SAMPLE_RANDOM,"floppy",NULL)
+#define fd_free_irq()           free_irq(IRQ_FLOPPYDISK,NULL)
+#define fd_disable_irq()        disable_irq(IRQ_FLOPPYDISK)
+#define fd_enable_irq()         enable_irq(IRQ_FLOPPYDISK)
+
+#define fd_request_dma()        request_dma(DMA_FLOPPY,"floppy")
+#define fd_free_dma()           free_dma(DMA_FLOPPY)
+#define fd_disable_dma()        disable_dma(DMA_FLOPPY)
+#define fd_enable_dma()         enable_dma(DMA_FLOPPY)
+#define fd_clear_dma_ff()       clear_dma_ff(DMA_FLOPPY)
+#define fd_set_dma_mode(mode)   set_dma_mode(DMA_FLOPPY, (mode))
+#define fd_set_dma_addr(addr)   set_dma_addr(DMA_FLOPPY, virt_to_bus((addr)))
+#define fd_set_dma_count(len)   set_dma_count(DMA_FLOPPY, (len))
+#define fd_cacheflush(addr,sz)
+
+/* need to clean up dma.h */
+#define DMA_FLOPPYDISK          DMA_FLOPPY
+
+/* Floppy_selects is the list of DOR's to select drive fd
+ *
+ * On initialisation, the floppy list is scanned, and the drives allocated
+ * in the order that they are found.  This is done by seeking the drive
+ * to a non-zero track, and then restoring it to track 0.  If an error occurs,
+ * then there is no floppy drive present.       [to be put back in again]
+ */
+static unsigned char floppy_selects[2][4] =
+{
+        { 0x10, 0x21, 0x23, 0x33 },
+        { 0x10, 0x21, 0x23, 0x33 }
+};
+
+#define fd_setdor(dor)                                                          \
+do {                                                                            \
+        int new_dor = (dor);                                                    \
+        if (new_dor & 0xf0)                                                     \
+                new_dor = (new_dor & 0x0c) | floppy_selects[fdc][new_dor & 3];  \
+        else                                                                    \
+                new_dor &= 0x0c;                                                \
+        outb(new_dor, FD_DOR);                                                  \
+} while (0)
+
+/*
+ * Someday, we'll automatically detect which drives are present...
+ */
+static inline void fd_scandrives (void)
+{
+#if 0
+        int floppy, drive_count;
+
+        fd_disable_irq();
+        raw_cmd = &default_raw_cmd;
+        raw_cmd->flags = FD_RAW_SPIN | FD_RAW_NEED_SEEK;
+        raw_cmd->track = 0;
+        raw_cmd->rate = ?;
+        drive_count = 0;
+        for (floppy = 0; floppy < 4; floppy ++) {
+                current_drive = drive_count;
+                /*
+                 * Turn on floppy motor
+                 */
+                if (start_motor(redo_fd_request))
+                        continue;
+                /*
+                 * Set up FDC
+                 */
+                fdc_specify();
+                /*
+                 * Tell FDC to recalibrate
+                 */
+                output_byte(FD_RECALIBRATE);
+                LAST_OUT(UNIT(floppy));
+                /* wait for command to complete */
+                if (!successful) {
+                        int i;
+                        for (i = drive_count; i < 3; i--)
+                                floppy_selects[fdc][i] = floppy_selects[fdc][i + 1];
+                        floppy_selects[fdc][3] = 0;
+                        floppy -= 1;
+                } else
+                        drive_count++;
+        }
+#else
+        floppy_selects[0][0] = 0x10;
+        floppy_selects[0][1] = 0x21;
+        floppy_selects[0][2] = 0x23;
+        floppy_selects[0][3] = 0x33;
+#endif
+}
+
+#define FDC1 (0x3f0)
+
+#define FLOPPY0_TYPE 4
+#define FLOPPY1_TYPE 4
+
+#define N_FDC 1
+#define N_DRIVE 4
+
+#define FLOPPY_MOTOR_MASK 0xf0
+
+#define CROSS_64KB(a,s) (0)
+
+/*
+ * This allows people to reverse the order of
+ * fd0 and fd1, in case their hardware is
+ * strangely connected (as some RiscPCs
+ * and A5000s seem to be).
+ */
+static void driveswap(int *ints, int dummy, int dummy2)
+{
+        floppy_selects[0][0] ^= floppy_selects[0][1];
+        floppy_selects[0][1] ^= floppy_selects[0][0];
+        floppy_selects[0][0] ^= floppy_selects[0][1];
+}
+
+#define EXTRA_FLOPPY_PARAMS ,{ "driveswap", &driveswap, NULL, 0, 0 }
+        
+#endif
diff --git a/include/asm-arm26/fpstate.h b/include/asm-arm26/fpstate.h
new file mode 100644
index 000000000000..785749b3c5ab
--- /dev/null
+++ b/include/asm-arm26/fpstate.h
@@ -0,0 +1,29 @@
+/*
+ *  linux/include/asm-arm/fpstate.h
+ *
+ *  Copyright (C) 1995 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_FPSTATE_H
+#define __ASM_ARM_FPSTATE_H
+
+#define FP_SIZE 35
+
+struct fp_hard_struct {
+        unsigned int save[FP_SIZE];             /* as yet undefined */
+};
+
+struct fp_soft_struct {
+        unsigned int save[FP_SIZE];             /* undefined information */
+};
+
+union fp_state {
+        struct fp_hard_struct   hard;
+        struct fp_soft_struct   soft;
+};
+
+#endif
diff --git a/include/asm-arm26/hardirq.h b/include/asm-arm26/hardirq.h
new file mode 100644
index 000000000000..791ee1da9bfa
--- /dev/null
+++ b/include/asm-arm26/hardirq.h
@@ -0,0 +1,41 @@
+#ifndef __ASM_HARDIRQ_H
+#define __ASM_HARDIRQ_H
+
+#include <linux/config.h>
+#include <linux/cache.h>
+#include <linux/threads.h>
+
+typedef struct {
+        unsigned int __softirq_pending;
+} ____cacheline_aligned irq_cpustat_t;
+
+#include <linux/irq_cpustat.h>  /* Standard mappings for irq_cpustat_t above */
+
+#define HARDIRQ_BITS    8
+
+/*
+ * The hardirq mask has to be large enough to have space
+ * for potentially all IRQ sources in the system nesting
+ * on a single CPU:
+ */
+#if (1 << HARDIRQ_BITS) < NR_IRQS
+# error HARDIRQ_BITS is too low!
+#endif
+
+#define irq_enter()             (preempt_count() += HARDIRQ_OFFSET)
+
+#ifndef CONFIG_SMP
+
+extern asmlinkage void __do_softirq(void);
+
+#define irq_exit()                                                      \
+        do {                                                            \
+                preempt_count() -= IRQ_EXIT_OFFSET;                     \
+                if (!in_interrupt() && local_softirq_pending())         \
+                        __do_softirq();                                 \
+                preempt_enable_no_resched();                            \
+        } while (0)
+#endif
+
+
+#endif /* __ASM_HARDIRQ_H */
diff --git a/include/asm-arm26/hardware.h b/include/asm-arm26/hardware.h
new file mode 100644
index 000000000000..82fc55e2a009
--- /dev/null
+++ b/include/asm-arm26/hardware.h
@@ -0,0 +1,110 @@
+/*
+ *  linux/include/asm-arm/arch-arc/hardware.h
+ *
+ *  Copyright (C) 1996-1999 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  This file contains the hardware definitions of the
+ *  Acorn Archimedes/A5000 machines.
+ *
+ *  Modifications:
+ *   04-04-1998 PJB/RMK Merged arc and a5k versions
+ */
+#ifndef __ASM_HARDWARE_H
+#define __ASM_HARDWARE_H
+
+#include <linux/config.h>
+
+
+/*
+ * What hardware must be present - these can be tested by the kernel
+ * source.
+ */
+#define HAS_IOC
+#define HAS_MEMC
+#define HAS_VIDC
+
+#define VDMA_ALIGNMENT  PAGE_SIZE
+#define VDMA_XFERSIZE   16
+#define VDMA_INIT       0
+#define VDMA_START      1
+#define VDMA_END        2
+
+#ifndef __ASSEMBLY__
+extern void memc_write(unsigned int reg, unsigned long val);
+
+#define video_set_dma(start,end,offset)                         \
+do {                                                            \
+        memc_write (VDMA_START, (start >> 2));                  \
+        memc_write (VDMA_END, (end - VDMA_XFERSIZE) >> 2);      \
+        memc_write (VDMA_INIT, (offset >> 2));                  \
+} while (0)
+#endif
+
+
+/* Hardware addresses of major areas.
+ *  *_START is the physical address
+ *  *_SIZE  is the size of the region
+ *  *_BASE  is the virtual address
+ */
+#define IO_START                0x03000000
+#define IO_SIZE                 0x01000000
+#define IO_BASE                 0x03000000
+
+/*
+ * Screen mapping information
+ */
+#define SCREEN_START            0x02000000
+#define SCREEN_END              0x02078000
+#define SCREEN_SIZE             0x00078000
+#define SCREEN_BASE             0x02000000
+
+
+#define EXPMASK_BASE            0x03360000
+#define IOEB_BASE               0x03350000
+#define VIDC_BASE               0x03400000
+#define LATCHA_BASE             0x03250040
+#define LATCHB_BASE             0x03250018
+#define IOC_BASE                0x03200000
+#define FLOPPYDMA_BASE          0x0302a000
+#define PCIO_BASE               0x03010000
+
+// FIXME - are the below correct?
+#define PODSLOT_IOC0_BASE       0x03240000
+#define PODSLOT_IOC_SIZE        (1 << 14)
+#define PODSLOT_MEMC_BASE       0x03000000
+#define PODSLOT_MEMC_SIZE       (1 << 14)
+
+#define vidc_writel(val)        __raw_writel(val, VIDC_BASE)
+
+#ifndef __ASSEMBLY__
+
+/*
+ * for use with inb/outb
+ */
+#define IOEB_VID_CTL            (IOEB_BASE + 0x48)
+#define IOEB_PRESENT            (IOEB_BASE + 0x50)
+#define IOEB_PSCLR              (IOEB_BASE + 0x58)
+#define IOEB_MONTYPE            (IOEB_BASE + 0x70)
+
+//FIXME - These adresses are weird - ISTR some weirdo address shifting stuff was going on here...
+#define IO_EC_IOC_BASE          0x80090000
+#define IO_EC_MEMC_BASE         0x80000000
+
+#ifdef CONFIG_ARCH_ARC
+/* A680 hardware */
+#define WD1973_BASE             0x03290000
+#define WD1973_LATCH            0x03350000
+#define Z8530_BASE              0x032b0008
+#define SCSI_BASE               0x03100000
+#endif
+
+#endif
+
+#define EXPMASK_STATUS          (EXPMASK_BASE + 0x00)
+#define EXPMASK_ENABLE          (EXPMASK_BASE + 0x04)
+
+#endif
diff --git a/include/asm-arm26/hdreg.h b/include/asm-arm26/hdreg.h
new file mode 100644
index 000000000000..7f7fd1af0af3
--- /dev/null
+++ b/include/asm-arm26/hdreg.h
@@ -0,0 +1 @@
+#include <asm-generic/hdreg.h>
diff --git a/include/asm-arm26/ide.h b/include/asm-arm26/ide.h
new file mode 100644
index 000000000000..db804d751df9
--- /dev/null
+++ b/include/asm-arm26/ide.h
@@ -0,0 +1,34 @@
+/*
+ *  linux/include/asm-arm/ide.h
+ *
+ *  Copyright (C) 1994-1996  Linus Torvalds & authors
+ */
+
+/*
+ *  This file contains the i386 architecture specific IDE code.
+ */
+
+#ifndef __ASMARM_IDE_H
+#define __ASMARM_IDE_H
+
+#ifdef __KERNEL__
+
+#ifndef MAX_HWIFS
+#define MAX_HWIFS       4
+#endif
+
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+
+/* JMA 18.05.03 these will never be needed, but the kernel needs them to compile */
+#define __ide_mm_insw(port,addr,len)    readsw(port,addr,len)
+#define __ide_mm_insl(port,addr,len)    readsl(port,addr,len)
+#define __ide_mm_outsw(port,addr,len)   writesw(port,addr,len)
+#define __ide_mm_outsl(port,addr,len)   writesl(port,addr,len)
+
+#define IDE_ARCH_OBSOLETE_INIT
+#define ide_default_io_ctl(base)        (0)
+
+#endif /* __KERNEL__ */
+
+#endif /* __ASMARM_IDE_H */
diff --git a/include/asm-arm26/io.h b/include/asm-arm26/io.h
new file mode 100644
index 000000000000..02f94d88a124
--- /dev/null
+++ b/include/asm-arm26/io.h
@@ -0,0 +1,435 @@
+/*
+ *  linux/include/asm-arm/io.h
+ *
+ *  Copyright (C) 1996-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Modifications:
+ *  16-Sep-1996 RMK     Inlined the inx/outx functions & optimised for both
+ *                      constant addresses and variable addresses.
+ *  04-Dec-1997 RMK     Moved a lot of this stuff to the new architecture
+ *                      specific IO header files.
+ *  27-Mar-1999 PJB     Second parameter of memcpy_toio is const..
+ *  04-Apr-1999 PJB     Added check_signature.
+ *  12-Dec-1999 RMK     More cleanups
+ *  18-Jun-2000 RMK     Removed virt_to_* and friends definitions
+ */
+#ifndef __ASM_ARM_IO_H
+#define __ASM_ARM_IO_H
+
+#ifdef __KERNEL__
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <asm/byteorder.h>
+#include <asm/memory.h>
+#include <asm/hardware.h>
+
+/*
+ * Generic IO read/write.  These perform native-endian accesses.  Note
+ * that some architectures will want to re-define __raw_{read,write}w.
+ */
+extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
+extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
+extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
+
+extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
+extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
+extern void __raw_readsl(unsigned int addr, void *data, int longlen);
+
+#define __raw_writeb(v,a)       (*(volatile unsigned char  *)(a) = (v))
+#define __raw_writew(v,a)       (*(volatile unsigned short *)(a) = (v))
+#define __raw_writel(v,a)       (*(volatile unsigned int   *)(a) = (v))
+
+#define __raw_readb(a)          (*(volatile unsigned char  *)(a))
+#define __raw_readw(a)          (*(volatile unsigned short *)(a))
+#define __raw_readl(a)          (*(volatile unsigned int   *)(a))
+
+
+/*
+ * Bad read/write accesses...
+ */
+extern void __readwrite_bug(const char *fn);
+
+/*
+ * Now, pick up the machine-defined IO definitions
+ */
+
+#define IO_SPACE_LIMIT 0xffffffff
+
+/*
+ * GCC is totally crap at loading/storing data.  We try to persuade it
+ * to do the right thing by using these whereever possible instead of
+ * the above.
+ */
+#define __arch_base_getb(b,o)                   \
+ ({                                             \
+        unsigned int v, r = (b);                \
+        __asm__ __volatile__(                   \
+                "ldrb   %0, [%1, %2]"           \
+                : "=r" (v)                      \
+                : "r" (r), "Ir" (o));           \
+        v;                                      \
+ })
+
+#define __arch_base_getl(b,o)                   \
+ ({                                             \
+        unsigned int v, r = (b);                \
+        __asm__ __volatile__(                   \
+                "ldr    %0, [%1, %2]"           \
+                : "=r" (v)                      \
+                : "r" (r), "Ir" (o));           \
+        v;                                      \
+ })
+
+#define __arch_base_putb(v,b,o)                 \
+ ({                                             \
+        unsigned int r = (b);                   \
+        __asm__ __volatile__(                   \
+                "strb   %0, [%1, %2]"           \
+                :                               \
+                : "r" (v), "r" (r), "Ir" (o));  \
+ })
+
+#define __arch_base_putl(v,b,o)                 \
+ ({                                             \
+        unsigned int r = (b);                   \
+        __asm__ __volatile__(                   \
+                "str    %0, [%1, %2]"           \
+                :                               \
+                : "r" (v), "r" (r), "Ir" (o));  \
+ })
+
+/*
+ * We use two different types of addressing - PC style addresses, and ARM
+ * addresses.  PC style accesses the PC hardware with the normal PC IO
+ * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
+ * and are translated to the start of IO.  Note that all addresses are
+ * shifted left!
+ */
+#define __PORT_PCIO(x)  (!((x) & 0x80000000))
+
+/*
+ * Dynamic IO functions - let the compiler
+ * optimize the expressions
+ */
+static inline void __outb (unsigned int value, unsigned int port)
+{
+        unsigned long temp;
+        __asm__ __volatile__(
+        "tst    %2, #0x80000000\n\t"
+        "mov    %0, %4\n\t"
+        "addeq  %0, %0, %3\n\t"
+        "strb   %1, [%0, %2, lsl #2]    @ outb"
+        : "=&r" (temp)
+        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
+        : "cc");
+}
+
+static inline void __outw (unsigned int value, unsigned int port)
+{
+        unsigned long temp;
+        __asm__ __volatile__(
+        "tst    %2, #0x80000000\n\t"
+        "mov    %0, %4\n\t"
+        "addeq  %0, %0, %3\n\t"
+        "str    %1, [%0, %2, lsl #2]    @ outw"
+        : "=&r" (temp)
+        : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
+        : "cc");
+}
+
+static inline void __outl (unsigned int value, unsigned int port)
+{
+        unsigned long temp;
+        __asm__ __volatile__(
+        "tst    %2, #0x80000000\n\t"
+        "mov    %0, %4\n\t"
+        "addeq  %0, %0, %3\n\t"
+        "str    %1, [%0, %2, lsl #2]    @ outl"
+        : "=&r" (temp)
+        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
+        : "cc");
+}
+
+#define DECLARE_DYN_IN(sz,fnsuffix,instr)                                       \
+static inline unsigned sz __in##fnsuffix (unsigned int port)            \
+{                                                                               \
+        unsigned long temp, value;                                              \
+        __asm__ __volatile__(                                                   \
+        "tst    %2, #0x80000000\n\t"                                            \
+        "mov    %0, %4\n\t"                                                     \
+        "addeq  %0, %0, %3\n\t"                                                 \
+        "ldr" instr "   %1, [%0, %2, lsl #2]    @ in" #fnsuffix                 \
+        : "=&r" (temp), "=r" (value)                                            \
+        : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)                \
+        : "cc");                                                                \
+        return (unsigned sz)value;                                              \
+}
+
+static inline unsigned int __ioaddr (unsigned int port)                 \
+{                                                                               \
+        if (__PORT_PCIO(port))                                                  \
+                return (unsigned int)(PCIO_BASE + (port << 2));                 \
+        else                                                                    \
+                return (unsigned int)(IO_BASE + (port << 2));                   \
+}
+
+#define DECLARE_IO(sz,fnsuffix,instr)   \
+        DECLARE_DYN_IN(sz,fnsuffix,instr)
+
+DECLARE_IO(char,b,"b")
+DECLARE_IO(short,w,"")
+DECLARE_IO(int,l,"")
+
+#undef DECLARE_IO
+#undef DECLARE_DYN_IN
+
+/*
+ * Constant address IO functions
+ *
+ * These have to be macros for the 'J' constraint to work -
+ * +/-4096 immediate operand.
+ */
+#define __outbc(value,port)                                                     \
+({                                                                              \
+        if (__PORT_PCIO((port)))                                                \
+                __asm__ __volatile__(                                           \
+                "strb   %0, [%1, %2]    @ outbc"                                \
+                : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2));          \
+        else                                                                    \
+                __asm__ __volatile__(                                           \
+                "strb   %0, [%1, %2]    @ outbc"                                \
+                : : "r" (value), "r" (IO_BASE), "r" ((port) << 2));             \
+})
+
+#define __inbc(port)                                                            \
+({                                                                              \
+        unsigned char result;                                                   \
+        if (__PORT_PCIO((port)))                                                \
+                __asm__ __volatile__(                                           \
+                "ldrb   %0, [%1, %2]    @ inbc"                                 \
+                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
+        else                                                                    \
+                __asm__ __volatile__(                                           \
+                "ldrb   %0, [%1, %2]    @ inbc"                                 \
+                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
+        result;                                                                 \
+})
+
+#define __outwc(value,port)                                                     \
+({                                                                              \
+        unsigned long v = value;                                                \
+        if (__PORT_PCIO((port)))                                                \
+                __asm__ __volatile__(                                           \
+                "str    %0, [%1, %2]    @ outwc"                                \
+                : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2));        \
+        else                                                                    \
+                __asm__ __volatile__(                                           \
+                "str    %0, [%1, %2]    @ outwc"                                \
+                : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2));           \
+})
+
+#define __inwc(port)                                                            \
+({                                                                              \
+        unsigned short result;                                                  \
+        if (__PORT_PCIO((port)))                                                \
+                __asm__ __volatile__(                                           \
+                "ldr    %0, [%1, %2]    @ inwc"                                 \
+                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
+        else                                                                    \
+                __asm__ __volatile__(                                           \
+                "ldr    %0, [%1, %2]    @ inwc"                                 \
+                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
+        result & 0xffff;                                                        \
+})
+
+#define __outlc(value,port)                                                     \
+({                                                                              \
+        unsigned long v = value;                                                \
+        if (__PORT_PCIO((port)))                                                \
+                __asm__ __volatile__(                                           \
+                "str    %0, [%1, %2]    @ outlc"                                \
+                : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2));              \
+        else                                                                    \
+                __asm__ __volatile__(                                           \
+                "str    %0, [%1, %2]    @ outlc"                                \
+                : : "r" (v), "r" (IO_BASE), "r" ((port) << 2));                 \
+})
+
+#define __inlc(port)                                                            \
+({                                                                              \
+        unsigned long result;                                                   \
+        if (__PORT_PCIO((port)))                                                \
+                __asm__ __volatile__(                                           \
+                "ldr    %0, [%1, %2]    @ inlc"                                 \
+                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
+        else                                                                    \
+                __asm__ __volatile__(                                           \
+                "ldr    %0, [%1, %2]    @ inlc"                                 \
+                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
+        result;                                                                 \
+})
+
+#define __ioaddrc(port)                                                         \
+({                                                                              \
+        unsigned long addr;                                                     \
+        if (__PORT_PCIO((port)))                                                \
+                addr = PCIO_BASE + ((port) << 2);                               \
+        else                                                                    \
+                addr = IO_BASE + ((port) << 2);                                 \
+        addr;                                                                   \
+})
+
+#define inb(p)          (__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
+#define inw(p)          (__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
+#define inl(p)          (__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
+#define outb(v,p)       (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
+#define outw(v,p)       (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
+#define outl(v,p)       (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
+#define __ioaddr(p)     (__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
+
+/* JMA 18.02.03 added sb,sl from arm/io.h, changing io to ioaddr */
+
+#define outsb(p,d,l)            __raw_writesb(__ioaddr(p),d,l)
+#define outsw(p,d,l)            __raw_writesw(__ioaddr(p),d,l)
+#define outsl(p,d,l)            __raw_writesl(__ioaddr(p),d,l)
+
+#define insb(p,d,l)             __raw_readsb(__ioaddr(p),d,l)
+#define insw(p,d,l)             __raw_readsw(__ioaddr(p),d,l)
+#define insl(p,d,l)             __raw_readsl(__ioaddr(p),d,l)
+
+#define insw(p,d,l)     __raw_readsw(__ioaddr(p),d,l)
+#define outsw(p,d,l)    __raw_writesw(__ioaddr(p),d,l)
+
+#define readb(c)                        (__readwrite_bug("readb"),0)
+#define readw(c)                        (__readwrite_bug("readw"),0)
+#define readl(c)                        (__readwrite_bug("readl"),0)
+#define readb_relaxed(addr)             readb(addr)
+#define readw_relaxed(addr)             readw(addr)
+#define readl_relaxed(addr)             readl(addr)
+#define writeb(v,c)                     __readwrite_bug("writeb")
+#define writew(v,c)                     __readwrite_bug("writew")
+#define writel(v,c)                     __readwrite_bug("writel")
+
+#define readsw(p,d,l)                 (__readwrite_bug("readsw"),0)
+#define readsl(p,d,l)                 (__readwrite_bug("readsl"),0)
+#define writesw(p,d,l)                        __readwrite_bug("writesw")
+#define writesl(p,d,l)                        __readwrite_bug("writesl")
+
+#define mmiowb()
+
+/* the following macro is depreciated */
+#define ioaddr(port)                    __ioaddr((port))
+
+/*
+ * No ioremap support here.
+ */
+#define __arch_ioremap(c,s,f,a)   ((void *)(c))
+#define __arch_iounmap(c)       do { }  while (0)
+
+
+#if defined(__arch_putb) || defined(__arch_putw) || defined(__arch_putl) || \
+    defined(__arch_getb) || defined(__arch_getw) || defined(__arch_getl)
+#warning machine class uses old __arch_putw or __arch_getw
+#endif
+
+/*
+ *  IO port access primitives
+ *  -------------------------
+ *
+ * The ARM doesn't have special IO access instructions; all IO is memory
+ * mapped.  Note that these are defined to perform little endian accesses
+ * only.  Their primary purpose is to access PCI and ISA peripherals.
+ *
+ * Note that for a big endian machine, this implies that the following
+ * big endian mode connectivity is in place, as described by numerious
+ * ARM documents:
+ *
+ *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31
+ *    ARM: D24-D31 D16-D23  D8-D15  D0-D7
+ *
+ * The machine specific io.h include defines __io to translate an "IO"
+ * address to a memory address.
+ *
+ * Note that we prevent GCC re-ordering or caching values in expressions
+ * by introducing sequence points into the in*() definitions.  Note that
+ * __raw_* do not guarantee this behaviour.
+ */
+/*
+#define outsb(p,d,l)            __raw_writesb(__io(p),d,l)
+#define outsw(p,d,l)            __raw_writesw(__io(p),d,l)
+
+#define insb(p,d,l)             __raw_readsb(__io(p),d,l)
+#define insw(p,d,l)             __raw_readsw(__io(p),d,l)
+*/
+#define outb_p(val,port)        outb((val),(port))
+#define outw_p(val,port)        outw((val),(port))
+#define inb_p(port)             inb((port))
+#define inw_p(port)             inw((port))
+#define inl_p(port)             inl((port))
+
+#define outsb_p(port,from,len)  outsb(port,from,len)
+#define outsw_p(port,from,len)  outsw(port,from,len)
+#define insb_p(port,to,len)     insb(port,to,len)
+#define insw_p(port,to,len)     insw(port,to,len)
+
+/*
+ * String version of IO memory access ops:
+ */
+extern void _memcpy_fromio(void *, unsigned long, size_t);
+extern void _memcpy_toio(unsigned long, const void *, size_t);
+extern void _memset_io(unsigned long, int, size_t);
+
+/*
+ * ioremap and friends.
+ *
+ * ioremap takes a PCI memory address, as specified in
+ * Documentation/IO-mapping.txt.
+ */
+extern void * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
+extern void __iounmap(void *addr);
+
+#ifndef __arch_ioremap
+#define ioremap(cookie,size)            __ioremap(cookie,size,0,1)
+#define ioremap_nocache(cookie,size)    __ioremap(cookie,size,0,1)
+#define iounmap(cookie)                 __iounmap(cookie)
+#else
+#define ioremap(cookie,size)            __arch_ioremap((cookie),(size),0,1)
+#define ioremap_nocache(cookie,size)    __arch_ioremap((cookie),(size),0,1)
+#define iounmap(cookie)                 __arch_iounmap(cookie)
+#endif
+
+/*
+ * DMA-consistent mapping functions.  These allocate/free a region of
+ * uncached, unwrite-buffered mapped memory space for use with DMA
+ * devices.  This is the "generic" version.  The PCI specific version
+ * is in pci.h
+ */
+extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
+extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
+extern void consistent_sync(void *vaddr, size_t size, int rw);
+
+/*
+ * can the hardware map this into one segment or not, given no other
+ * constraints.
+ */
+#define BIOVEC_MERGEABLE(vec1, vec2)    \
+        ((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2)))
+
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p)    __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p)   p
+
+#endif  /* __KERNEL__ */
+#endif  /* __ASM_ARM_IO_H */
diff --git a/include/asm-arm26/ioc.h b/include/asm-arm26/ioc.h
new file mode 100644
index 000000000000..b3b46ef65943
--- /dev/null
+++ b/include/asm-arm26/ioc.h
@@ -0,0 +1,72 @@
+/*
+ *  linux/include/asm-arm/hardware/ioc.h
+ *
+ *  Copyright (C) Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Use these macros to read/write the IOC.  All it does is perform the actual
+ *  read/write.
+ */
+#ifndef __ASMARM_HARDWARE_IOC_H
+#define __ASMARM_HARDWARE_IOC_H
+
+#ifndef __ASSEMBLY__
+
+/*
+ * We use __raw_base variants here so that we give the compiler the
+ * chance to keep IOC_BASE in a register.
+ */
+#define ioc_readb(off)          __raw_readb(IOC_BASE + (off))
+#define ioc_writeb(val,off)     __raw_writeb(val, IOC_BASE + (off))
+
+#endif
+
+#define IOC_CONTROL     (0x00)
+#define IOC_KARTTX      (0x04)
+#define IOC_KARTRX      (0x04)
+
+#define IOC_IRQSTATA    (0x10)
+#define IOC_IRQREQA     (0x14)
+#define IOC_IRQCLRA     (0x14)
+#define IOC_IRQMASKA    (0x18)
+
+#define IOC_IRQSTATB    (0x20)
+#define IOC_IRQREQB     (0x24)
+#define IOC_IRQMASKB    (0x28)
+
+#define IOC_FIQSTAT     (0x30)
+#define IOC_FIQREQ      (0x34)
+#define IOC_FIQMASK     (0x38)
+
+#define IOC_T0CNTL      (0x40)
+#define IOC_T0LTCHL     (0x40)
+#define IOC_T0CNTH      (0x44)
+#define IOC_T0LTCHH     (0x44)
+#define IOC_T0GO        (0x48)
+#define IOC_T0LATCH     (0x4c)
+
+#define IOC_T1CNTL      (0x50)
+#define IOC_T1LTCHL     (0x50)
+#define IOC_T1CNTH      (0x54)
+#define IOC_T1LTCHH     (0x54)
+#define IOC_T1GO        (0x58)
+#define IOC_T1LATCH     (0x5c)
+
+#define IOC_T2CNTL      (0x60)
+#define IOC_T2LTCHL     (0x60)
+#define IOC_T2CNTH      (0x64)
+#define IOC_T2LTCHH     (0x64)
+#define IOC_T2GO        (0x68)
+#define IOC_T2LATCH     (0x6c)
+
+#define IOC_T3CNTL      (0x70)
+#define IOC_T3LTCHL     (0x70)
+#define IOC_T3CNTH      (0x74)
+#define IOC_T3LTCHH     (0x74)
+#define IOC_T3GO        (0x78)
+#define IOC_T3LATCH     (0x7c)
+
+#endif
diff --git a/include/asm-arm26/ioctl.h b/include/asm-arm26/ioctl.h
new file mode 100644
index 000000000000..2cbb7d0e9dc6
--- /dev/null
+++ b/include/asm-arm26/ioctl.h
@@ -0,0 +1,74 @@
+/*
+ * linux/ioctl.h for Linux by H.H. Bergman.
+ */
+
+#ifndef _ASMARM_IOCTL_H
+#define _ASMARM_IOCTL_H
+
+/* ioctl command encoding: 32 bits total, command in lower 16 bits,
+ * size of the parameter structure in the lower 14 bits of the
+ * upper 16 bits.
+ * Encoding the size of the parameter structure in the ioctl request
+ * is useful for catching programs compiled with old versions
+ * and to avoid overwriting user space outside the user buffer area.
+ * The highest 2 bits are reserved for indicating the ``access mode''.
+ * NOTE: This limits the max parameter size to 16kB -1 !
+ */
+
+/*
+ * The following is for compatibility across the various Linux
+ * platforms.  The i386 ioctl numbering scheme doesn't really enforce
+ * a type field.  De facto, however, the top 8 bits of the lower 16
+ * bits are indeed used as a type field, so we might just as well make
+ * this explicit here.  Please be sure to use the decoding macros
+ * below from now on.
+ */
+#define _IOC_NRBITS     8
+#define _IOC_TYPEBITS   8
+#define _IOC_SIZEBITS   14
+#define _IOC_DIRBITS    2
+
+#define _IOC_NRMASK     ((1 << _IOC_NRBITS)-1)
+#define _IOC_TYPEMASK   ((1 << _IOC_TYPEBITS)-1)
+#define _IOC_SIZEMASK   ((1 << _IOC_SIZEBITS)-1)
+#define _IOC_DIRMASK    ((1 << _IOC_DIRBITS)-1)
+
+#define _IOC_NRSHIFT    0
+#define _IOC_TYPESHIFT  (_IOC_NRSHIFT+_IOC_NRBITS)
+#define _IOC_SIZESHIFT  (_IOC_TYPESHIFT+_IOC_TYPEBITS)
+#define _IOC_DIRSHIFT   (_IOC_SIZESHIFT+_IOC_SIZEBITS)
+
+/*
+ * Direction bits.
+ */
+#define _IOC_NONE       0U
+#define _IOC_WRITE      1U
+#define _IOC_READ       2U
+
+#define _IOC(dir,type,nr,size) \
+        (((dir)  << _IOC_DIRSHIFT) | \
+         ((type) << _IOC_TYPESHIFT) | \
+         ((nr)   << _IOC_NRSHIFT) | \
+         ((size) << _IOC_SIZESHIFT))
+
+/* used to create numbers */
+#define _IO(type,nr)            _IOC(_IOC_NONE,(type),(nr),0)
+#define _IOR(type,nr,size)      _IOC(_IOC_READ,(type),(nr),sizeof(size))
+#define _IOW(type,nr,size)      _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
+#define _IOWR(type,nr,size)     _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
+
+/* used to decode ioctl numbers.. */
+#define _IOC_DIR(nr)            (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
+#define _IOC_TYPE(nr)           (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
+#define _IOC_NR(nr)             (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
+#define _IOC_SIZE(nr)           (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
+
+/* ...and for the drivers/sound files... */
+
+#define IOC_IN          (_IOC_WRITE << _IOC_DIRSHIFT)
+#define IOC_OUT         (_IOC_READ << _IOC_DIRSHIFT)
+#define IOC_INOUT       ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
+#define IOCSIZE_MASK    (_IOC_SIZEMASK << _IOC_SIZESHIFT)
+#define IOCSIZE_SHIFT   (_IOC_SIZESHIFT)
+
+#endif /* _ASMARM_IOCTL_H */
diff --git a/include/asm-arm26/ioctls.h b/include/asm-arm26/ioctls.h
new file mode 100644
index 000000000000..ba9c7d81d24e
--- /dev/null
+++ b/include/asm-arm26/ioctls.h
@@ -0,0 +1,81 @@
+#ifndef __ASM_ARM_IOCTLS_H
+#define __ASM_ARM_IOCTLS_H
+
+#include <asm/ioctl.h>
+
+/* 0x54 is just a magic number to make these relatively unique ('T') */
+
+#define TCGETS          0x5401
+#define TCSETS          0x5402
+#define TCSETSW         0x5403
+#define TCSETSF         0x5404
+#define TCGETA          0x5405
+#define TCSETA          0x5406
+#define TCSETAW         0x5407
+#define TCSETAF         0x5408
+#define TCSBRK          0x5409
+#define TCXONC          0x540A
+#define TCFLSH          0x540B
+#define TIOCEXCL        0x540C
+#define TIOCNXCL        0x540D
+#define TIOCSCTTY       0x540E
+#define TIOCGPGRP       0x540F
+#define TIOCSPGRP       0x5410
+#define TIOCOUTQ        0x5411
+#define TIOCSTI         0x5412
+#define TIOCGWINSZ      0x5413
+#define TIOCSWINSZ      0x5414
+#define TIOCMGET        0x5415
+#define TIOCMBIS        0x5416
+#define TIOCMBIC        0x5417
+#define TIOCMSET        0x5418
+#define TIOCGSOFTCAR    0x5419
+#define TIOCSSOFTCAR    0x541A
+#define FIONREAD        0x541B
+#define TIOCINQ         FIONREAD
+#define TIOCLINUX       0x541C
+#define TIOCCONS        0x541D
+#define TIOCGSERIAL     0x541E
+#define TIOCSSERIAL     0x541F
+#define TIOCPKT         0x5420
+#define FIONBIO         0x5421
+#define TIOCNOTTY       0x5422
+#define TIOCSETD        0x5423
+#define TIOCGETD        0x5424
+#define TCSBRKP         0x5425  /* Needed for POSIX tcsendbreak() */
+#define TIOCTTYGSTRUCT  0x5426  /* For debugging only */
+#define TIOCSBRK        0x5427  /* BSD compatibility */
+#define TIOCCBRK        0x5428  /* BSD compatibility */
+#define TIOCGSID        0x5429  /* Return the session ID of FD */
+#define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
+#define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
+
+#define FIONCLEX        0x5450  /* these numbers need to be adjusted. */
+#define FIOCLEX         0x5451
+#define FIOASYNC        0x5452
+#define TIOCSERCONFIG   0x5453
+#define TIOCSERGWILD    0x5454
+#define TIOCSERSWILD    0x5455
+#define TIOCGLCKTRMIOS  0x5456
+#define TIOCSLCKTRMIOS  0x5457
+#define TIOCSERGSTRUCT  0x5458 /* For debugging only */
+#define TIOCSERGETLSR   0x5459 /* Get line status register */
+#define TIOCSERGETMULTI 0x545A /* Get multiport config  */
+#define TIOCSERSETMULTI 0x545B /* Set multiport config */
+
+#define TIOCMIWAIT      0x545C  /* wait for a change on serial input line(s) */
+#define TIOCGICOUNT     0x545D  /* read serial port inline interrupt counts */
+#define FIOQSIZE        0x545E
+
+/* Used for packet mode */
+#define TIOCPKT_DATA             0
+#define TIOCPKT_FLUSHREAD        1
+#define TIOCPKT_FLUSHWRITE       2
+#define TIOCPKT_STOP             4
+#define TIOCPKT_START            8
+#define TIOCPKT_NOSTOP          16
+#define TIOCPKT_DOSTOP          32
+
+#define TIOCSER_TEMT    0x01    /* Transmitter physically empty */
+
+#endif
diff --git a/include/asm-arm26/ipc.h b/include/asm-arm26/ipc.h
new file mode 100644
index 000000000000..a46e3d9c2a3f
--- /dev/null
+++ b/include/asm-arm26/ipc.h
@@ -0,0 +1 @@
+#include <asm-generic/ipc.h>
diff --git a/include/asm-arm26/ipcbuf.h b/include/asm-arm26/ipcbuf.h
new file mode 100644
index 000000000000..97683975f7df
--- /dev/null
+++ b/include/asm-arm26/ipcbuf.h
@@ -0,0 +1,29 @@
+#ifndef __ASMARM_IPCBUF_H
+#define __ASMARM_IPCBUF_H
+
+/*
+ * The ipc64_perm structure for arm architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 32-bit mode_t and seq
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct ipc64_perm
+{
+        __kernel_key_t          key;
+        __kernel_uid32_t        uid;
+        __kernel_gid32_t        gid;
+        __kernel_uid32_t        cuid;
+        __kernel_gid32_t        cgid;
+        __kernel_mode_t         mode;
+        unsigned short          __pad1;
+        unsigned short          seq;
+        unsigned short          __pad2;
+        unsigned long           __unused1;
+        unsigned long           __unused2;
+};
+
+#endif /* __ASMARM_IPCBUF_H */
diff --git a/include/asm-arm26/irq.h b/include/asm-arm26/irq.h
new file mode 100644
index 000000000000..06bd5a543d13
--- /dev/null
+++ b/include/asm-arm26/irq.h
@@ -0,0 +1,52 @@
+#ifndef __ASM_ARM_IRQ_H
+#define __ASM_ARM_IRQ_H
+
+#include <asm/sysirq.h>
+
+#ifndef NR_IRQS
+#define NR_IRQS 128
+#endif
+
+
+/* JMA 18.05.02 Copied off arch/arm/irq.h */
+#ifndef irq_canonicalize
+#define irq_canonicalize(i)     (i)
+#endif
+
+
+/*
+ * Use this value to indicate lack of interrupt
+ * capability
+ */
+#ifndef NO_IRQ
+#define NO_IRQ  ((unsigned int)(-1))
+#endif
+
+struct irqaction;
+
+#define disable_irq_nosync(i) disable_irq(i)
+
+extern void disable_irq(unsigned int);
+extern void enable_irq(unsigned int);
+
+#define __IRQT_FALEDGE  (1 << 0)
+#define __IRQT_RISEDGE  (1 << 1)
+#define __IRQT_LOWLVL   (1 << 2)
+#define __IRQT_HIGHLVL  (1 << 3)
+
+#define IRQT_NOEDGE     (0)
+#define IRQT_RISING     (__IRQT_RISEDGE)
+#define IRQT_FALLING    (__IRQT_FALEDGE)
+#define IRQT_BOTHEDGE   (__IRQT_RISEDGE|__IRQT_FALEDGE)
+#define IRQT_LOW        (__IRQT_LOWLVL)
+#define IRQT_HIGH       (__IRQT_HIGHLVL)
+#define IRQT_PROBE      (1 << 4)
+
+int set_irq_type(unsigned int irq, unsigned int type);
+
+int setup_irq(unsigned int, struct irqaction *);
+struct pt_regs;
+int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
+
+#endif
+
diff --git a/include/asm-arm26/irqchip.h b/include/asm-arm26/irqchip.h
new file mode 100644
index 000000000000..6a007a954098
--- /dev/null
+++ b/include/asm-arm26/irqchip.h
@@ -0,0 +1,101 @@
+/*
+ *  linux/include/asm-arm/mach/irq.h
+ *
+ *  Copyright (C) 1995-2000 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_ARM_MACH_IRQ_H
+#define __ASM_ARM_MACH_IRQ_H
+
+struct irqdesc;
+struct pt_regs;
+struct seq_file;
+
+typedef void (*irq_handler_t)(unsigned int, struct irqdesc *, struct pt_regs *);
+typedef void (*irq_control_t)(unsigned int);
+
+struct irqchip {
+        /*
+         * Acknowledge the IRQ.
+         * If this is a level-based IRQ, then it is expected to mask the IRQ
+         * as well.
+         */
+        void (*ack)(unsigned int);
+        /*
+         * Mask the IRQ in hardware.
+         */
+        void (*mask)(unsigned int);
+        /*
+         * Unmask the IRQ in hardware.
+         */
+        void (*unmask)(unsigned int);
+        /*
+         * Re-run the IRQ
+         */
+        void (*rerun)(unsigned int);
+        /*
+         * Set the type of the IRQ.
+         */
+        int (*type)(unsigned int, unsigned int);
+};
+
+struct irqdesc {
+        irq_handler_t   handle;
+        struct irqchip  *chip;
+        struct irqaction *action;
+
+        unsigned int    enabled  : 1;           /* IRQ is currently enabled   */
+        unsigned int    triggered: 1;           /* IRQ has occurred           */
+        unsigned int    running  : 1;           /* IRQ is running             */
+        unsigned int    pending  : 1;           /* IRQ is pending             */
+        unsigned int    probing  : 1;           /* IRQ in use for a probe     */
+        unsigned int    probe_ok : 1;           /* IRQ can be used for probe  */
+        unsigned int    valid    : 1;           /* IRQ claimable              */
+        unsigned int    noautoenable : 1;       /* don't automatically enable IRQ */
+        unsigned int    unused   :23;
+        unsigned int    depth;                  /* disable depth              */
+
+        /*
+         * IRQ lock detection
+         */
+        unsigned int    lck_cnt;
+        unsigned int    lck_pc;
+        unsigned int    lck_jif;
+};
+
+extern struct irqdesc irq_desc[];
+
+/*
+ * This is internal.  Do not use it.
+ */
+extern void (*init_arch_irq)(void);
+extern void init_FIQ(void);
+extern int show_fiq_list(struct seq_file *, void *);
+void __set_irq_handler(unsigned int irq, irq_handler_t, int);
+
+/*
+ * External stuff.
+ */
+#define set_irq_handler(irq,handler)            __set_irq_handler(irq,handler,0)
+#define set_irq_chained_handler(irq,handler)    __set_irq_handler(irq,handler,1)
+
+void set_irq_chip(unsigned int irq, struct irqchip *);
+void set_irq_flags(unsigned int irq, unsigned int flags);
+
+#define IRQF_VALID      (1 << 0)
+#define IRQF_PROBE      (1 << 1)
+#define IRQF_NOAUTOEN   (1 << 2)
+
+/*
+ * Built-in IRQ handlers.
+ */
+void do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs);
+void do_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs);
+void do_simple_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs);
+void do_bad_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs);
+void dummy_mask_unmask_irq(unsigned int irq);
+
+#endif
diff --git a/include/asm-arm26/kmap_types.h b/include/asm-arm26/kmap_types.h
new file mode 100644
index 000000000000..d5da712b723c
--- /dev/null
+++ b/include/asm-arm26/kmap_types.h
@@ -0,0 +1,12 @@
+#ifndef __ARM_KMAP_TYPES_H
+#define __ARM_KMAP_TYPES_H
+
+/*
+ * This is the "bare minimum".  AIO seems to require this.
+ */
+enum km_type {
+        KM_IRQ0,
+        KM_USER1
+};
+
+#endif
diff --git a/include/asm-arm26/leds.h b/include/asm-arm26/leds.h
new file mode 100644
index 000000000000..88ce4124f854
--- /dev/null
+++ b/include/asm-arm26/leds.h
@@ -0,0 +1,51 @@
+/*
+ *  linux/include/asm-arm/leds.h
+ *
+ *  Copyright (C) 1998 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Event-driven interface for LEDs on machines
+ *  Added led_start and led_stop- Alex Holden, 28th Dec 1998.
+ */
+#ifndef ASM_ARM_LEDS_H
+#define ASM_ARM_LEDS_H
+
+#include <linux/config.h>
+
+typedef enum {
+        led_idle_start,
+        led_idle_end,
+        led_timer,
+        led_start,
+        led_stop,
+        led_claim,              /* override idle & timer leds */
+        led_release,            /* restore idle & timer leds */
+        led_start_timer_mode,
+        led_stop_timer_mode,
+        led_green_on,
+        led_green_off,
+        led_amber_on,
+        led_amber_off,
+        led_red_on,
+        led_red_off,
+        led_blue_on,
+        led_blue_off,
+        /*
+         * I want this between led_timer and led_start, but
+         * someone has decided to export this to user space
+         */
+        led_halted
+} led_event_t;
+
+/* Use this routine to handle LEDs */
+
+#ifdef CONFIG_LEDS
+extern void (*leds_event)(led_event_t);
+#else
+#define leds_event(e)
+#endif
+
+#endif
diff --git a/include/asm-arm26/limits.h b/include/asm-arm26/limits.h
new file mode 100644
index 000000000000..08d8c6600804
--- /dev/null
+++ b/include/asm-arm26/limits.h
@@ -0,0 +1,11 @@
+#ifndef __ASM_PIPE_H
+#define __ASM_PIPE_H
+
+#ifndef PAGE_SIZE
+#include <asm/page.h>
+#endif
+
+#define PIPE_BUF        PAGE_SIZE
+
+#endif
+
diff --git a/include/asm-arm26/linkage.h b/include/asm-arm26/linkage.h
new file mode 100644
index 000000000000..dbe4b4e31a5b
--- /dev/null
+++ b/include/asm-arm26/linkage.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+
+#define __ALIGN .align 0
+#define __ALIGN_STR ".align 0"
+
+#endif
diff --git a/include/asm-arm26/local.h b/include/asm-arm26/local.h
new file mode 100644
index 000000000000..6759e9183cef
--- /dev/null
+++ b/include/asm-arm26/local.h
@@ -0,0 +1,2 @@
+//FIXME - nicked from arm32 - check it is correct...
+#include <asm-generic/local.h>
diff --git a/include/asm-arm26/locks.h b/include/asm-arm26/locks.h
new file mode 100644
index 000000000000..81b3bda2ed00
--- /dev/null
+++ b/include/asm-arm26/locks.h
@@ -0,0 +1,161 @@
+/*
+ *  linux/include/asm-arm/proc-armo/locks.h
+ *
+ *  Copyright (C) 2000 Russell King
+ *  Fixes for 26 bit machines, (C) 2000 Dave Gilbert
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Interrupt safe locking assembler. 
+ */
+#ifndef __ASM_PROC_LOCKS_H
+#define __ASM_PROC_LOCKS_H
+
+/* Decrements by 1, fails if value < 0 */
+#define __down_op(ptr,fail)                     \
+        ({                                      \
+        __asm__ __volatile__ (                  \
+        "@ atomic down operation\n"             \
+"       mov     ip, pc\n"                       \
+"       orr     lr, ip, #0x08000000\n"          \
+"       teqp    lr, #0\n"                       \
+"       ldr     lr, [%0]\n"                     \
+"       and     ip, ip, #0x0c000003\n"          \
+"       subs    lr, lr, #1\n"                   \
+"       str     lr, [%0]\n"                     \
+"       orrmi   ip, ip, #0x80000000     @ set N\n" \
+"       teqp    ip, #0\n"                       \
+"       movmi   ip, %0\n"                       \
+"       blmi    " #fail                         \
+        :                                       \
+        : "r" (ptr)                             \
+        : "ip", "lr", "cc");                    \
+        })
+
+#define __down_op_ret(ptr,fail)                 \
+        ({                                      \
+                unsigned int result;            \
+        __asm__ __volatile__ (                  \
+"       @ down_op_ret\n"                        \
+"       mov     ip, pc\n"                       \
+"       orr     lr, ip, #0x08000000\n"          \
+"       teqp    lr, #0\n"                       \
+"       ldr     lr, [%1]\n"                     \
+"       and     ip, ip, #0x0c000003\n"          \
+"       subs    lr, lr, #1\n"                   \
+"       str     lr, [%1]\n"                     \
+"       orrmi   ip, ip, #0x80000000     @ set N\n" \
+"       teqp    ip, #0\n"                       \
+"       movmi   ip, %1\n"                       \
+"       movpl   ip, #0\n"                       \
+"       blmi    " #fail "\n"                    \
+"       mov     %0, ip"                         \
+        : "=&r" (result)                        \
+        : "r" (ptr)                             \
+        : "ip", "lr", "cc");                    \
+        result;                                 \
+        })
+
+#define __up_op(ptr,wake)                       \
+        ({                                      \
+        __asm__ __volatile__ (                  \
+        "@ up_op\n"                             \
+"       mov     ip, pc\n"                       \
+"       orr     lr, ip, #0x08000000\n"          \
+"       teqp    lr, #0\n"                       \
+"       ldr     lr, [%0]\n"                     \
+"       and     ip, ip, #0x0c000003\n"          \
+"       adds    lr, lr, #1\n"                   \
+"       str     lr, [%0]\n"                     \
+"       orrle   ip, ip, #0x80000000     @ set N - should this be mi ??? DAG ! \n" \
+"       teqp    ip, #0\n"                       \
+"       movmi   ip, %0\n"                       \
+"       blmi    " #wake                         \
+        :                                       \
+        : "r" (ptr)                             \
+        : "ip", "lr", "cc");                    \
+        })
+
+/*
+ * The value 0x01000000 supports up to 128 processors and
+ * lots of processes.  BIAS must be chosen such that sub'ing
+ * BIAS once per CPU will result in the long remaining
+ * negative.
+ */
+#define RW_LOCK_BIAS      0x01000000
+#define RW_LOCK_BIAS_STR "0x01000000"
+
+/* Decrements by RW_LOCK_BIAS rather than 1, fails if value != 0 */
+#define __down_op_write(ptr,fail)               \
+        ({                                      \
+        __asm__ __volatile__(                   \
+        "@ down_op_write\n"                     \
+"       mov     ip, pc\n"                       \
+"       orr     lr, ip, #0x08000000\n"          \
+"       teqp    lr, #0\n"                       \
+"       and     ip, ip, #0x0c000003\n"          \
+\
+"       ldr     lr, [%0]\n"                     \
+"       subs    lr, lr, %1\n"                   \
+"       str     lr, [%0]\n"                     \
+\
+" orreq ip, ip, #0x40000000 @ set Z \n"\
+"       teqp    ip, #0\n"                       \
+"       movne   ip, %0\n"                       \
+"       blne    " #fail                         \
+        :                                       \
+        : "r" (ptr), "I" (RW_LOCK_BIAS)         \
+        : "ip", "lr", "cc");                    \
+        })
+
+/* Increments by RW_LOCK_BIAS, wakes if value >= 0 */
+#define __up_op_write(ptr,wake)                 \
+        ({                                      \
+        __asm__ __volatile__(                   \
+        "@ up_op_read\n"                        \
+"       mov     ip, pc\n"                       \
+"       orr     lr, ip, #0x08000000\n"          \
+"       teqp    lr, #0\n"                       \
+\
+"       ldr     lr, [%0]\n"                     \
+"       and     ip, ip, #0x0c000003\n"          \
+"       adds    lr, lr, %1\n"                   \
+"       str     lr, [%0]\n"                     \
+\
+" orrcs ip, ip, #0x20000000 @ set C\n" \
+"       teqp    ip, #0\n"                       \
+"       movcs   ip, %0\n"                       \
+"       blcs    " #wake                         \
+        :                                       \
+        : "r" (ptr), "I" (RW_LOCK_BIAS)         \
+        : "ip", "lr", "cc");                    \
+        })
+
+#define __down_op_read(ptr,fail)                \
+        __down_op(ptr, fail)
+
+#define __up_op_read(ptr,wake)                  \
+        ({                                      \
+        __asm__ __volatile__(                   \
+        "@ up_op_read\n"                        \
+"       mov     ip, pc\n"                       \
+"       orr     lr, ip, #0x08000000\n"          \
+"       teqp    lr, #0\n"                       \
+\
+"       ldr     lr, [%0]\n"                     \
+"       and     ip, ip, #0x0c000003\n"          \
+"       adds    lr, lr, %1\n"                   \
+"       str     lr, [%0]\n"                     \
+\
+" orreq ip, ip, #0x40000000 @ Set Z \n" \
+"       teqp    ip, #0\n"                       \
+"       moveq   ip, %0\n"                       \
+"       bleq    " #wake                         \
+        :                                       \
+        : "r" (ptr), "I" (1)                    \
+        : "ip", "lr", "cc");                    \
+        })
+
+#endif
diff --git a/include/asm-arm26/mach-types.h b/include/asm-arm26/mach-types.h
new file mode 100644
index 000000000000..b34045b78128
--- /dev/null
+++ b/include/asm-arm26/mach-types.h
@@ -0,0 +1,37 @@
+/*
+ * Unlike ARM32 this is NOT automatically generated. DONT delete it
+ * Instead, consider FIXME-ing it so its auto-detected.
+ */
+
+#ifndef __ASM_ARM_MACH_TYPE_H
+#define __ASM_ARM_MACH_TYPE_H
+
+#include <linux/config.h>
+
+#ifndef __ASSEMBLY__
+extern unsigned int __machine_arch_type;
+#endif
+
+#define MACH_TYPE_ARCHIMEDES           10
+#define MACH_TYPE_A5K                  11
+
+#ifdef CONFIG_ARCH_ARC
+# define machine_arch_type              MACH_TYPE_ARCHIMEDES
+# define machine_is_archimedes()        (machine_arch_type == MACH_TYPE_ARCHIMEDES)
+#else
+# define machine_is_archimedes()        (0)
+#endif
+
+#ifdef CONFIG_ARCH_A5K
+# define machine_arch_type              MACH_TYPE_A5K
+# define machine_is_a5k()               (machine_arch_type == MACH_TYPE_A5K)
+#else
+# define machine_is_a5k()       (0)
+#endif
+
+#ifndef machine_arch_type
+#error Unknown machine type
+#define machine_arch_type       __machine_arch_type
+#endif
+
+#endif
diff --git a/include/asm-arm26/map.h b/include/asm-arm26/map.h
new file mode 100644
index 000000000000..6e12a7fa5c5d
--- /dev/null
+++ b/include/asm-arm26/map.h
@@ -0,0 +1,24 @@
+/*
+ *  linux/include/asm-arm/map.h
+ *
+ *  Copyright (C) 1999-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Page table mapping constructs and function prototypes
+ */
+struct map_desc {
+        unsigned long virtual;
+        unsigned long physical;
+        unsigned long length;
+        unsigned int type;
+};
+
+struct meminfo;
+
+extern void create_memmap_holes(struct meminfo *);
+extern void memtable_init(struct meminfo *);
+extern void iotable_init(struct map_desc *);
+extern void setup_io_desc(void);
diff --git a/include/asm-arm26/mc146818rtc.h b/include/asm-arm26/mc146818rtc.h
new file mode 100644
index 000000000000..a234130db8f1
--- /dev/null
+++ b/include/asm-arm26/mc146818rtc.h
@@ -0,0 +1,28 @@
+/*
+ * Machine dependent access functions for RTC registers.
+ */
+#ifndef _ASM_MC146818RTC_H
+#define _ASM_MC146818RTC_H
+
+#include <asm/irq.h>
+#include <asm/io.h>
+
+#ifndef RTC_PORT
+#define RTC_PORT(x)     (0x70 + (x))
+#define RTC_ALWAYS_BCD  1       /* RTC operates in binary mode */
+#endif
+
+/*
+ * The yet supported machines all access the RTC index register via
+ * an ISA port access but the way to access the date register differs ...
+ */
+#define CMOS_READ(addr) ({ \
+outb_p((addr),RTC_PORT(0)); \
+inb_p(RTC_PORT(1)); \
+})
+#define CMOS_WRITE(val, addr) ({ \
+outb_p((addr),RTC_PORT(0)); \
+outb_p((val),RTC_PORT(1)); \
+})
+
+#endif /* _ASM_MC146818RTC_H */
diff --git a/include/asm-arm26/memory.h b/include/asm-arm26/memory.h
new file mode 100644
index 000000000000..20d78616f650
--- /dev/null
+++ b/include/asm-arm26/memory.h
@@ -0,0 +1,101 @@
+/*
+ *  linux/include/asm-arm26/memory.h
+ *
+ *  Copyright (C) 2000-2002 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Note: this file should not be included by non-asm/.h files
+ */
+#ifndef __ASM_ARM_MEMORY_H
+#define __ASM_ARM_MEMORY_H
+
+/*
+ * User space: 26MB
+ */
+#define TASK_SIZE       (0x01a00000UL)
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
+
+/*
+ * Page offset: 32MB
+ */
+#define PAGE_OFFSET     (0x02000000UL)
+#define PHYS_OFFSET     (0x02000000UL)
+
+#define PHYS_TO_NID(addr)       (0)
+
+/*
+ * PFNs are used to describe any physical page; this means
+ * PFN 0 == physical address 0.
+ *
+ * This is the PFN of the first RAM page in the kernel
+ * direct-mapped view.  We assume this is the first page
+ * of RAM in the mem_map as well.
+ */
+#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
+
+/*
+ * These are *only* valid on the kernel direct mapped RAM memory.
+ */
+static inline unsigned long virt_to_phys(void *x)
+{
+        return (unsigned long)x;
+}
+
+static inline void *phys_to_virt(unsigned long x)
+{
+        return (void *)((unsigned long)x);
+}
+
+#define __pa(x)                 (unsigned long)(x)
+#define __va(x)                 ((void *)(unsigned long)(x))
+
+/*
+ * Virtual <-> DMA view memory address translations
+ * Again, these are *only* valid on the kernel direct mapped RAM
+ * memory.  Use of these is *depreciated*.
+ */
+#define virt_to_bus(x)          ((unsigned long)(x))
+#define bus_to_virt(x)          ((void *)((unsigned long)(x)))
+
+/*
+ * Conversion between a struct page and a physical address.
+ *
+ * Note: when converting an unknown physical address to a
+ * struct page, the resulting pointer must be validated
+ * using VALID_PAGE().  It must return an invalid struct page
+ * for any physical address not corresponding to a system
+ * RAM address.
+ *
+ *  page_to_pfn(page)   convert a struct page * to a PFN number
+ *  pfn_to_page(pfn)    convert a _valid_ PFN number to struct page *
+ *  pfn_valid(pfn)      indicates whether a PFN number is valid
+ *
+ *  virt_to_page(k)     convert a _valid_ virtual address to struct page *
+ *  virt_addr_valid(k)  indicates whether a virtual address is valid
+ */
+#define page_to_pfn(page)       (((page) - mem_map) + PHYS_PFN_OFFSET)
+#define pfn_to_page(pfn)        ((mem_map + (pfn)) - PHYS_PFN_OFFSET)
+#define pfn_valid(pfn)          ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
+
+#define virt_to_page(kaddr)     (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT))
+#define virt_addr_valid(kaddr)  ((int)(kaddr) >= PAGE_OFFSET && (int)(kaddr) < (unsigned long)high_memory)
+
+/*
+ * For BIO.  "will die".  Kill me when bio_to_phys() and bvec_to_phys() die.
+ */
+#define page_to_phys(page)      (page_to_pfn(page) << PAGE_SHIFT)
+
+/*
+ * We should really eliminate virt_to_bus() here - it's depreciated.
+ */
+#define page_to_bus(page)       (page_address(page))
+
+#endif
diff --git a/include/asm-arm26/mman.h b/include/asm-arm26/mman.h
new file mode 100644
index 000000000000..cc27b8240265
--- /dev/null
+++ b/include/asm-arm26/mman.h
@@ -0,0 +1,43 @@
+#ifndef __ARM_MMAN_H__
+#define __ARM_MMAN_H__
+
+#define PROT_READ       0x1             /* page can be read */
+#define PROT_WRITE      0x2             /* page can be written */
+#define PROT_EXEC       0x4             /* page can be executed */
+#define PROT_SEM        0x8             /* page may be used for atomic ops */
+#define PROT_NONE       0x0             /* page can not be accessed */
+#define PROT_GROWSDOWN  0x01000000      /* mprotect flag: extend change to start of growsdown vma */
+#define PROT_GROWSUP    0x02000000      /* mprotect flag: extend change to end of growsup vma */
+
+#define MAP_SHARED      0x01            /* Share changes */
+#define MAP_PRIVATE     0x02            /* Changes are private */
+#define MAP_TYPE        0x0f            /* Mask for type of mapping */
+#define MAP_FIXED       0x10            /* Interpret addr exactly */
+#define MAP_ANONYMOUS   0x20            /* don't use a file */
+
+#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
+#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
+#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
+#define MAP_LOCKED      0x2000          /* pages are locked */
+#define MAP_NORESERVE   0x4000          /* don't check for reservations */
+#define MAP_POPULATE    0x8000          /* populate (prefault) page tables */
+#define MAP_NONBLOCK    0x10000         /* do not block on IO */
+
+#define MS_ASYNC        1               /* sync memory asynchronously */
+#define MS_INVALIDATE   2               /* invalidate the caches */
+#define MS_SYNC         4               /* synchronous memory sync */
+
+#define MCL_CURRENT     1               /* lock all current mappings */
+#define MCL_FUTURE      2               /* lock all future mappings */
+
+#define MADV_NORMAL     0x0             /* default page-in behavior */
+#define MADV_RANDOM     0x1             /* page-in minimum required */
+#define MADV_SEQUENTIAL 0x2             /* read-ahead aggressively */
+#define MADV_WILLNEED   0x3             /* pre-fault pages */
+#define MADV_DONTNEED   0x4             /* discard these pages */
+
+/* compatibility flags */
+#define MAP_ANON        MAP_ANONYMOUS
+#define MAP_FILE        0
+
+#endif /* __ARM_MMAN_H__ */
diff --git a/include/asm-arm26/mmu.h b/include/asm-arm26/mmu.h
new file mode 100644
index 000000000000..9b8d3d781a1e
--- /dev/null
+++ b/include/asm-arm26/mmu.h
@@ -0,0 +1,9 @@
+#ifndef __ARM_MMU_H
+#define __ARM_MMU_H
+
+/*
+ * The ARM doesn't have a mmu context
+ */
+typedef struct { } mm_context_t;
+
+#endif
diff --git a/include/asm-arm26/mmu_context.h b/include/asm-arm26/mmu_context.h
new file mode 100644
index 000000000000..1a929bfe5c3a
--- /dev/null
+++ b/include/asm-arm26/mmu_context.h
@@ -0,0 +1,51 @@
+/*
+ *  linux/include/asm-arm/mmu_context.h
+ *
+ *  Copyright (C) 1996 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Changelog:
+ *   27-06-1996 RMK     Created
+ */
+#ifndef __ASM_ARM_MMU_CONTEXT_H
+#define __ASM_ARM_MMU_CONTEXT_H
+
+#define init_new_context(tsk,mm)        0
+#define destroy_context(mm)             do { } while(0)
+
+/*
+ * This is called when "tsk" is about to enter lazy TLB mode.
+ *
+ * mm:  describes the currently active mm context
+ * tsk: task which is entering lazy tlb
+ * cpu: cpu number which is entering lazy tlb
+ *
+ * tsk->mm will be NULL
+ */
+static inline void
+enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
+{
+}
+
+/*
+ * This is the actual mm switch as far as the scheduler
+ * is concerned.  No registers are touched.
+ */
+static inline void
+switch_mm(struct mm_struct *prev, struct mm_struct *next,
+          struct task_struct *tsk)
+{
+        cpu_switch_mm(next->pgd, next);
+}
+
+#define deactivate_mm(tsk,mm)   do { } while (0)
+
+static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
+{
+        cpu_switch_mm(next->pgd, next);
+}
+
+#endif
diff --git a/include/asm-arm26/module.h b/include/asm-arm26/module.h
new file mode 100644
index 000000000000..1157f178daec
--- /dev/null
+++ b/include/asm-arm26/module.h
@@ -0,0 +1,7 @@
+#ifndef _ASM_ARM_MODULE_H
+#define _ASM_ARM_MODULE_H
+/*
+ * This file contains the arm architecture specific module code.
+ */
+
+#endif /* _ASM_ARM_MODULE_H */
diff --git a/include/asm-arm26/msgbuf.h b/include/asm-arm26/msgbuf.h
new file mode 100644
index 000000000000..33b35b946eaa
--- /dev/null
+++ b/include/asm-arm26/msgbuf.h
@@ -0,0 +1,31 @@
+#ifndef _ASMARM_MSGBUF_H
+#define _ASMARM_MSGBUF_H
+
+/* 
+ * The msqid64_ds structure for arm architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct msqid64_ds {
+        struct ipc64_perm msg_perm;
+        __kernel_time_t msg_stime;      /* last msgsnd time */
+        unsigned long   __unused1;
+        __kernel_time_t msg_rtime;      /* last msgrcv time */
+        unsigned long   __unused2;
+        __kernel_time_t msg_ctime;      /* last change time */
+        unsigned long   __unused3;
+        unsigned long  msg_cbytes;      /* current number of bytes on queue */
+        unsigned long  msg_qnum;        /* number of messages in queue */
+        unsigned long  msg_qbytes;      /* max number of bytes on queue */
+        __kernel_pid_t msg_lspid;       /* pid of last msgsnd */
+        __kernel_pid_t msg_lrpid;       /* last receive pid */
+        unsigned long  __unused4;
+        unsigned long  __unused5;
+};
+
+#endif /* _ASMARM_MSGBUF_H */
diff --git a/include/asm-arm26/namei.h b/include/asm-arm26/namei.h
new file mode 100644
index 000000000000..a402d3b9d0f7
--- /dev/null
+++ b/include/asm-arm26/namei.h
@@ -0,0 +1,25 @@
+/* 
+ * linux/include/asm-arm/namei.h
+ *
+ * Routines to handle famous /usr/gnemul
+ * Derived from the Sparc version of this file
+ *
+ * Included from linux/fs/namei.c
+ */
+
+#ifndef __ASMARM_NAMEI_H
+#define __ASMARM_NAMEI_H
+
+#define ARM_BSD_EMUL "usr/gnemul/bsd/"
+
+static inline char *__emul_prefix(void)
+{
+        switch (current->personality) {
+        case PER_BSD:
+                return ARM_BSD_EMUL;
+        default:
+                return NULL;
+        }
+}
+
+#endif /* __ASMARM_NAMEI_H */
diff --git a/include/asm-arm26/oldlatches.h b/include/asm-arm26/oldlatches.h
new file mode 100644
index 000000000000..bc87089b2152
--- /dev/null
+++ b/include/asm-arm26/oldlatches.h
@@ -0,0 +1,37 @@
+/*
+ *  linux/include/asm-arm/arch-arc/oldlatches.h
+ *
+ *  Copyright (C) 1996 Russell King, Dave Gilbert
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Modifications:
+ *   04-04-1998 PJB/RMK Merged arc and a5k versions
+ */
+#ifndef _ASM_ARCH_OLDLATCH_H
+#define _ASM_ARCH_OLDLATCH_H
+
+#define LATCHA_FDSEL0    (1<<0)
+#define LATCHA_FDSEL1    (1<<1)
+#define LATCHA_FDSEL2    (1<<2)
+#define LATCHA_FDSEL3    (1<<3)
+#define LATCHA_FDSELALL  (0xf)
+#define LATCHA_SIDESEL   (1<<4)
+#define LATCHA_MOTOR     (1<<5)
+#define LATCHA_INUSE     (1<<6)
+#define LATCHA_CHANGERST (1<<7)
+
+#define LATCHB_FDCDENSITY  (1<<1)
+#define LATCHB_FDCRESET    (1<<3)
+#define LATCHB_PRINTSTROBE (1<<4)
+
+/* newval=(oldval & mask)|newdata */
+void oldlatch_bupdate(unsigned char mask,unsigned char newdata);
+
+/* newval=(oldval & mask)|newdata */
+void oldlatch_aupdate(unsigned char mask,unsigned char newdata);
+
+#endif
+
diff --git a/include/asm-arm26/page.h b/include/asm-arm26/page.h
new file mode 100644
index 000000000000..c334079b082b
--- /dev/null
+++ b/include/asm-arm26/page.h
@@ -0,0 +1,115 @@
+#ifndef _ASMARM_PAGE_H
+#define _ASMARM_PAGE_H
+
+#include <linux/config.h>
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+extern void __clear_user_page(void *p, unsigned long user);
+extern void __copy_user_page(void *to, const void *from, unsigned long user);
+extern void copy_page(void *to, const void *from);
+
+//FIXME these may be wrong on ARM26
+#define clear_user_page(addr,vaddr,pg)                  \
+        do {                                            \
+                preempt_disable();                      \
+                __clear_user_page(addr, vaddr); \
+                preempt_enable();                       \
+        } while (0)
+
+#define copy_user_page(to,from,vaddr,pg)                \
+        do {                                            \
+                preempt_disable();                      \
+                __copy_user_page(to, from, vaddr);      \
+                preempt_enable();                       \
+        } while (0)
+
+#define clear_page(page)        memzero((void *)(page), PAGE_SIZE)
+#define copy_page(to, from)  __copy_user_page(to, from, 0);
+
+#undef STRICT_MM_TYPECHECKS
+
+#ifdef STRICT_MM_TYPECHECKS
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { unsigned long pgd; } pgd_t;
+typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long pmd; } pmd_t;
+typedef struct { unsigned long pgprot; } pgprot_t;
+
+#define pgd_val(x)      ((x).pgd)
+#define pte_val(x)      ((x).pte)
+#define pmd_val(x)      ((x).pmd)
+#define pgprot_val(x)   ((x).pgprot)
+
+#define __pte(x)        ((pte_t) { (x) } )
+#define __pmd(x)        ((pmd_t) { (x) } )
+#define __pgprot(x)     ((pgprot_t) { (x) } )
+
+#else
+/*
+ * .. while these make it easier on the compiler
+ */
+typedef unsigned long pgd_t;
+typedef unsigned long pte_t;
+typedef unsigned long pmd_t;
+typedef unsigned long pgprot_t;
+
+//FIXME - should these cast to unsigned long?
+#define pgd_val(x)      (x)
+#define pte_val(x)      (x)
+#define pmd_val(x)      (x)
+#define pgprot_val(x)   (x)
+
+#define __pte(x)        (x)
+#define __pmd(x)        (x)
+#define __pgprot(x)     (x)
+
+#endif /* STRICT_MM_TYPECHECKS */
+#endif /* !__ASSEMBLY__ */
+#endif /* __KERNEL__ */
+
+/* PAGE_SHIFT determines the page size.  This is configurable. */
+#if defined(CONFIG_PAGESIZE_16)
+#define PAGE_SHIFT      14              /* 16K */
+#else           /* default */
+#define PAGE_SHIFT      15              /* 32K */
+#endif
+
+#define EXEC_PAGESIZE   32768
+
+#define PAGE_SIZE               (1UL << PAGE_SHIFT)
+#define PAGE_MASK               (~(PAGE_SIZE-1))
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)        (((addr)+PAGE_SIZE-1)&PAGE_MASK)
+
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+/* Pure 2^n version of get_order */
+static inline int get_order(unsigned long size)
+{
+        int order;
+
+        size = (size-1) >> (PAGE_SHIFT-1);
+        order = -1;
+        do {
+                size >>= 1;
+                order++;
+        } while (size);
+        return order;
+}
+
+#include <asm/memory.h>
+
+#endif /* !__ASSEMBLY__ */
+
+#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE | VM_EXEC | \
+                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+#endif /* __KERNEL__ */
+
+#endif
diff --git a/include/asm-arm26/param.h b/include/asm-arm26/param.h
new file mode 100644
index 000000000000..6b1e52df542e
--- /dev/null
+++ b/include/asm-arm26/param.h
@@ -0,0 +1,33 @@
+/*
+ *  linux/include/asm-arm/param.h
+ *
+ *  Copyright (C) 1995-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_PARAM_H
+#define __ASM_PARAM_H
+
+#ifndef __KERNEL_HZ
+#define __KERNEL_HZ     100
+#endif
+
+#ifdef __KERNEL__
+# define HZ             __KERNEL_HZ     /* Internal kernel timer frequency */
+# define USER_HZ        100             /* User interfaces are in "ticks" */
+# define CLOCKS_PER_SEC (USER_HZ)       /* like times() */
+#else
+# define HZ             100
+#endif
+
+#ifndef NOGROUP
+#define NOGROUP         (-1)
+#endif
+
+/* max length of hostname */
+#define MAXHOSTNAMELEN  64
+
+#endif
+
diff --git a/include/asm-arm26/parport.h b/include/asm-arm26/parport.h
new file mode 100644
index 000000000000..f2f90c76ddd1
--- /dev/null
+++ b/include/asm-arm26/parport.h
@@ -0,0 +1,18 @@
+/*
+ *  linux/include/asm-arm/parport.h: ARM-specific parport initialisation
+ *
+ *  Copyright (C) 1999, 2000  Tim Waugh <tim@cyberelk.demon.co.uk>
+ *
+ * This file should only be included by drivers/parport/parport_pc.c.
+ */
+
+#ifndef __ASMARM_PARPORT_H
+#define __ASMARM_PARPORT_H
+
+static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
+static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
+{
+        return parport_pc_find_isa_ports (autoirq, autodma);
+}
+
+#endif /* !(_ASMARM_PARPORT_H) */
diff --git a/include/asm-arm26/pci.h b/include/asm-arm26/pci.h
new file mode 100644
index 000000000000..6ac67ed7718c
--- /dev/null
+++ b/include/asm-arm26/pci.h
@@ -0,0 +1,6 @@
+/* Should not be needed. IDE stupidity */
+/* JMA 18.05.03 - is kinda needed, if only to tell it we don't have a PCI bus */
+
+#define PCI_DMA_BUS_IS_PHYS             0
+#define pcibios_scan_all_fns(a, b)      0
+
diff --git a/include/asm-arm26/percpu.h b/include/asm-arm26/percpu.h
new file mode 100644
index 000000000000..b4e32d8ec072
--- /dev/null
+++ b/include/asm-arm26/percpu.h
@@ -0,0 +1,6 @@
+#ifndef __ARM_PERCPU
+#define __ARM_PERCPU
+
+#include <asm-generic/percpu.h>
+
+#endif
diff --git a/include/asm-arm26/pgalloc.h b/include/asm-arm26/pgalloc.h
new file mode 100644
index 000000000000..6437167b1ffe
--- /dev/null
+++ b/include/asm-arm26/pgalloc.h
@@ -0,0 +1,70 @@
+/*
+ *  linux/include/asm-arm/pgalloc.h
+ *
+ *  Copyright (C) 2000-2001 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASMARM_PGALLOC_H
+#define _ASMARM_PGALLOC_H
+
+#include <asm/processor.h>
+#include <asm/cacheflush.h>
+#include <asm/tlbflush.h>
+#include <linux/slab.h>
+
+extern kmem_cache_t *pte_cache;
+
+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr){
+        return kmem_cache_alloc(pte_cache, GFP_KERNEL);
+}
+
+static inline void pte_free_kernel(pte_t *pte){
+        if (pte)
+                kmem_cache_free(pte_cache, pte);
+}
+
+/*
+ * Populate the pmdp entry with a pointer to the pte.  This pmd is part
+ * of the mm address space.
+ *
+ * If 'mm' is the init tasks mm, then we are doing a vmalloc, and we
+ * need to set stuff up correctly for it.
+ */
+static inline void
+pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
+{
+//FIXME - is this doing the right thing?
+        set_pmd(pmdp, (unsigned long)ptep | 1/*FIXME _PMD_PRESENT*/);
+}
+
+/*
+ * FIXME - We use the old 2.5.5-rmk1 hack for this.
+ * This is not truly correct, but should be functional.
+ */
+#define pte_alloc_one(mm,addr)  ((struct page *)pte_alloc_one_kernel(mm,addr))
+#define pte_free(pte)           pte_free_kernel((pte_t *)pte)
+#define pmd_populate(mm,pmdp,ptep) pmd_populate_kernel(mm,pmdp,(pte_t *)ptep)
+
+/*
+ * Since we have only two-level page tables, these are trivial
+ * 
+ * trick __pmd_alloc into optimising away. The actual value is irrelevant though as it
+ * is thrown away. It just cant be zero. -IM
+ */
+
+#define pmd_alloc_one(mm,addr)          ({ BUG(); ((pmd_t *)2); })
+#define pmd_free(pmd)                   do { } while (0)
+#define pgd_populate(mm,pmd,pte)        BUG()
+
+extern pgd_t *get_pgd_slow(struct mm_struct *mm);
+extern void free_pgd_slow(pgd_t *pgd);
+
+#define pgd_alloc(mm)                   get_pgd_slow(mm)
+#define pgd_free(pgd)                   free_pgd_slow(pgd)
+
+#define check_pgt_cache()               do { } while (0)
+
+#endif
diff --git a/include/asm-arm26/pgtable.h b/include/asm-arm26/pgtable.h
new file mode 100644
index 000000000000..af0b8907dc14
--- /dev/null
+++ b/include/asm-arm26/pgtable.h
@@ -0,0 +1,305 @@
+/*
+ *  linux/include/asm-arm26/pgtable.h
+ *
+ *  Copyright (C) 2000-2002 Russell King
+ *  Copyright (C) 2003 Ian Molton
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASMARM_PGTABLE_H
+#define _ASMARM_PGTABLE_H
+
+#include <asm-generic/4level-fixup.h>
+
+#include <linux/config.h>
+#include <asm/memory.h>
+
+/*
+ * The table below defines the page protection levels that we insert into our
+ * Linux page table version.  These get translated into the best that the
+ * architecture can perform.  Note that on most ARM hardware:
+ *  1) We cannot do execute protection
+ *  2) If we could do execute protection, then read is implied
+ *  3) write implies read permissions
+ */
+#define __P000  PAGE_NONE
+#define __P001  PAGE_READONLY
+#define __P010  PAGE_COPY
+#define __P011  PAGE_COPY
+#define __P100  PAGE_READONLY
+#define __P101  PAGE_READONLY
+#define __P110  PAGE_COPY
+#define __P111  PAGE_COPY
+
+#define __S000  PAGE_NONE
+#define __S001  PAGE_READONLY
+#define __S010  PAGE_SHARED
+#define __S011  PAGE_SHARED
+#define __S100  PAGE_READONLY
+#define __S101  PAGE_READONLY
+#define __S110  PAGE_SHARED
+#define __S111  PAGE_SHARED
+
+/*
+ * PMD_SHIFT determines the size of the area a second-level page table can map
+ * PGDIR_SHIFT determines what a third-level page table entry can map
+ */
+#define PGD_SHIFT               25
+#define PMD_SHIFT               20
+
+#define PGD_SIZE                (1UL << PGD_SHIFT)
+#define PGD_MASK                (~(PGD_SIZE-1))
+#define PMD_SIZE                (1UL << PMD_SHIFT)
+#define PMD_MASK                (~(PMD_SIZE-1))
+
+/* The kernel likes to use these names for the above (ick) */
+#define PGDIR_SIZE PGD_SIZE
+#define PGDIR_MASK PGD_MASK
+
+#define PTRS_PER_PGD            32
+#define PTRS_PER_PMD            1
+#define PTRS_PER_PTE            32
+
+#define FIRST_USER_PGD_NR       1
+#define USER_PTRS_PER_PGD       ((TASK_SIZE/PGD_SIZE) - FIRST_USER_PGD_NR)
+
+// FIXME - WTF?
+#define LIBRARY_TEXT_START      0x0c000000
+
+
+
+#ifndef __ASSEMBLY__
+extern void __pte_error(const char *file, int line, unsigned long val);
+extern void __pmd_error(const char *file, int line, unsigned long val);
+extern void __pgd_error(const char *file, int line, unsigned long val);
+
+#define pte_ERROR(pte)          __pte_error(__FILE__, __LINE__, pte_val(pte))
+#define pmd_ERROR(pmd)          __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
+#define pgd_ERROR(pgd)          __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
+
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+extern struct page *empty_zero_page;
+#define ZERO_PAGE(vaddr)        (empty_zero_page)
+
+#define pte_pfn(pte)            (pte_val(pte) >> PAGE_SHIFT)
+#define pte_page(pte)           (pfn_to_page(pte_pfn(pte)))
+#define pfn_pte(pfn,prot)       (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)))
+#define pages_to_mb(x)          ((x) >> (20 - PAGE_SHIFT))
+#define mk_pte(page,prot)       pfn_pte(page_to_pfn(page),prot)
+#define page_pte_prot(page,prot)        mk_pte(page, prot)
+#define page_pte(page)          mk_pte(page, __pgprot(0))
+
+/*
+ * Terminology: PGD = Page Directory, PMD = Page Middle Directory,
+ *              PTE = Page Table Entry
+ *
+ * on arm26 we have no 2nd level page table. we simulate this by removing the
+ * PMD.
+ *
+ * pgd_none is 0 to prevernt pmd_alloc() calling __pmd_alloc(). This causes it
+ * to return pmd_offset(pgd,addr) which is a pointer to the pgd (IOW, a no-op).
+ *
+ * however, to work this way, whilst we are allocating 32 pgds, containing 32
+ * PTEs, the actual work is done on the PMDs, thus:
+ *
+ * instead of  mm->pgd->pmd->pte
+ * we have     mm->pgdpmd->pte
+ *
+ * IOW, think of PGD operations and PMD ones as being the same thing, just
+ * that PGD stuff deals with the mm_struct side of things, wheras PMD stuff
+ * deals with the pte side of things.
+ *
+ * additionally, we store some bits in the PGD and PTE pointers: 
+ * PGDs:
+ *   o The lowest (1) bit of the PGD is to determine if it is present or swap.
+ *   o The 2nd bit of the PGD is unused and must be zero.
+ *   o The top 6 bits of the PGD must be zero. 
+ * PTEs:
+ *   o The lower 5 bits of a pte are flags. bit 1 is the 'present' flag. The
+ *     others determine the pages attributes.
+ *
+ * the pgd_val, pmd_val, and pte_val macros seem to be private to our code.
+ * They get the RAW value of the PGD/PMD/PTE entry, including our flags
+ * encoded into the pointers.
+ * 
+ * The pgd_offset, pmd_offset, and pte_offset macros are used by the kernel,
+ * so they shouldnt have our flags attached.
+ *
+ * If you understood that, feel free to explain it to me...
+ *
+ */
+
+#define _PMD_PRESENT     (0x01)
+
+/* These definitions allow us to optimise out stuff like pmd_alloc() */
+#define pgd_none(pgd)           (0) 
+#define pgd_bad(pgd)            (0)
+#define pgd_present(pgd)        (1)
+#define pgd_clear(pgdp)         do { } while (0)
+
+/* Whilst these handle our actual 'page directory' (the agglomeration of pgd and pmd)
+ */
+#define pmd_none(pmd)           (!pmd_val(pmd))
+#define pmd_bad(pmd)            ((pmd_val(pmd) & 0xfc000002))
+#define pmd_present(pmd)        (pmd_val(pmd) & _PMD_PRESENT)
+#define set_pmd(pmd_ptr, pmd)   ((*(pmd_ptr)) = (pmd))
+#define pmd_clear(pmdp)         set_pmd(pmdp, __pmd(0))
+
+/* and these handle our pte tables */
+#define pte_none(pte)           (!pte_val(pte))
+#define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
+#define set_pte(pte_ptr, pte)   ((*(pte_ptr)) = (pte))
+#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
+#define pte_clear(mm,addr,ptep) set_pte_at((mm),(addr),(ptep), __pte(0))
+
+/* macros to ease the getting of pointers to stuff... */
+#define pgd_offset(mm, addr)    ((pgd_t *)(mm)->pgd        + __pgd_index(addr))
+#define pmd_offset(pgd, addr)   ((pmd_t *)(pgd))
+#define pte_offset(pmd, addr)   ((pte_t *)pmd_page(*(pmd)) + __pte_index(addr))
+
+/* there is no __pmd_index as we dont use pmds */
+#define __pgd_index(addr)       ((addr) >> PGD_SHIFT)
+#define __pte_index(addr)       (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+
+
+/* Keep the kernel happy */
+#define pgd_index(addr)         __pgd_index(addr)
+#define pgd_offset_k(addr)      (pgd_offset(&init_mm, addr))
+
+/*
+ * The vmalloc() routines leaves a hole of 4kB between each vmalloced
+ * area for the same reason. ;) FIXME: surely 1 page not 4k ?
+ */
+#define VMALLOC_START     0x01a00000
+#define VMALLOC_END       0x01c00000
+
+/* Is pmd_page supposed to return a pointer to a page in some arches? ours seems to
+ * return a pointer to memory (no special alignment)
+ */
+#define pmd_page(pmd)  ((struct page *)(pmd_val((pmd)) & ~_PMD_PRESENT))
+#define pmd_page_kernel(pmd) ((pte_t *)(pmd_val((pmd)) & ~_PMD_PRESENT))
+
+#define pte_offset_kernel(dir,addr)     (pmd_page_kernel(*(dir)) + __pte_index(addr))
+
+#define pte_offset_map(dir,addr)        (pmd_page_kernel(*(dir)) + __pte_index(addr))
+#define pte_offset_map_nested(dir,addr) (pmd_page_kernel(*(dir)) + __pte_index(addr))
+#define pte_unmap(pte)                  do { } while (0)
+#define pte_unmap_nested(pte)           do { } while (0)
+
+
+#define _PAGE_PRESENT   0x01
+#define _PAGE_READONLY  0x02
+#define _PAGE_NOT_USER  0x04
+#define _PAGE_OLD       0x08
+#define _PAGE_CLEAN     0x10
+
+// an old page has never been read.
+// a clean page has never been written.
+
+/*                               -- present --   -- !dirty --  --- !write ---   ---- !user --- */
+#define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY | _PAGE_NOT_USER)
+#define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_CLEAN                                  )
+#define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY                 )
+#define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY                 )
+#define PAGE_KERNEL     __pgprot(_PAGE_PRESENT                                | _PAGE_NOT_USER)
+
+#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_OLD | _PAGE_CLEAN)
+
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not..
+ */
+#define pte_read(pte)                   (!(pte_val(pte) & _PAGE_NOT_USER))
+#define pte_write(pte)                  (!(pte_val(pte) & _PAGE_READONLY))
+#define pte_exec(pte)                   (!(pte_val(pte) & _PAGE_NOT_USER))
+#define pte_dirty(pte)                  (!(pte_val(pte) & _PAGE_CLEAN))
+#define pte_young(pte)                  (!(pte_val(pte) & _PAGE_OLD))
+//ONLY when !pte_present() I think. nicked from arm32 (FIXME!)
+#define pte_file(pte)                   (!(pte_val(pte) & _PAGE_OLD))
+
+#define PTE_BIT_FUNC(fn,op)                     \
+static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
+
+PTE_BIT_FUNC(wrprotect, |=  _PAGE_READONLY);
+PTE_BIT_FUNC(mkwrite,   &= ~_PAGE_READONLY);
+PTE_BIT_FUNC(exprotect, |=  _PAGE_NOT_USER);
+PTE_BIT_FUNC(mkexec,    &= ~_PAGE_NOT_USER);
+PTE_BIT_FUNC(mkclean,   |=  _PAGE_CLEAN);
+PTE_BIT_FUNC(mkdirty,   &= ~_PAGE_CLEAN);
+PTE_BIT_FUNC(mkold,     |=  _PAGE_OLD);
+PTE_BIT_FUNC(mkyoung,   &= ~_PAGE_OLD);
+
+/*
+ * We don't store cache state bits in the page table here. FIXME - or do we?
+ */
+#define pgprot_noncached(prot)  (prot)
+#define pgprot_writecombine(prot) (prot) //FIXME - is a no-op?
+
+extern void pgtable_cache_init(void);
+
+//FIXME - nicked from arm32 and brutally hacked. probably wrong.
+#define pte_to_pgoff(x) (pte_val(x) >> 2)
+#define pgoff_to_pte(x) __pte(((x) << 2) & ~_PAGE_OLD)
+
+//FIXME - next line borrowed from arm32. is it right?
+#define PTE_FILE_MAX_BITS       30
+
+
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+        pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
+        return pte;
+}
+
+extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
+
+/* Encode and decode a swap entry.
+ *
+ * We support up to 32GB of swap on 4k machines
+ */
+#define __swp_type(x)           (((x).val >> 2) & 0x7f)
+#define __swp_offset(x)         ((x).val >> 9)
+#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 9) })
+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
+
+/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
+/* FIXME: this is not correct */
+#define kern_addr_valid(addr)   (1)
+
+/*
+ * Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ */
+static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
+{
+        pte_t pte;
+        pte_val(pte) = physpage | pgprot_val(pgprot);
+        return pte;
+}
+
+
+#include <asm-generic/pgtable.h>
+
+/*
+ * remap a physical address `phys' of size `size' with page protection `prot'
+ * into virtual address `from'
+ */
+#define io_remap_page_range(vma,from,phys,size,prot) \
+                remap_pfn_range(vma, from, (phys) >> PAGE_SHIFT, size, prot)
+
+#define io_remap_pfn_range(vma,from,pfn,size,prot) \
+                remap_pfn_range(vma, from, pfn, size, prot)
+
+#define MK_IOSPACE_PFN(space, pfn)      (pfn)
+#define GET_IOSPACE(pfn)                0
+#define GET_PFN(pfn)                    (pfn)
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _ASMARM_PGTABLE_H */
diff --git a/include/asm-arm26/poll.h b/include/asm-arm26/poll.h
new file mode 100644
index 000000000000..fdfdab064a65
--- /dev/null
+++ b/include/asm-arm26/poll.h
@@ -0,0 +1,25 @@
+#ifndef __ASMARM_POLL_H
+#define __ASMARM_POLL_H
+
+/* These are specified by iBCS2 */
+#define POLLIN          0x0001
+#define POLLPRI         0x0002
+#define POLLOUT         0x0004
+#define POLLERR         0x0008
+#define POLLHUP         0x0010
+#define POLLNVAL        0x0020
+
+/* The rest seem to be more-or-less nonstandard. Check them! */
+#define POLLRDNORM      0x0040
+#define POLLRDBAND      0x0080
+#define POLLWRNORM      0x0100
+#define POLLWRBAND      0x0200
+#define POLLMSG         0x0400
+
+struct pollfd {
+        int fd;
+        short events;
+        short revents;
+};
+
+#endif
diff --git a/include/asm-arm26/posix_types.h b/include/asm-arm26/posix_types.h
new file mode 100644
index 000000000000..b88344ad390c
--- /dev/null
+++ b/include/asm-arm26/posix_types.h
@@ -0,0 +1,80 @@
+/*
+ *  linux/include/asm-arm/posix_types.h
+ *
+ *  Copyright (C) 1996-1998 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Changelog:
+ *   27-06-1996 RMK     Created
+ */
+#ifndef __ARCH_ARM_POSIX_TYPES_H
+#define __ARCH_ARM_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc.  Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned long           __kernel_ino_t;
+typedef unsigned short          __kernel_mode_t;
+typedef unsigned short          __kernel_nlink_t;
+typedef long                    __kernel_off_t;
+typedef int                     __kernel_pid_t;
+typedef unsigned short          __kernel_ipc_pid_t;
+typedef unsigned short          __kernel_uid_t;
+typedef unsigned short          __kernel_gid_t;
+typedef unsigned int            __kernel_size_t;
+typedef int                     __kernel_ssize_t;
+typedef int                     __kernel_ptrdiff_t;
+typedef long                    __kernel_time_t;
+typedef long                    __kernel_suseconds_t;
+typedef long                    __kernel_clock_t;
+typedef int                     __kernel_timer_t;
+typedef int                     __kernel_clockid_t;
+typedef int                     __kernel_daddr_t;
+typedef char *                  __kernel_caddr_t;
+typedef unsigned short          __kernel_uid16_t;
+typedef unsigned short          __kernel_gid16_t;
+typedef unsigned int            __kernel_uid32_t;
+typedef unsigned int            __kernel_gid32_t;
+
+typedef unsigned short          __kernel_old_uid_t;
+typedef unsigned short          __kernel_old_gid_t;
+
+#ifdef __GNUC__
+typedef long long               __kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+        int     val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+        int     __val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+#undef  __FD_SET
+#define __FD_SET(fd, fdsetp) \
+                (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] |= (1<<((fd) & 31)))
+
+#undef  __FD_CLR
+#define __FD_CLR(fd, fdsetp) \
+                (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] &= ~(1<<((fd) & 31)))
+
+#undef  __FD_ISSET
+#define __FD_ISSET(fd, fdsetp) \
+                ((((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] & (1<<((fd) & 31))) != 0)
+
+#undef  __FD_ZERO
+#define __FD_ZERO(fdsetp) \
+                (memset ((fdsetp), 0, sizeof (*(fd_set *)(fdsetp))))
+
+#endif
+
+#endif
diff --git a/include/asm-arm26/proc-fns.h b/include/asm-arm26/proc-fns.h
new file mode 100644
index 000000000000..a83100454055
--- /dev/null
+++ b/include/asm-arm26/proc-fns.h
@@ -0,0 +1,49 @@
+/*
+ *  linux/include/asm-arm26/proc-fns.h
+ *
+ *  Copyright (C) 2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASSEMBLY__
+
+#include <asm/page.h>
+
+/*
+ * Don't change this structure - ASM code
+ * relies on it.
+ */
+extern struct processor {
+        /* check for any bugs */
+        void (*_check_bugs)(void);
+        /* Set up any processor specifics */
+        void (*_proc_init)(void);
+        /* Disable any processor specifics */
+        void (*_proc_fin)(void);
+        /* set the MEMC hardware mappings */
+        void (*_set_pgd)(pgd_t *pgd);
+        /* XCHG */
+        unsigned long (*_xchg_1)(unsigned long x, volatile void *ptr);
+        unsigned long (*_xchg_4)(unsigned long x, volatile void *ptr);
+} processor;
+
+extern const struct processor arm2_processor_functions;
+extern const struct processor arm250_processor_functions;
+extern const struct processor arm3_processor_functions;
+
+#define cpu_check_bugs()                        processor._check_bugs()
+#define cpu_proc_init()                         processor._proc_init()
+#define cpu_proc_fin()                          processor._proc_fin()
+#define cpu_do_idle()                           do { } while (0)
+#define cpu_switch_mm(pgd,mm)                   processor._set_pgd(pgd)
+#define cpu_xchg_1(x,ptr)                       processor._xchg_1(x,ptr)
+#define cpu_xchg_4(x,ptr)                       processor._xchg_4(x,ptr)
+
+
+//FIXME - these shouldnt be in proc-fn.h
+extern void cpu_memc_update_all(pgd_t *pgd);
+extern void cpu_memc_update_entry(pgd_t *pgd, unsigned long phys_pte, unsigned long log_addr);
+
+#endif
diff --git a/include/asm-arm26/processor.h b/include/asm-arm26/processor.h
new file mode 100644
index 000000000000..1d2d5f7b467b
--- /dev/null
+++ b/include/asm-arm26/processor.h
@@ -0,0 +1,113 @@
+/*
+ *  linux/include/asm-arm26/processor.h
+ *
+ *  Copyright (C) 1995 Russell King
+ *  Copyright (C) 2003 Ian Molton
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_PROCESSOR_H
+#define __ASM_ARM_PROCESSOR_H
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ __label__ _l; _l: &&_l;})
+
+#ifdef __KERNEL__
+
+#include <asm/atomic.h>
+#include <asm/ptrace.h>
+#include <linux/string.h>
+
+#define KERNEL_STACK_SIZE 4096
+
+typedef struct {
+        void (*put_byte)(void);               /* Special calling convention */
+        void (*get_byte)(void);               /* Special calling convention */
+        void (*put_half)(void);               /* Special calling convention */
+        void (*get_half)(void);               /* Special calling convention */
+        void (*put_word)(void);               /* Special calling convention */
+        void (*get_word)(void);               /* Special calling convention */
+        void (*put_dword)(void);              /* Special calling convention */
+        unsigned long (*copy_from_user)(void *to, const void *from, unsigned long sz);
+        unsigned long (*copy_to_user)(void *to, const void *from, unsigned long sz);
+        unsigned long (*clear_user)(void *addr, unsigned long sz);
+        unsigned long (*strncpy_from_user)(char *to, const char *from, unsigned long sz);
+        unsigned long (*strnlen_user)(const char *s, long n);
+} uaccess_t;
+
+extern uaccess_t uaccess_user, uaccess_kernel;
+
+#define EXTRA_THREAD_STRUCT                     \
+        uaccess_t       *uaccess;         /* User access functions*/
+
+#define EXTRA_THREAD_STRUCT_INIT                \
+        .uaccess        = &uaccess_kernel,
+
+// FIXME?!!
+
+#define start_thread(regs,pc,sp)                                        \
+({                                                                      \
+        unsigned long *stack = (unsigned long *)sp;                     \
+        set_fs(USER_DS);                                                \
+        memzero(regs->uregs, sizeof (regs->uregs));                     \
+        regs->ARM_pc = pc | ~0xfc000003;        /* pc */                \
+        regs->ARM_sp = sp;              /* sp */                        \
+        regs->ARM_r2 = stack[2];        /* r2 (envp) */                 \
+        regs->ARM_r1 = stack[1];        /* r1 (argv) */                 \
+        regs->ARM_r0 = stack[0];        /* r0 (argc) */                 \
+})
+
+#define KSTK_EIP(tsk)   (((unsigned long *)(4096+(unsigned long)(tsk)))[1020])
+#define KSTK_ESP(tsk)   (((unsigned long *)(4096+(unsigned long)(tsk)))[1018])
+
+struct debug_entry {
+        u32                     address;
+        u32                     insn;
+};
+
+struct debug_info {
+        int                     nsaved;
+        struct debug_entry      bp[2];
+};
+
+struct thread_struct {
+                                                        /* fault info     */
+        unsigned long                   address;
+        unsigned long                   trap_no;
+        unsigned long                   error_code;
+                                                        /* debugging      */
+        struct debug_info               debug;
+        EXTRA_THREAD_STRUCT
+};
+
+#define INIT_THREAD  { \
+EXTRA_THREAD_STRUCT_INIT \
+}
+
+/* Forward declaration, a strange C thing */
+struct task_struct;
+
+/* Free all resources held by a thread. */
+extern void release_thread(struct task_struct *);
+
+unsigned long get_wchan(struct task_struct *p);
+
+#define cpu_relax()                     barrier()
+
+/* Prepare to copy thread state - unlazy all lazy status */
+#define prepare_to_copy(tsk)    do { } while (0)
+
+/*
+ * Create a new kernel thread
+ */
+extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
+
+#endif
+
+#endif /* __ASM_ARM_PROCESSOR_H */
diff --git a/include/asm-arm26/procinfo.h b/include/asm-arm26/procinfo.h
new file mode 100644
index 000000000000..b28624db69ff
--- /dev/null
+++ b/include/asm-arm26/procinfo.h
@@ -0,0 +1,56 @@
+/*
+ *  linux/include/asm-arm/procinfo.h
+ *
+ *  Copyright (C) 1996-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_PROCINFO_H
+#define __ASM_PROCINFO_H
+
+#ifndef __ASSEMBLY__
+
+//struct processor;
+//struct cpu_user_fns;
+
+struct proc_info_item {
+        const char       *manufacturer;
+        const char       *cpu_name;
+};
+
+/*
+ * Note!  struct processor is always defined if we're
+ * using MULTI_CPU, otherwise this entry is unused,
+ * but still exists.
+ *
+ * NOTE! The following structure is defined by assembly
+ * language, NOT C code.  For more information, check:
+ *  arch/arm/mm/proc-*.S and arch/arm/kernel/head-armv.S
+ */
+struct proc_info_list {
+        unsigned int            cpu_val;
+        unsigned int            cpu_mask;
+        const char              *arch_name;
+        const char              *elf_name;
+        unsigned int            elf_hwcap;
+        struct proc_info_item   *info;
+        struct processor        *proc;
+};
+
+#endif  /* __ASSEMBLY__ */
+
+#define PROC_INFO_SZ    48
+
+#define HWCAP_SWP       1
+#define HWCAP_HALF      2
+#define HWCAP_THUMB     4
+#define HWCAP_26BIT     8       /* Play it safe */
+#define HWCAP_FAST_MULT 16
+#define HWCAP_FPA       32
+#define HWCAP_VFP       64
+#define HWCAP_EDSP      128
+#define HWCAP_JAVA      256
+
+#endif
diff --git a/include/asm-arm26/ptrace.h b/include/asm-arm26/ptrace.h
new file mode 100644
index 000000000000..6a46b5ae1156
--- /dev/null
+++ b/include/asm-arm26/ptrace.h
@@ -0,0 +1,104 @@
+#ifndef __ASM_ARM_PTRACE_H
+#define __ASM_ARM_PTRACE_H
+
+#define PTRACE_GETREGS          12
+#define PTRACE_SETREGS          13
+#define PTRACE_GETFPREGS        14
+#define PTRACE_SETFPREGS        15
+#define PTRACE_OLDSETOPTIONS    21
+
+/* options set using PTRACE_SETOPTIONS */
+#define PTRACE_O_TRACESYSGOOD   0x00000001
+
+#define MODE_USR26      0x00000000
+#define MODE_FIQ26      0x00000001
+#define MODE_IRQ26      0x00000002
+#define MODE_SVC26      0x00000003
+#define MODE_MASK       0x00000003
+
+#define PSR_F_BIT       0x04000000
+#define PSR_I_BIT       0x08000000
+#define PSR_V_BIT       0x10000000
+#define PSR_C_BIT       0x20000000
+#define PSR_Z_BIT       0x40000000
+#define PSR_N_BIT       0x80000000
+
+#define PCMASK          0xfc000003
+
+
+#ifndef __ASSEMBLY__
+
+#define pc_pointer(v) ((v) & ~PCMASK)   /* convert v to pc type address */
+#define instruction_pointer(regs) (pc_pointer((regs)->ARM_pc)) /* get pc */
+#define profile_pc(regs) instruction_pointer(regs)
+
+/* this struct defines the way the registers are stored on the
+   stack during a system call. */
+
+struct pt_regs {
+        long uregs[17];
+};
+
+#define ARM_pc          uregs[15]
+#define ARM_lr          uregs[14]
+#define ARM_sp          uregs[13]
+#define ARM_ip          uregs[12]
+#define ARM_fp          uregs[11]
+#define ARM_r10         uregs[10]
+#define ARM_r9          uregs[9]
+#define ARM_r8          uregs[8]
+#define ARM_r7          uregs[7]
+#define ARM_r6          uregs[6]
+#define ARM_r5          uregs[5]
+#define ARM_r4          uregs[4]
+#define ARM_r3          uregs[3]
+#define ARM_r2          uregs[2]
+#define ARM_r1          uregs[1]
+#define ARM_r0          uregs[0]
+#define ARM_ORIG_r0     uregs[16]
+
+#ifdef __KERNEL__
+
+#define processor_mode(regs) \
+        ((regs)->ARM_pc & MODE_MASK)
+
+#define user_mode(regs) \
+        (processor_mode(regs) == MODE_USR26)
+
+#define interrupts_enabled(regs) \
+        (!((regs)->ARM_pc & PSR_I_BIT))
+
+#define fast_interrupts_enabled(regs) \
+        (!((regs)->ARM_pc & PSR_F_BIT))
+
+#define condition_codes(regs) \
+        ((regs)->ARM_pc & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT))
+
+/* Are the current registers suitable for user mode?
+ * (used to maintain security in signal handlers)
+ */
+static inline int valid_user_regs(struct pt_regs *regs)
+{
+        if (user_mode(regs) &&
+            (regs->ARM_pc & (PSR_F_BIT | PSR_I_BIT)) == 0)
+                return 1;
+
+        /*
+         * force it to be something sensible
+         */
+        regs->ARM_pc &= ~(MODE_MASK | PSR_F_BIT | PSR_I_BIT);
+
+        return 0;
+}
+
+extern void show_regs(struct pt_regs *);
+
+#define predicate(x)    (x & 0xf0000000)
+#define PREDICATE_ALWAYS        0xe0000000
+
+#endif  /* __KERNEL__ */
+
+#endif  /* __ASSEMBLY__ */
+
+#endif
+
diff --git a/include/asm-arm26/resource.h b/include/asm-arm26/resource.h
new file mode 100644
index 000000000000..734b581b5b6a
--- /dev/null
+++ b/include/asm-arm26/resource.h
@@ -0,0 +1,6 @@
+#ifndef _ARM_RESOURCE_H
+#define _ARM_RESOURCE_H
+
+#include <asm-generic/resource.h>
+
+#endif
diff --git a/include/asm-arm26/scatterlist.h b/include/asm-arm26/scatterlist.h
new file mode 100644
index 000000000000..d9c056c7784e
--- /dev/null
+++ b/include/asm-arm26/scatterlist.h
@@ -0,0 +1,26 @@
+#ifndef _ASMARM_SCATTERLIST_H
+#define _ASMARM_SCATTERLIST_H
+
+#include <asm/types.h>
+
+struct scatterlist {
+        struct page     *page;          /* buffer page                   */
+        unsigned int    offset;         /* buffer offset                 */
+        dma_addr_t      dma_address;    /* dma address                   */
+        unsigned int    length;         /* length                        */
+        char            *__address;     /* for set_dma_addr              */
+};
+
+/*
+ * These macros should be used after a pci_map_sg call has been done
+ * to get bus addresses of each of the SG entries and their lengths.
+ * You should only work with the number of sg entries pci_map_sg
+ * returns, or alternatively stop on the first sg_dma_len(sg) which
+ * is 0.
+ */
+#define sg_dma_address(sg)      ((sg)->dma_address)
+#define sg_dma_len(sg)          ((sg)->length)
+
+#define ISA_DMA_THRESHOLD (0xffffffff)
+
+#endif /* _ASMARM_SCATTERLIST_H */
diff --git a/include/asm-arm26/sections.h b/include/asm-arm26/sections.h
new file mode 100644
index 000000000000..10b6370efad0
--- /dev/null
+++ b/include/asm-arm26/sections.h
@@ -0,0 +1,2 @@
+//FIXME - nicked from arm32 - check its correct.
+#include <asm-generic/sections.h>
diff --git a/include/asm-arm26/segment.h b/include/asm-arm26/segment.h
new file mode 100644
index 000000000000..9e24c21f6304
--- /dev/null
+++ b/include/asm-arm26/segment.h
@@ -0,0 +1,11 @@
+#ifndef __ASM_ARM_SEGMENT_H
+#define __ASM_ARM_SEGMENT_H
+
+#define __KERNEL_CS   0x0
+#define __KERNEL_DS   0x0
+
+#define __USER_CS     0x1
+#define __USER_DS     0x1
+
+#endif /* __ASM_ARM_SEGMENT_H */
+
diff --git a/include/asm-arm26/semaphore-helper.h b/include/asm-arm26/semaphore-helper.h
new file mode 100644
index 000000000000..1d7f1987edb9
--- /dev/null
+++ b/include/asm-arm26/semaphore-helper.h
@@ -0,0 +1,84 @@
+#ifndef ASMARM_SEMAPHORE_HELPER_H
+#define ASMARM_SEMAPHORE_HELPER_H
+
+/*
+ * These two _must_ execute atomically wrt each other.
+ */
+static inline void wake_one_more(struct semaphore * sem)
+{
+        unsigned long flags;
+
+        spin_lock_irqsave(&semaphore_wake_lock, flags);
+        if (atomic_read(&sem->count) <= 0)
+                sem->waking++;
+        spin_unlock_irqrestore(&semaphore_wake_lock, flags);
+}
+
+static inline int waking_non_zero(struct semaphore *sem)
+{
+        unsigned long flags;
+        int ret = 0;
+
+        spin_lock_irqsave(&semaphore_wake_lock, flags);
+        if (sem->waking > 0) {
+                sem->waking--;
+                ret = 1;
+        }
+        spin_unlock_irqrestore(&semaphore_wake_lock, flags);
+        return ret;
+}
+
+/*
+ * waking non zero interruptible
+ *      1       got the lock
+ *      0       go to sleep
+ *      -EINTR  interrupted
+ *
+ * We must undo the sem->count down_interruptible() increment while we are
+ * protected by the spinlock in order to make this atomic_inc() with the
+ * atomic_read() in wake_one_more(), otherwise we can race. -arca
+ */
+static inline int waking_non_zero_interruptible(struct semaphore *sem,
+                                                struct task_struct *tsk)
+{
+        unsigned long flags;
+        int ret = 0;
+
+        spin_lock_irqsave(&semaphore_wake_lock, flags);
+        if (sem->waking > 0) {
+                sem->waking--;
+                ret = 1;
+        } else if (signal_pending(tsk)) {
+                atomic_inc(&sem->count);
+                ret = -EINTR;
+        }
+        spin_unlock_irqrestore(&semaphore_wake_lock, flags);
+        return ret;     
+}
+
+/*
+ * waking_non_zero_try_lock:
+ *      1       failed to lock
+ *      0       got the lock
+ *
+ * We must undo the sem->count down_interruptible() increment while we are
+ * protected by the spinlock in order to make this atomic_inc() with the
+ * atomic_read() in wake_one_more(), otherwise we can race. -arca
+ */
+static inline int waking_non_zero_trylock(struct semaphore *sem)
+{
+        unsigned long flags;
+        int ret = 1;
+
+        spin_lock_irqsave(&semaphore_wake_lock, flags);
+        if (sem->waking <= 0)
+                atomic_inc(&sem->count);
+        else {
+                sem->waking--;
+                ret = 0;
+        }
+        spin_unlock_irqrestore(&semaphore_wake_lock, flags);
+        return ret;
+}
+
+#endif
diff --git a/include/asm-arm26/semaphore.h b/include/asm-arm26/semaphore.h
new file mode 100644
index 000000000000..c1b6a1edad92
--- /dev/null
+++ b/include/asm-arm26/semaphore.h
@@ -0,0 +1,103 @@
+/*
+ * linux/include/asm-arm/semaphore.h
+ */
+#ifndef __ASM_ARM_SEMAPHORE_H
+#define __ASM_ARM_SEMAPHORE_H
+
+#include <linux/linkage.h>
+#include <linux/spinlock.h>
+#include <linux/wait.h>
+#include <linux/rwsem.h>
+
+#include <asm/atomic.h>
+#include <asm/locks.h>
+
+struct semaphore {
+        atomic_t count;
+        int sleepers;
+        wait_queue_head_t wait;
+};
+
+#define __SEMAPHORE_INIT(name, n)                                       \
+{                                                                       \
+        .count          = ATOMIC_INIT(n),                               \
+        .sleepers       = 0,                                            \
+        .wait           = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait),   \
+}
+
+#define __MUTEX_INITIALIZER(name) \
+        __SEMAPHORE_INIT(name,1)
+
+#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
+        struct semaphore name = __SEMAPHORE_INIT(name,count)
+
+#define DECLARE_MUTEX(name)             __DECLARE_SEMAPHORE_GENERIC(name,1)
+#define DECLARE_MUTEX_LOCKED(name)      __DECLARE_SEMAPHORE_GENERIC(name,0)
+
+static inline void sema_init(struct semaphore *sem, int val)
+{
+        atomic_set(&sem->count, val);
+        sem->sleepers = 0;
+        init_waitqueue_head(&sem->wait);
+}
+
+static inline void init_MUTEX(struct semaphore *sem)
+{
+        sema_init(sem, 1);
+}
+
+static inline void init_MUTEX_LOCKED(struct semaphore *sem)
+{
+        sema_init(sem, 0);
+}
+
+/*
+ * special register calling convention
+ */
+asmlinkage void __down_failed(void);
+asmlinkage int  __down_interruptible_failed(void);
+asmlinkage int  __down_trylock_failed(void);
+asmlinkage void __up_wakeup(void);
+
+extern void __down(struct semaphore * sem);
+extern int  __down_interruptible(struct semaphore * sem);
+extern int  __down_trylock(struct semaphore * sem);
+extern void __up(struct semaphore * sem);
+
+/*
+ * This is ugly, but we want the default case to fall through.
+ * "__down" is the actual routine that waits...
+ */
+static inline void down(struct semaphore * sem)
+{
+        might_sleep();
+        __down_op(sem, __down_failed);
+}
+
+/*
+ * This is ugly, but we want the default case to fall through.
+ * "__down_interruptible" is the actual routine that waits...
+ */
+static inline int down_interruptible (struct semaphore * sem)
+{
+        might_sleep();
+        return __down_op_ret(sem, __down_interruptible_failed);
+}
+
+static inline int down_trylock(struct semaphore *sem)
+{
+        return __down_op_ret(sem, __down_trylock_failed);
+}
+
+/*
+ * Note! This is subtle. We jump to wake people up only if
+ * the semaphore was negative (== somebody was waiting on it).
+ * The default case (no contention) will result in NO
+ * jumps for both down() and up().
+ */
+static inline void up(struct semaphore * sem)
+{
+        __up_op(sem, __up_wakeup);
+}
+
+#endif
diff --git a/include/asm-arm26/sembuf.h b/include/asm-arm26/sembuf.h
new file mode 100644
index 000000000000..1c0283954289
--- /dev/null
+++ b/include/asm-arm26/sembuf.h
@@ -0,0 +1,25 @@
+#ifndef _ASMARM_SEMBUF_H
+#define _ASMARM_SEMBUF_H
+
+/* 
+ * The semid64_ds structure for arm architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct semid64_ds {
+        struct ipc64_perm sem_perm;             /* permissions .. see ipc.h */
+        __kernel_time_t sem_otime;              /* last semop time */
+        unsigned long   __unused1;
+        __kernel_time_t sem_ctime;              /* last change time */
+        unsigned long   __unused2;
+        unsigned long   sem_nsems;              /* no. of semaphores in array */
+        unsigned long   __unused3;
+        unsigned long   __unused4;
+};
+
+#endif /* _ASMARM_SEMBUF_H */
diff --git a/include/asm-arm26/serial.h b/include/asm-arm26/serial.h
new file mode 100644
index 000000000000..21e1df31f086
--- /dev/null
+++ b/include/asm-arm26/serial.h
@@ -0,0 +1,63 @@
+/*
+ *  linux/include/asm-arm/serial.h
+ *
+ *  Copyright (C) 1996 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Changelog:
+ *   15-10-1996 RMK     Created
+ */
+
+#ifndef __ASM_SERIAL_H
+#define __ASM_SERIAL_H
+
+#include <linux/config.h>
+
+/*
+ * This assumes you have a 1.8432 MHz clock for your UART.
+ *
+ * It'd be nice if someone built a serial card with a 24.576 MHz
+ * clock, since the 16550A is capable of handling a top speed of 1.5
+ * megabits/second; but this requires the faster clock.
+ */
+#define BASE_BAUD (1843200 / 16)
+
+#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
+
+#if defined(CONFIG_ARCH_A5K)
+     /* UART CLK        PORT  IRQ     FLAGS        */
+
+#define STD_SERIAL_PORT_DEFNS                                           \
+        { 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS },     /* ttyS0 */     \
+        { 0, BASE_BAUD, 0x2F8, 10, STD_COM_FLAGS },     /* ttyS1 */
+
+#else
+
+#define STD_SERIAL_PORT_DEFNS                                           \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS0 */     \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS1 */
+
+#endif
+
+#define EXTRA_SERIAL_PORT_DEFNS \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS2 */     \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS3 */     \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS4 */     \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS5 */     \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS6 */     \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS7 */     \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS8 */     \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS9 */     \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS10 */    \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS11 */    \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS12 */    \
+        { 0, BASE_BAUD, 0    ,  0, STD_COM_FLAGS },     /* ttyS13 */
+
+#define SERIAL_PORT_DFNS                \
+        STD_SERIAL_PORT_DEFNS           \
+        EXTRA_SERIAL_PORT_DEFNS
+
+#endif
diff --git a/include/asm-arm26/setup.h b/include/asm-arm26/setup.h
new file mode 100644
index 000000000000..6348931be65d
--- /dev/null
+++ b/include/asm-arm26/setup.h
@@ -0,0 +1,205 @@
+/*
+ *  linux/include/asm/setup.h
+ *
+ *  Copyright (C) 1997-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Structure passed to kernel to tell it about the
+ *  hardware it's running on.  See Documentation/arm/Setup
+ *  for more info.
+ */
+#ifndef __ASMARM_SETUP_H
+#define __ASMARM_SETUP_H
+
+#define COMMAND_LINE_SIZE 1024
+
+/* The list ends with an ATAG_NONE node. */
+#define ATAG_NONE       0x00000000
+
+struct tag_header {
+        u32 size;
+        u32 tag;
+};
+
+/* The list must start with an ATAG_CORE node */
+#define ATAG_CORE       0x54410001
+
+struct tag_core {
+        u32 flags;              /* bit 0 = read-only */
+        u32 pagesize;
+        u32 rootdev;
+};
+
+/* it is allowed to have multiple ATAG_MEM nodes */
+#define ATAG_MEM        0x54410002
+
+struct tag_mem32 {
+        u32     size;
+        u32     start;  /* physical start address */
+};
+
+/* VGA text type displays */
+#define ATAG_VIDEOTEXT  0x54410003
+
+struct tag_videotext {
+        u8              x;
+        u8              y;
+        u16             video_page;
+        u8              video_mode;
+        u8              video_cols;
+        u16             video_ega_bx;
+        u8              video_lines;
+        u8              video_isvga;
+        u16             video_points;
+};
+
+/* describes how the ramdisk will be used in kernel */
+#define ATAG_RAMDISK    0x54410004
+
+struct tag_ramdisk {
+        u32 flags;      /* bit 0 = load, bit 1 = prompt */
+        u32 size;       /* decompressed ramdisk size in _kilo_ bytes */
+        u32 start;      /* starting block of floppy-based RAM disk image */
+};
+
+/* describes where the compressed ramdisk image lives */
+/*
+ * this one accidentally used virtual addresses - as such,
+ * its depreciated.
+ */
+#define ATAG_INITRD     0x54410005
+
+/* describes where the compressed ramdisk image lives */
+#define ATAG_INITRD2    0x54420005
+
+struct tag_initrd {
+        u32 start;      /* physical start address */
+        u32 size;       /* size of compressed ramdisk image in bytes */
+};
+
+/* board serial number. "64 bits should be enough for everybody" */
+#define ATAG_SERIAL     0x54410006
+
+struct tag_serialnr {
+        u32 low;
+        u32 high;
+};
+
+/* board revision */
+#define ATAG_REVISION   0x54410007
+
+struct tag_revision {
+        u32 rev;
+};
+
+/* initial values for vesafb-type framebuffers. see struct screen_info
+ * in include/linux/tty.h
+ */
+#define ATAG_VIDEOLFB   0x54410008
+
+struct tag_videolfb {
+        u16             lfb_width;
+        u16             lfb_height;
+        u16             lfb_depth;
+        u16             lfb_linelength;
+        u32             lfb_base;
+        u32             lfb_size;
+        u8              red_size;
+        u8              red_pos;
+        u8              green_size;
+        u8              green_pos;
+        u8              blue_size;
+        u8              blue_pos;
+        u8              rsvd_size;
+        u8              rsvd_pos;
+};
+
+/* command line: \0 terminated string */
+#define ATAG_CMDLINE    0x54410009
+
+struct tag_cmdline {
+        char    cmdline[1];     /* this is the minimum size */
+};
+
+/* acorn RiscPC specific information */
+#define ATAG_ACORN      0x41000101
+
+struct tag_acorn {
+        u32 memc_control_reg;
+        u32 vram_pages;
+        u8 sounddefault;
+        u8 adfsdrives;
+};
+
+/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
+#define ATAG_MEMCLK     0x41000402
+
+struct tag_memclk {
+        u32 fmemclk;
+};
+
+struct tag {
+        struct tag_header hdr;
+        union {
+                struct tag_core         core;
+                struct tag_mem32        mem;
+                struct tag_videotext    videotext;
+                struct tag_ramdisk      ramdisk;
+                struct tag_initrd       initrd;
+                struct tag_serialnr     serialnr;
+                struct tag_revision     revision;
+                struct tag_videolfb     videolfb;
+                struct tag_cmdline      cmdline;
+
+                /*
+                 * Acorn specific
+                 */
+                struct tag_acorn        acorn;
+
+                /*
+                 * DC21285 specific
+                 */
+                struct tag_memclk       memclk;
+        } u;
+};
+
+struct tagtable {
+        u32 tag;
+        int (*parse)(const struct tag *);
+};
+
+#define __tag __attribute_used__ __attribute__((__section__(".taglist")))
+#define __tagtable(tag, fn) \
+static struct tagtable __tagtable_##fn __tag = { tag, fn }
+
+#define tag_member_present(tag,member)                          \
+        ((unsigned long)(&((struct tag *)0L)->member + 1)       \
+                <= (tag)->hdr.size * 4)
+
+#define tag_next(t)     ((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_size(type)  ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+
+#define for_each_tag(t,base)            \
+        for (t = base; t->hdr.size; t = tag_next(t))
+
+/*
+ * Memory map description
+ */
+#define NR_BANKS 8
+
+struct meminfo {
+        int nr_banks;
+        unsigned long end;
+        struct {
+                unsigned long start;
+                unsigned long size;
+                int           node;
+        } bank[NR_BANKS];
+};
+
+extern struct meminfo meminfo;
+
+#endif
diff --git a/include/asm-arm26/shmbuf.h b/include/asm-arm26/shmbuf.h
new file mode 100644
index 000000000000..2e5c67ba1c97
--- /dev/null
+++ b/include/asm-arm26/shmbuf.h
@@ -0,0 +1,42 @@
+#ifndef _ASMARM_SHMBUF_H
+#define _ASMARM_SHMBUF_H
+
+/* 
+ * The shmid64_ds structure for arm architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct shmid64_ds {
+        struct ipc64_perm       shm_perm;       /* operation perms */
+        size_t                  shm_segsz;      /* size of segment (bytes) */
+        __kernel_time_t         shm_atime;      /* last attach time */
+        unsigned long           __unused1;
+        __kernel_time_t         shm_dtime;      /* last detach time */
+        unsigned long           __unused2;
+        __kernel_time_t         shm_ctime;      /* last change time */
+        unsigned long           __unused3;
+        __kernel_pid_t          shm_cpid;       /* pid of creator */
+        __kernel_pid_t          shm_lpid;       /* pid of last operator */
+        unsigned long           shm_nattch;     /* no. of current attaches */
+        unsigned long           __unused4;
+        unsigned long           __unused5;
+};
+
+struct shminfo64 {
+        unsigned long   shmmax;
+        unsigned long   shmmin;
+        unsigned long   shmmni;
+        unsigned long   shmseg;
+        unsigned long   shmall;
+        unsigned long   __unused1;
+        unsigned long   __unused2;
+        unsigned long   __unused3;
+        unsigned long   __unused4;
+};
+
+#endif /* _ASMARM_SHMBUF_H */
diff --git a/include/asm-arm26/shmparam.h b/include/asm-arm26/shmparam.h
new file mode 100644
index 000000000000..d3748686631e
--- /dev/null
+++ b/include/asm-arm26/shmparam.h
@@ -0,0 +1,15 @@
+#ifndef _ASMARM_SHMPARAM_H
+#define _ASMARM_SHMPARAM_H
+
+#ifndef SHMMAX
+#define SHMMAX          0x003fa000
+#endif
+
+/*
+ * This should be the size of the virtually indexed cache/ways,
+ * or page size, whichever is greater since the cache aliases
+ * every size/ways bytes.
+ */
+#define SHMLBA PAGE_SIZE                 /* attach addr a multiple of this */
+
+#endif /* _ASMARM_SHMPARAM_H */
diff --git a/include/asm-arm26/sigcontext.h b/include/asm-arm26/sigcontext.h
new file mode 100644
index 000000000000..013ad2074fc7
--- /dev/null
+++ b/include/asm-arm26/sigcontext.h
@@ -0,0 +1,33 @@
+#ifndef _ASMARM_SIGCONTEXT_H
+#define _ASMARM_SIGCONTEXT_H
+
+/*
+ * Signal context structure - contains all info to do with the state
+ * before the signal handler was invoked.  Note: only add new entries
+ * to the end of the structure.
+ */
+struct sigcontext {
+        unsigned long trap_no;
+        unsigned long error_code;
+        unsigned long oldmask;
+        unsigned long arm_r0;
+        unsigned long arm_r1;
+        unsigned long arm_r2;
+        unsigned long arm_r3;
+        unsigned long arm_r4;
+        unsigned long arm_r5;
+        unsigned long arm_r6;
+        unsigned long arm_r7;
+        unsigned long arm_r8;
+        unsigned long arm_r9;
+        unsigned long arm_r10;
+        unsigned long arm_fp;
+        unsigned long arm_ip;
+        unsigned long arm_sp;
+        unsigned long arm_lr;
+        unsigned long arm_pc;
+        unsigned long fault_address;
+};
+
+
+#endif
diff --git a/include/asm-arm26/siginfo.h b/include/asm-arm26/siginfo.h
new file mode 100644
index 000000000000..5e21852e6039
--- /dev/null
+++ b/include/asm-arm26/siginfo.h
@@ -0,0 +1,6 @@
+#ifndef _ASMARM_SIGINFO_H
+#define _ASMARM_SIGINFO_H
+
+#include <asm-generic/siginfo.h>
+
+#endif
diff --git a/include/asm-arm26/signal.h b/include/asm-arm26/signal.h
new file mode 100644
index 000000000000..6f62e51a2e5a
--- /dev/null
+++ b/include/asm-arm26/signal.h
@@ -0,0 +1,201 @@
+#ifndef _ASMARM_SIGNAL_H
+#define _ASMARM_SIGNAL_H
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+#ifdef __KERNEL__
+/* Most things should be clean enough to redefine this at will, if care
+   is taken to make libc match.  */
+
+#define _NSIG           64
+#define _NSIG_BPW       32
+#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
+
+typedef unsigned long old_sigset_t;             /* at least 32 bits */
+
+typedef struct {
+        unsigned long sig[_NSIG_WORDS];
+} sigset_t;
+
+#else
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG            32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+#define SIGBUS           7
+#define SIGFPE           8
+#define SIGKILL          9
+#define SIGUSR1         10
+#define SIGSEGV         11
+#define SIGUSR2         12
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGSTKFLT       16
+#define SIGCHLD         17
+#define SIGCONT         18
+#define SIGSTOP         19
+#define SIGTSTP         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGURG          23
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGIO           29
+#define SIGPOLL         SIGIO
+/*
+#define SIGLOST         29
+*/
+#define SIGPWR          30
+#define SIGSYS          31
+#define SIGUNUSED       31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN        32
+#define SIGRTMAX        _NSIG
+
+#define SIGSWI          32
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_NOCLDSTOP         flag to turn off SIGCHLD when children stop.
+ * SA_NOCLDWAIT         flag on SIGCHLD to inhibit zombies.
+ * SA_SIGINFO           deliver the signal with SIGINFO structs
+ * SA_THIRTYTWO         delivers the signal in 32-bit mode, even if the task 
+ *                      is running in 26-bit.
+ * SA_ONSTACK           allows alternate signal stacks (see sigaltstack(2)).
+ * SA_RESTART           flag to get restarting signals (which were the default long ago)
+ * SA_INTERRUPT         is a no-op, but left due to historical reasons. Use the
+ * SA_NODEFER           prevents the current signal from being masked in the handler.
+ * SA_RESETHAND         clears the handler when the signal is delivered.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP    0x00000001
+#define SA_NOCLDWAIT    0x00000002 /* not supported yet */
+#define SA_SIGINFO      0x00000004
+#define SA_THIRTYTWO    0x02000000
+#define SA_RESTORER     0x04000000
+#define SA_ONSTACK      0x08000000
+#define SA_RESTART      0x10000000
+#define SA_NODEFER      0x40000000
+#define SA_RESETHAND    0x80000000
+
+#define SA_NOMASK       SA_NODEFER
+#define SA_ONESHOT      SA_RESETHAND
+#define SA_INTERRUPT    0x20000000 /* dummy -- ignored */
+
+
+/* 
+ * sigaltstack controls
+ */
+#define SS_ONSTACK      1
+#define SS_DISABLE      2
+
+#define MINSIGSTKSZ     2048
+#define SIGSTKSZ        8192
+
+#ifdef __KERNEL__
+
+/*
+ * These values of sa_flags are used only by the kernel as part of the
+ * irq handling routines.
+ *
+ * SA_INTERRUPT is also used by the irq handling routines.
+ * SA_SHIRQ is for shared interrupt support on PCI and EISA.
+ */
+#define SA_PROBE                0x80000000
+#define SA_SAMPLE_RANDOM        0x10000000
+#define SA_IRQNOMASK            0x08000000
+#define SA_SHIRQ                0x04000000
+#endif
+
+#define SIG_BLOCK          0    /* for blocking signals */
+#define SIG_UNBLOCK        1    /* for unblocking signals */
+#define SIG_SETMASK        2    /* for setting the signal mask */
+
+/* Type of a signal handler.  */
+typedef void (*__sighandler_t)(int);
+
+#define SIG_DFL ((__sighandler_t)0)     /* default signal handling */
+#define SIG_IGN ((__sighandler_t)1)     /* ignore signal */
+#define SIG_ERR ((__sighandler_t)-1)    /* error return from signal */
+
+#ifdef __KERNEL__
+struct old_sigaction {
+        __sighandler_t sa_handler;
+        old_sigset_t sa_mask;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+};
+
+struct sigaction {
+        __sighandler_t sa_handler;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+        sigset_t sa_mask;               /* mask last for extensibility */
+};
+
+struct k_sigaction {
+        struct sigaction sa;
+};
+
+#else
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+        union {
+          __sighandler_t _sa_handler;
+          void (*_sa_sigaction)(int, struct siginfo *, void *);
+        } _u;
+        sigset_t sa_mask;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+};
+
+#define sa_handler      _u._sa_handler
+#define sa_sigaction    _u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+        void *ss_sp;
+        int ss_flags;
+        size_t ss_size;
+} stack_t;
+
+#ifdef __KERNEL__
+#include <asm/sigcontext.h>
+
+#define sigmask(sig)    (1UL << ((sig) - 1))
+//FIXME!!!
+//#define HAVE_ARCH_GET_SIGNAL_TO_DELIVER
+
+#endif
+
+
+#ifdef __KERNEL__
+#include <asm/sigcontext.h>
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+#endif
+
+
+#endif
diff --git a/include/asm-arm26/sizes.h b/include/asm-arm26/sizes.h
new file mode 100644
index 000000000000..f8d92ca12040
--- /dev/null
+++ b/include/asm-arm26/sizes.h
@@ -0,0 +1,52 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+/* DO NOT EDIT!! - this file automatically generated
+ *                 from .s file by awk -f s2h.awk
+ */
+/*  Size defintions
+ *  Copyright (C) ARM Limited 1998. All rights reserved.
+ */
+
+#ifndef __sizes_h
+#define __sizes_h                       1
+
+/* handy sizes */
+#define SZ_1K                           0x00000400
+#define SZ_4K                           0x00001000
+#define SZ_8K                           0x00002000
+#define SZ_16K                          0x00004000
+#define SZ_64K                          0x00010000
+#define SZ_128K                         0x00020000
+#define SZ_256K                         0x00040000
+#define SZ_512K                         0x00080000
+
+#define SZ_1M                           0x00100000
+#define SZ_2M                           0x00200000
+#define SZ_4M                           0x00400000
+#define SZ_8M                           0x00800000
+#define SZ_16M                          0x01000000
+#define SZ_32M                          0x02000000
+#define SZ_64M                          0x04000000
+#define SZ_128M                         0x08000000
+#define SZ_256M                         0x10000000
+#define SZ_512M                         0x20000000
+
+#define SZ_1G                           0x40000000
+#define SZ_2G                           0x80000000
+
+#endif
+
+/*         END */
diff --git a/include/asm-arm26/smp.h b/include/asm-arm26/smp.h
new file mode 100644
index 000000000000..5ca771631fd8
--- /dev/null
+++ b/include/asm-arm26/smp.h
@@ -0,0 +1,10 @@
+#ifndef __ASM_SMP_H
+#define __ASM_SMP_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_SMP
+#error SMP not supported
+#endif
+
+#endif
diff --git a/include/asm-arm26/socket.h b/include/asm-arm26/socket.h
new file mode 100644
index 000000000000..46d20585d951
--- /dev/null
+++ b/include/asm-arm26/socket.h
@@ -0,0 +1,50 @@
+#ifndef _ASMARM_SOCKET_H
+#define _ASMARM_SOCKET_H
+
+#include <asm/sockios.h>
+
+/* For setsockopt(2) */
+#define SOL_SOCKET      1
+
+#define SO_DEBUG        1
+#define SO_REUSEADDR    2
+#define SO_TYPE         3
+#define SO_ERROR        4
+#define SO_DONTROUTE    5
+#define SO_BROADCAST    6
+#define SO_SNDBUF       7
+#define SO_RCVBUF       8
+#define SO_KEEPALIVE    9
+#define SO_OOBINLINE    10
+#define SO_NO_CHECK     11
+#define SO_PRIORITY     12
+#define SO_LINGER       13
+#define SO_BSDCOMPAT    14
+/* To add :#define SO_REUSEPORT 15 */
+#define SO_PASSCRED     16
+#define SO_PEERCRED     17
+#define SO_RCVLOWAT     18
+#define SO_SNDLOWAT     19
+#define SO_RCVTIMEO     20
+#define SO_SNDTIMEO     21
+
+/* Security levels - as per NRL IPv6 - don't actually do anything */
+#define SO_SECURITY_AUTHENTICATION              22
+#define SO_SECURITY_ENCRYPTION_TRANSPORT        23
+#define SO_SECURITY_ENCRYPTION_NETWORK          24
+
+#define SO_BINDTODEVICE 25
+
+/* Socket filtering */
+#define SO_ATTACH_FILTER        26
+#define SO_DETACH_FILTER        27
+
+#define SO_PEERNAME             28
+#define SO_TIMESTAMP            29
+#define SCM_TIMESTAMP           SO_TIMESTAMP
+
+#define SO_ACCEPTCONN           30
+
+#define SO_PEERSEC              31
+
+#endif /* _ASM_SOCKET_H */
diff --git a/include/asm-arm26/sockios.h b/include/asm-arm26/sockios.h
new file mode 100644
index 000000000000..77c34087d513
--- /dev/null
+++ b/include/asm-arm26/sockios.h
@@ -0,0 +1,12 @@
+#ifndef __ARCH_ARM_SOCKIOS_H
+#define __ARCH_ARM_SOCKIOS_H
+
+/* Socket-level I/O control calls. */
+#define FIOSETOWN       0x8901
+#define SIOCSPGRP       0x8902
+#define FIOGETOWN       0x8903
+#define SIOCGPGRP       0x8904
+#define SIOCATMARK      0x8905
+#define SIOCGSTAMP      0x8906          /* Get stamp */
+
+#endif
diff --git a/include/asm-arm26/spinlock.h b/include/asm-arm26/spinlock.h
new file mode 100644
index 000000000000..e92e81deb4fd
--- /dev/null
+++ b/include/asm-arm26/spinlock.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_SPINLOCK_H
+#define __ASM_SPINLOCK_H
+
+#error ARM architecture does not support SMP spin locks
+
+#endif /* __ASM_SPINLOCK_H */
diff --git a/include/asm-arm26/stat.h b/include/asm-arm26/stat.h
new file mode 100644
index 000000000000..e4abc4fa0850
--- /dev/null
+++ b/include/asm-arm26/stat.h
@@ -0,0 +1,77 @@
+#ifndef _ASMARM_STAT_H
+#define _ASMARM_STAT_H
+
+struct __old_kernel_stat {
+        unsigned short st_dev;
+        unsigned short st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned short st_rdev;
+        unsigned long  st_size;
+        unsigned long  st_atime;
+        unsigned long  st_mtime;
+        unsigned long  st_ctime;
+};
+
+struct stat {
+        unsigned short st_dev;
+        unsigned short __pad1;
+        unsigned long st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned short st_rdev;
+        unsigned short __pad2;
+        unsigned long  st_size;
+        unsigned long  st_blksize;
+        unsigned long  st_blocks;
+        unsigned long  st_atime;
+        unsigned long  st_atime_nsec;
+        unsigned long  st_mtime;
+        unsigned long  st_mtime_nsec;
+        unsigned long  st_ctime;
+        unsigned long  st_ctime_nsec;
+        unsigned long  __unused4;
+        unsigned long  __unused5;
+};
+
+/* This matches struct stat64 in glibc2.1, hence the absolutely
+ * insane amounts of padding around dev_t's.
+ */
+struct stat64 {
+        unsigned long long  st_dev;
+        unsigned char   __pad0[4];
+
+#define STAT64_HAS_BROKEN_ST_INO        1
+        unsigned long   __st_ino;
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+
+        unsigned long   st_uid;
+        unsigned long   st_gid;
+
+        unsigned long long  st_rdev;
+        unsigned char   __pad3[4];
+
+        long long       st_size;
+        unsigned long   st_blksize;
+
+        unsigned long   st_blocks;      /* Number 512-byte blocks allocated. */
+        unsigned long   __pad4;         /* Future possible st_blocks hi bits */
+
+        unsigned long   st_atime;
+        unsigned long   st_atime_nsec;
+
+        unsigned long   st_mtime;
+        unsigned long   st_mtime_nsec;
+
+        unsigned long   st_ctime;
+        unsigned long   st_ctime_nsec;
+
+        unsigned long long      st_ino;
+};
+
+#endif
diff --git a/include/asm-arm26/statfs.h b/include/asm-arm26/statfs.h
new file mode 100644
index 000000000000..776dbc8f7623
--- /dev/null
+++ b/include/asm-arm26/statfs.h
@@ -0,0 +1,8 @@
+#ifndef _ASMARM_STATFS_H
+#define _ASMARM_STATFS_H
+
+//FIXME - this may not be appropriate for arm26. check it out.
+
+#include <asm-generic/statfs.h>
+
+#endif
diff --git a/include/asm-arm26/string.h b/include/asm-arm26/string.h
new file mode 100644
index 000000000000..2a8ab162412f
--- /dev/null
+++ b/include/asm-arm26/string.h
@@ -0,0 +1,43 @@
+#ifndef __ASM_ARM_STRING_H
+#define __ASM_ARM_STRING_H
+
+/*
+ * We don't do inline string functions, since the
+ * optimised inline asm versions are not small.
+ */
+
+#define __HAVE_ARCH_STRRCHR
+extern char * strrchr(const char * s, int c);
+
+#define __HAVE_ARCH_STRCHR
+extern char * strchr(const char * s, int c);
+
+#define __HAVE_ARCH_MEMCPY
+extern void * memcpy(void *, const void *, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMMOVE
+extern void * memmove(void *, const void *, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMCHR
+extern void * memchr(const void *, int, __kernel_size_t);
+
+#define __HAVE_ARCH_MEMZERO
+#define __HAVE_ARCH_MEMSET
+extern void * memset(void *, int, __kernel_size_t);
+
+extern void __memzero(void *ptr, __kernel_size_t n);
+
+#define memset(p,v,n)                                                   \
+        ({                                                              \
+                if ((n) != 0) {                                         \
+                        if (__builtin_constant_p((v)) && (v) == 0)      \
+                                __memzero((p),(n));                     \
+                        else                                            \
+                                memset((p),(v),(n));                    \
+                }                                                       \
+                (p);                                                    \
+        })
+
+#define memzero(p,n) ({ if ((n) != 0) __memzero((p),(n)); (p); })
+
+#endif
diff --git a/include/asm-arm26/suspend.h b/include/asm-arm26/suspend.h
new file mode 100644
index 000000000000..5e4c1cc0c19d
--- /dev/null
+++ b/include/asm-arm26/suspend.h
@@ -0,0 +1,4 @@
+#ifdef _ASMARM_SUSPEND_H
+#define _ASMARM_SUSPEND_H
+
+#endif
diff --git a/include/asm-arm26/sysirq.h b/include/asm-arm26/sysirq.h
new file mode 100644
index 000000000000..cad250c7b9ec
--- /dev/null
+++ b/include/asm-arm26/sysirq.h
@@ -0,0 +1,61 @@
+/*
+ *  linux/include/asm-arm/arch-arc/irqs.h
+ *
+ *  Copyright (C) 1996 Russell King, Dave Gilbert
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Modifications:
+ *   04-04-1998 PJB     Merged arc and a5k versions
+ */
+
+#include <linux/config.h>
+
+#if defined(CONFIG_ARCH_A5K)
+#define IRQ_PRINTER             0
+#define IRQ_BATLOW              1
+#define IRQ_FLOPPYINDEX         2
+#define IRQ_FLOPPYDISK          12
+#elif defined(CONFIG_ARCH_ARC)
+#define IRQ_PRINTERBUSY         0
+#define IRQ_SERIALRING          1
+#define IRQ_PRINTERACK          2
+#define IRQ_FLOPPYCHANGED       12
+#endif
+
+#define IRQ_VSYNCPULSE          3
+#define IRQ_POWERON             4
+#define IRQ_TIMER0              5
+#define IRQ_TIMER1              6
+#define IRQ_IMMEDIATE           7
+#define IRQ_EXPCARDFIQ          8
+#define IRQ_SOUNDCHANGE         9
+#define IRQ_SERIALPORT          10
+#define IRQ_HARDDISK            11
+#define IRQ_EXPANSIONCARD       13
+#define IRQ_KEYBOARDTX          14
+#define IRQ_KEYBOARDRX          15
+
+#if defined(CONFIG_ARCH_A5K)
+#define FIQ_SERIALPORT          4
+#elif defined(CONFIG_ARCH_ARC)
+#define FIQ_FLOPPYIRQ           1
+#define FIQ_FD1772              FIQ_FLOPPYIRQ
+#endif
+
+#define FIQ_FLOPPYDATA          0
+#define FIQ_ECONET              2
+#define FIQ_EXPANSIONCARD       6
+#define FIQ_FORCE               7
+
+#define IRQ_TIMER               IRQ_TIMER0
+
+/*
+ * This is the offset of the FIQ "IRQ" numbers
+ */
+#define FIQ_START               64
+
+#define irq_cannonicalize(i)    (i)
+
diff --git a/include/asm-arm26/system.h b/include/asm-arm26/system.h
new file mode 100644
index 000000000000..f23fac1938f3
--- /dev/null
+++ b/include/asm-arm26/system.h
@@ -0,0 +1,252 @@
+#ifndef __ASM_ARM_SYSTEM_H
+#define __ASM_ARM_SYSTEM_H
+
+#ifdef __KERNEL__
+
+#include <linux/config.h>
+
+/*
+ * This is used to ensure the compiler did actually allocate the register we
+ * asked it for some inline assembly sequences.  Apparently we can't trust
+ * the compiler from one version to another so a bit of paranoia won't hurt.
+ * This string is meant to be concatenated with the inline asm string and
+ * will cause compilation to stop on mismatch. (From ARM32 - may come in handy)
+ */
+#define __asmeq(x, y)  ".ifnc " x "," y " ; .err ; .endif\n\t"
+
+#ifndef __ASSEMBLY__
+
+#include <linux/linkage.h>
+
+struct thread_info;
+struct task_struct;
+
+#if 0
+/* information about the system we're running on */
+extern unsigned int system_rev;
+extern unsigned int system_serial_low;
+extern unsigned int system_serial_high;
+extern unsigned int mem_fclk_21285;
+
+FIXME - sort this
+/*
+ * We need to turn the caches off before calling the reset vector - RiscOS
+ * messes up if we don't
+ */
+#define proc_hard_reset()       cpu_proc_fin()
+
+#endif
+
+struct pt_regs;
+
+void die(const char *msg, struct pt_regs *regs, int err)
+                __attribute__((noreturn));
+
+void die_if_kernel(const char *str, struct pt_regs *regs, int err);
+
+void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
+                                       struct pt_regs *),
+                     int sig, const char *name);
+
+#include <asm/proc-fns.h>
+
+#define xchg(ptr,x) \
+        ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+#define tas(ptr) (xchg((ptr),1))
+
+extern asmlinkage void __backtrace(void);
+
+#define set_cr(x)                                       \
+        __asm__ __volatile__(                           \
+        "mcr    p15, 0, %0, c1, c0, 0   @ set CR"       \
+        : : "r" (x) : "cc")
+
+#define get_cr()                                        \
+        ({                                              \
+        unsigned int __val;                             \
+        __asm__ __volatile__(                           \
+        "mrc    p15, 0, %0, c1, c0, 0   @ get CR"       \
+        : "=r" (__val) : : "cc");                       \
+        __val;                                          \
+        })
+
+extern unsigned long cr_no_alignment;   /* defined in entry-armv.S */
+extern unsigned long cr_alignment;      /* defined in entry-armv.S */
+
+#define UDBG_UNDEFINED  (1 << 0)
+#define UDBG_SYSCALL    (1 << 1)
+#define UDBG_BADABORT   (1 << 2)
+#define UDBG_SEGV       (1 << 3)
+#define UDBG_BUS        (1 << 4)
+
+extern unsigned int user_debug;
+
+#define vectors_base()  (0)
+
+#define mb() __asm__ __volatile__ ("" : : : "memory")
+#define rmb() mb()
+#define wmb() mb()
+#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
+
+#define read_barrier_depends() do { } while(0)
+#define set_mb(var, value)  do { var = value; mb(); } while (0)
+#define set_wmb(var, value) do { var = value; wmb(); } while (0)
+
+/*
+ * We assume knowledge of how
+ * spin_unlock_irq() and friends are implemented.  This avoids
+ * us needlessly decrementing and incrementing the preempt count.
+ */
+#define prepare_arch_switch(rq,next)    local_irq_enable()
+#define finish_arch_switch(rq,prev)     spin_unlock(&(rq)->lock)
+#define task_running(rq,p)              ((rq)->curr == (p))
+
+/*
+ * switch_to(prev, next) should switch from task `prev' to `next'
+ * `prev' will never be the same as `next'.  schedule() itself
+ * contains the memory barrier to tell GCC not to cache `current'.
+ */
+extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *);
+
+#define switch_to(prev,next,last)                                       \
+do {                                                                    \
+        last = __switch_to(prev,prev->thread_info,next->thread_info);   \
+} while (0)
+
+/*
+ * Save the current interrupt enable state & disable IRQs
+ */
+#define local_irq_save(x)                               \
+        do {                                            \
+          unsigned long temp;                           \
+          __asm__ __volatile__(                         \
+"       mov     %0, pc          @ save_flags_cli\n"     \
+"       orr     %1, %0, #0x08000000\n"                  \
+"       and     %0, %0, #0x0c000000\n"                  \
+"       teqp    %1, #0\n"                               \
+          : "=r" (x), "=r" (temp)                       \
+          :                                             \
+          : "memory");                                  \
+        } while (0)
+
+/*
+ * Enable IRQs  (sti)
+ */
+#define local_irq_enable()                                      \
+        do {                                    \
+          unsigned long temp;                   \
+          __asm__ __volatile__(                 \
+"       mov     %0, pc          @ sti\n"        \
+"       bic     %0, %0, #0x08000000\n"          \
+"       teqp    %0, #0\n"                       \
+          : "=r" (temp)                         \
+          :                                     \
+          : "memory");                          \
+        } while(0)
+
+/*
+ * Disable IRQs (cli)
+ */
+#define local_irq_disable()                                     \
+        do {                                    \
+          unsigned long temp;                   \
+          __asm__ __volatile__(                 \
+"       mov     %0, pc          @ cli\n"        \
+"       orr     %0, %0, #0x08000000\n"          \
+"       teqp    %0, #0\n"                       \
+          : "=r" (temp)                         \
+          :                                     \
+          : "memory");                          \
+        } while(0)
+
+/* Enable FIQs (stf) */
+
+#define __stf() do {                            \
+        unsigned long temp;                     \
+        __asm__ __volatile__(                   \
+"       mov     %0, pc          @ stf\n"        \
+"       bic     %0, %0, #0x04000000\n"          \
+"       teqp    %0, #0\n"                       \
+        : "=r" (temp));                         \
+    } while(0)
+
+/* Disable FIQs  (clf) */
+
+#define __clf() do {                            \
+        unsigned long temp;                     \
+        __asm__ __volatile__(                   \
+"       mov     %0, pc          @ clf\n"        \
+"       orr     %0, %0, #0x04000000\n"          \
+"       teqp    %0, #0\n"                       \
+        : "=r" (temp));                         \
+    } while(0)
+
+
+/*
+ * Save the current interrupt enable state.
+ */
+#define local_save_flags(x)                             \
+        do {                                    \
+          __asm__ __volatile__(                 \
+"       mov     %0, pc          @ save_flags\n" \
+"       and     %0, %0, #0x0c000000\n"          \
+          : "=r" (x));                          \
+        } while (0)
+
+
+/*
+ * restore saved IRQ & FIQ state
+ */
+#define local_irq_restore(x)                            \
+        do {                                            \
+          unsigned long temp;                           \
+          __asm__ __volatile__(                         \
+"       mov     %0, pc          @ restore_flags\n"      \
+"       bic     %0, %0, #0x0c000000\n"                  \
+"       orr     %0, %0, %1\n"                           \
+"       teqp    %0, #0\n"                               \
+          : "=&r" (temp)                                \
+          : "r" (x)                                     \
+          : "memory");                                  \
+        } while (0)
+
+
+#ifdef CONFIG_SMP
+#error SMP not supported
+#endif
+
+#define smp_mb()                barrier()
+#define smp_rmb()               barrier()
+#define smp_wmb()               barrier()
+#define smp_read_barrier_depends()              do { } while(0)
+
+#define clf()                   __clf()
+#define stf()                   __stf()
+
+#define irqs_disabled()                 \
+({                                      \
+        unsigned long flags;            \
+        local_save_flags(flags);        \
+        flags & PSR_I_BIT;              \
+})
+
+static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
+{
+        extern void __bad_xchg(volatile void *, int);
+
+        switch (size) {
+                case 1: return cpu_xchg_1(x, ptr);
+                case 4: return cpu_xchg_4(x, ptr);
+                default: __bad_xchg(ptr, size);
+        }
+        return 0;
+}
+
+#endif /* __ASSEMBLY__ */
+
+#define arch_align_stack(x) (x)
+
+#endif /* __KERNEL__ */
+
+#endif
diff --git a/include/asm-arm26/termbits.h b/include/asm-arm26/termbits.h
new file mode 100644
index 000000000000..bbc6e1d24d3f
--- /dev/null
+++ b/include/asm-arm26/termbits.h
@@ -0,0 +1,171 @@
+#ifndef __ASM_ARM_TERMBITS_H
+#define __ASM_ARM_TERMBITS_H
+
+typedef unsigned char   cc_t;
+typedef unsigned int    speed_t;
+typedef unsigned int    tcflag_t;
+
+#define NCCS 19
+struct termios {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+};
+
+/* c_cc characters */
+#define VINTR 0
+#define VQUIT 1
+#define VERASE 2
+#define VKILL 3
+#define VEOF 4
+#define VTIME 5
+#define VMIN 6
+#define VSWTC 7
+#define VSTART 8
+#define VSTOP 9
+#define VSUSP 10
+#define VEOL 11
+#define VREPRINT 12
+#define VDISCARD 13
+#define VWERASE 14
+#define VLNEXT 15
+#define VEOL2 16
+
+/* c_iflag bits */
+#define IGNBRK  0000001
+#define BRKINT  0000002
+#define IGNPAR  0000004
+#define PARMRK  0000010
+#define INPCK   0000020
+#define ISTRIP  0000040
+#define INLCR   0000100
+#define IGNCR   0000200
+#define ICRNL   0000400
+#define IUCLC   0001000
+#define IXON    0002000
+#define IXANY   0004000
+#define IXOFF   0010000
+#define IMAXBEL 0020000
+#define IUTF8   0040000
+
+/* c_oflag bits */
+#define OPOST   0000001
+#define OLCUC   0000002
+#define ONLCR   0000004
+#define OCRNL   0000010
+#define ONOCR   0000020
+#define ONLRET  0000040
+#define OFILL   0000100
+#define OFDEL   0000200
+#define NLDLY   0000400
+#define   NL0   0000000
+#define   NL1   0000400
+#define CRDLY   0003000
+#define   CR0   0000000
+#define   CR1   0001000
+#define   CR2   0002000
+#define   CR3   0003000
+#define TABDLY  0014000
+#define   TAB0  0000000
+#define   TAB1  0004000
+#define   TAB2  0010000
+#define   TAB3  0014000
+#define   XTABS 0014000
+#define BSDLY   0020000
+#define   BS0   0000000
+#define   BS1   0020000
+#define VTDLY   0040000
+#define   VT0   0000000
+#define   VT1   0040000
+#define FFDLY   0100000
+#define   FF0   0000000
+#define   FF1   0100000
+
+/* c_cflag bit meaning */
+#define CBAUD   0010017
+#define  B0     0000000         /* hang up */
+#define  B50    0000001
+#define  B75    0000002
+#define  B110   0000003
+#define  B134   0000004
+#define  B150   0000005
+#define  B200   0000006
+#define  B300   0000007
+#define  B600   0000010
+#define  B1200  0000011
+#define  B1800  0000012
+#define  B2400  0000013
+#define  B4800  0000014
+#define  B9600  0000015
+#define  B19200 0000016
+#define  B38400 0000017
+#define EXTA B19200
+#define EXTB B38400
+#define CSIZE   0000060
+#define   CS5   0000000
+#define   CS6   0000020
+#define   CS7   0000040
+#define   CS8   0000060
+#define CSTOPB  0000100
+#define CREAD   0000200
+#define PARENB  0000400
+#define PARODD  0001000
+#define HUPCL   0002000
+#define CLOCAL  0004000
+#define CBAUDEX 0010000
+#define    B57600 0010001
+#define   B115200 0010002
+#define   B230400 0010003
+#define   B460800 0010004
+#define   B500000 0010005
+#define   B576000 0010006
+#define   B921600 0010007
+#define  B1000000 0010010
+#define  B1152000 0010011
+#define  B1500000 0010012
+#define  B2000000 0010013
+#define  B2500000 0010014
+#define  B3000000 0010015
+#define  B3500000 0010016
+#define  B4000000 0010017
+#define CIBAUD    002003600000  /* input baud rate (not used) */
+#define CMSPAR    010000000000          /* mark or space (stick) parity */
+#define CRTSCTS   020000000000          /* flow control */
+
+/* c_lflag bits */
+#define ISIG    0000001
+#define ICANON  0000002
+#define XCASE   0000004
+#define ECHO    0000010
+#define ECHOE   0000020
+#define ECHOK   0000040
+#define ECHONL  0000100
+#define NOFLSH  0000200
+#define TOSTOP  0000400
+#define ECHOCTL 0001000
+#define ECHOPRT 0002000
+#define ECHOKE  0004000
+#define FLUSHO  0010000
+#define PENDIN  0040000
+#define IEXTEN  0100000
+
+/* tcflow() and TCXONC use these */
+#define TCOOFF          0
+#define TCOON           1
+#define TCIOFF          2
+#define TCION           3
+
+/* tcflush() and TCFLSH use these */
+#define TCIFLUSH        0
+#define TCOFLUSH        1
+#define TCIOFLUSH       2
+
+/* tcsetattr uses these */
+#define TCSANOW         0
+#define TCSADRAIN       1
+#define TCSAFLUSH       2
+
+#endif  /* __ASM_ARM_TERMBITS_H */
diff --git a/include/asm-arm26/termios.h b/include/asm-arm26/termios.h
new file mode 100644
index 000000000000..7b8f5e8ae063
--- /dev/null
+++ b/include/asm-arm26/termios.h
@@ -0,0 +1,108 @@
+#ifndef __ASM_ARM_TERMIOS_H
+#define __ASM_ARM_TERMIOS_H
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+        unsigned short ws_row;
+        unsigned short ws_col;
+        unsigned short ws_xpixel;
+        unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+        unsigned short c_iflag;         /* input mode flags */
+        unsigned short c_oflag;         /* output mode flags */
+        unsigned short c_cflag;         /* control mode flags */
+        unsigned short c_lflag;         /* local mode flags */
+        unsigned char c_line;           /* line discipline */
+        unsigned char c_cc[NCC];        /* control characters */
+};
+
+#ifdef __KERNEL__
+/*      intr=^C         quit=^|         erase=del       kill=^U
+        eof=^D          vtime=\0        vmin=\1         sxtc=\0
+        start=^Q        stop=^S         susp=^Z         eol=\0
+        reprint=^R      discard=^U      werase=^W       lnext=^V
+        eol2=\0
+*/
+#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
+#endif
+
+/* modem lines */
+#define TIOCM_LE        0x001
+#define TIOCM_DTR       0x002
+#define TIOCM_RTS       0x004
+#define TIOCM_ST        0x008
+#define TIOCM_SR        0x010
+#define TIOCM_CTS       0x020
+#define TIOCM_CAR       0x040
+#define TIOCM_RNG       0x080
+#define TIOCM_DSR       0x100
+#define TIOCM_CD        TIOCM_CAR
+#define TIOCM_RI        TIOCM_RNG
+#define TIOCM_OUT1      0x2000
+#define TIOCM_OUT2      0x4000
+#define TIOCM_LOOP      0x8000
+
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+
+/* line disciplines */
+#define N_TTY           0
+#define N_SLIP          1
+#define N_MOUSE         2
+#define N_PPP           3
+#define N_STRIP         4
+#define N_AX25          5
+#define N_X25           6       /* X.25 async */
+#define N_6PACK         7
+#define N_MASC          8       /* Reserved for Mobitex module <kaz@cafe.net> */
+#define N_R3964         9       /* Reserved for Simatic R3964 module */
+#define N_PROFIBUS_FDL  10      /* Reserved for Profibus <Dave@mvhi.com> */
+#define N_IRDA          11      /* Linux IrDa - http://irda.sourceforge.net/ */
+#define N_SMSBLOCK      12      /* SMS block mode - for talking to GSM data cards about SMS messages */
+#define N_HDLC          13      /* synchronous HDLC */
+#define N_SYNC_PPP      14
+#define N_HCI           15  /* Bluetooth HCI UART */
+
+#ifdef __KERNEL__
+
+/*
+ * Translate a "termio" structure into a "termios". Ugh.
+ */
+#define SET_LOW_TERMIOS_BITS(termios, termio, x) {              \
+        unsigned short __tmp;                                   \
+        get_user(__tmp,&(termio)->x);                           \
+        *(unsigned short *) &(termios)->x = __tmp;              \
+}
+
+#define user_termio_to_kernel_termios(termios, termio) \
+({ \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
+        SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
+        copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
+})
+
+/*
+ * Translate a "termios" structure into a "termio". Ugh.
+ */
+#define kernel_termios_to_user_termio(termio, termios) \
+({ \
+        put_user((termios)->c_iflag, &(termio)->c_iflag); \
+        put_user((termios)->c_oflag, &(termio)->c_oflag); \
+        put_user((termios)->c_cflag, &(termio)->c_cflag); \
+        put_user((termios)->c_lflag, &(termio)->c_lflag); \
+        put_user((termios)->c_line,  &(termio)->c_line); \
+        copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
+})
+
+#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
+#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
+
+#endif  /* __KERNEL__ */
+
+#endif  /* __ASM_ARM_TERMIOS_H */
diff --git a/include/asm-arm26/thread_info.h b/include/asm-arm26/thread_info.h
new file mode 100644
index 000000000000..50f41b50268a
--- /dev/null
+++ b/include/asm-arm26/thread_info.h
@@ -0,0 +1,144 @@
+/*
+ *  linux/include/asm-arm26/thread_info.h
+ *
+ *  Copyright (C) 2002 Russell King.
+ *  Copyright (C) 2003 Ian Molton.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_ARM_THREAD_INFO_H
+#define __ASM_ARM_THREAD_INFO_H
+
+#ifdef __KERNEL__
+
+#ifndef __ASSEMBLY__
+
+struct task_struct;
+struct exec_domain;
+
+#include <linux/compiler.h>
+#include <asm/fpstate.h>
+#include <asm/ptrace.h>
+#include <asm/types.h>
+
+typedef unsigned long mm_segment_t;
+
+struct cpu_context_save {
+        __u32   r4;
+        __u32   r5;
+        __u32   r6;
+        __u32   r7;
+        __u32   r8;
+        __u32   r9;
+        __u32   sl;
+        __u32   fp;
+        __u32   sp;
+        __u32   pc;
+};
+
+/*
+ * low level task data that entry.S needs immediate access to.
+ * We assume cpu_context follows immedately after cpu_domain.
+ */
+struct thread_info {
+        unsigned long           flags;          /* low level flags */
+        __s32                   preempt_count;  /* 0 => preemptable, <0 => bug */
+        mm_segment_t            addr_limit;     /* address limit */
+        struct task_struct      *task;          /* main task structure */
+        struct exec_domain      *exec_domain;   /* execution domain */
+        __u32                   cpu;            /* cpu */
+        struct cpu_context_save cpu_context;    /* cpu context */
+        struct restart_block    restart_block;
+        union fp_state          fpstate;
+};
+
+#define INIT_THREAD_INFO(tsk)                   \
+{                                               \
+        .task           &tsk,                   \
+        .exec_domain    &default_exec_domain,   \
+        .flags          0,                      \
+        .preempt_count  0,                      \
+        .addr_limit     KERNEL_DS,              \
+        .restart_block  = {                             \
+                .fn     = do_no_restart_syscall,        \
+        },                                              \
+}
+
+#define init_thread_info        (init_thread_union.thread_info)
+#define init_stack              (init_thread_union.stack)
+
+/*
+ * how to get the thread information struct from C
+ */
+static inline struct thread_info *current_thread_info(void) __attribute_const__;
+
+static inline struct thread_info *current_thread_info(void)
+{
+        register unsigned long sp asm ("sp");
+        return (struct thread_info *)(sp & ~0x1fff);
+}
+
+/* FIXME - PAGE_SIZE < 32K */
+#define THREAD_SIZE             (8*32768) // FIXME - this needs attention (see kernel/fork.c which gets a nice div by zero if this is lower than 8*32768
+#define __get_user_regs(x) (((struct pt_regs *)((unsigned long)(x) + THREAD_SIZE - 8)) - 1)
+
+extern struct thread_info *alloc_thread_info(struct task_struct *task);
+extern void free_thread_info(struct thread_info *);
+
+#define get_thread_info(ti)     get_task_struct((ti)->task)
+#define put_thread_info(ti)     put_task_struct((ti)->task)
+
+#define thread_saved_pc(tsk)    \
+        ((unsigned long)(pc_pointer((tsk)->thread_info->cpu_context.pc)))
+#define thread_saved_fp(tsk)    \
+        ((unsigned long)((tsk)->thread_info->cpu_context.fp))
+
+#else /* !__ASSEMBLY__ */
+
+#define TI_FLAGS        0
+#define TI_PREEMPT      4
+#define TI_ADDR_LIMIT   8
+#define TI_TASK         12
+#define TI_EXEC_DOMAIN  16
+#define TI_CPU          20
+#define TI_CPU_SAVE     24
+#define TI_RESTART_BLOCK 28
+#define TI_FPSTATE      68
+
+#endif
+
+#define PREEMPT_ACTIVE  0x04000000
+
+/*
+ * thread information flags:
+ *  TIF_SYSCALL_TRACE   - syscall trace active
+ *  TIF_NOTIFY_RESUME   - resumption notification requested
+ *  TIF_SIGPENDING      - signal pending
+ *  TIF_NEED_RESCHED    - rescheduling necessary
+ *  TIF_USEDFPU         - FPU was used by this task this quantum (SMP)
+ *  TIF_POLLING_NRFLAG  - true if poll_idle() is polling TIF_NEED_RESCHED
+ */
+#define TIF_NOTIFY_RESUME       0
+#define TIF_SIGPENDING          1
+#define TIF_NEED_RESCHED        2
+#define TIF_SYSCALL_TRACE       8
+#define TIF_USED_FPU            16
+#define TIF_POLLING_NRFLAG      17
+#define TIF_MEMDIE              18
+
+#define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
+#define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
+#define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
+#define _TIF_USED_FPU           (1 << TIF_USED_FPU)
+#define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
+
+/*
+ * Change these and you break ASM code in entry-common.S
+ */
+#define _TIF_WORK_MASK          0x000000ff
+
+#endif /* __KERNEL__ */
+#endif /* __ASM_ARM_THREAD_INFO_H */
diff --git a/include/asm-arm26/timex.h b/include/asm-arm26/timex.h
new file mode 100644
index 000000000000..68322fbc1aed
--- /dev/null
+++ b/include/asm-arm26/timex.h
@@ -0,0 +1,29 @@
+/*
+ *  linux/include/asm-arm/timex.h
+ *
+ *  Copyright (C) 1997,1998 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Architecture Specific TIME specifications
+ */
+#ifndef _ASMARM_TIMEX_H
+#define _ASMARM_TIMEX_H
+
+/*
+ * On the RiscPC, the clock ticks at 2MHz.
+ */
+#define CLOCK_TICK_RATE         2000000
+
+/* IS THAT RIGHT ON A5000? FIXME */
+
+typedef unsigned long cycles_t;
+
+static inline cycles_t get_cycles (void)
+{
+        return 0;
+}
+
+#endif
diff --git a/include/asm-arm26/tlb.h b/include/asm-arm26/tlb.h
new file mode 100644
index 000000000000..1316352a58f3
--- /dev/null
+++ b/include/asm-arm26/tlb.h
@@ -0,0 +1,78 @@
+#ifndef __ASMARM_TLB_H
+#define __ASMARM_TLB_H
+
+#include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+
+/*
+ * TLB handling.  This allows us to remove pages from the page
+ * tables, and efficiently handle the TLB issues.
+ */
+struct mmu_gather {
+        struct mm_struct        *mm;
+        unsigned int            freed;
+        unsigned int            fullmm;
+
+        unsigned int            flushes;
+        unsigned int            avoided_flushes;
+};
+
+extern struct mmu_gather mmu_gathers[NR_CPUS];
+
+static inline struct mmu_gather *
+tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
+{
+        int cpu = smp_processor_id();
+        struct mmu_gather *tlb = &mmu_gathers[cpu];
+
+        tlb->mm = mm;
+        tlb->freed = 0;
+        tlb->fullmm = full_mm_flush;
+
+        return tlb;
+}
+
+static inline void
+tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
+{
+        struct mm_struct *mm = tlb->mm;
+        unsigned long freed = tlb->freed;
+        int rss = get_mm_counter(mm, rss);
+
+        if (rss < freed)
+                freed = rss;
+        add_mm_counter(mm, rss, -freed);
+
+        if (freed) {
+                flush_tlb_mm(mm);
+                tlb->flushes++;
+        } else {
+                tlb->avoided_flushes++;
+        }
+
+        /* keep the page table cache within bounds */
+        check_pgt_cache();
+}
+
+
+static inline unsigned int
+tlb_is_full_mm(struct mmu_gather *tlb)
+{
+     return tlb->fullmm;
+}
+
+#define tlb_remove_tlb_entry(tlb,ptep,address)  do { } while (0)
+//#define tlb_start_vma(tlb,vma)                  do { } while (0)
+//FIXME - ARM32 uses this now that things changed in the kernel. seems like it may be pointless on arm26, however to get things compiling...
+#define tlb_start_vma(tlb,vma)                                          \
+        do {                                                            \
+                if (!tlb->fullmm)                                       \
+                        flush_cache_range(vma, vma->vm_start, vma->vm_end); \
+        } while (0)
+#define tlb_end_vma(tlb,vma)                    do { } while (0)
+
+#define tlb_remove_page(tlb,page)       free_page_and_swap_cache(page)
+#define pte_free_tlb(tlb,ptep)          pte_free(ptep)
+#define pmd_free_tlb(tlb,pmdp)          pmd_free(pmdp)
+
+#endif
diff --git a/include/asm-arm26/tlbflush.h b/include/asm-arm26/tlbflush.h
new file mode 100644
index 000000000000..f79c1cbf4f69
--- /dev/null
+++ b/include/asm-arm26/tlbflush.h
@@ -0,0 +1,70 @@
+#ifndef __ASMARM_TLBFLUSH_H
+#define __ASMARM_TLBFLUSH_H
+
+/*
+ * TLB flushing:
+ *
+ *  - flush_tlb_all() flushes all processes TLBs
+ *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
+ *  - flush_tlb_page(vma, vmaddr) flushes one page
+ *  - flush_tlb_range(vma, start, end) flushes a range of pages
+ */
+
+#define flush_tlb_all()                         memc_update_all()
+#define flush_tlb_mm(mm)                        memc_update_mm(mm)
+#define flush_tlb_page(vma, vmaddr)             do { printk("flush_tlb_page\n");} while (0)  // IS THIS RIGHT?
+#define flush_tlb_range(vma,start,end)          \
+                do { memc_update_mm(vma->vm_mm); (void)(start); (void)(end); } while (0)
+#define flush_tlb_pgtables(mm,start,end)        do { printk("flush_tlb_pgtables\n");} while (0)
+#define flush_tlb_kernel_range(s,e)             do { printk("flush_tlb_range\n");} while (0)
+
+/*
+ * The following handle the weird MEMC chip
+ */
+static inline void memc_update_all(void)
+{
+        struct task_struct *p;
+        cpu_memc_update_all(init_mm.pgd);
+        for_each_process(p) {
+                if (!p->mm)
+                        continue;
+                cpu_memc_update_all(p->mm->pgd);
+        }
+        processor._set_pgd(current->active_mm->pgd);
+}
+
+static inline void memc_update_mm(struct mm_struct *mm)
+{
+        cpu_memc_update_all(mm->pgd);
+
+        if (mm == current->active_mm)
+                processor._set_pgd(mm->pgd);
+}
+
+static inline void
+memc_clear(struct mm_struct *mm, struct page *page)
+{
+        cpu_memc_update_entry(mm->pgd, (unsigned long) page_address(page), 0);
+
+        if (mm == current->active_mm)
+                processor._set_pgd(mm->pgd);
+}
+
+static inline void
+memc_update_addr(struct mm_struct *mm, pte_t pte, unsigned long vaddr)
+{
+        cpu_memc_update_entry(mm->pgd, pte_val(pte), vaddr);
+
+        if (mm == current->active_mm)
+                processor._set_pgd(mm->pgd);
+}
+
+static inline void
+update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
+{
+        struct mm_struct *mm = vma->vm_mm;
+printk("update_mmu_cache\n");
+        memc_update_addr(mm, pte, addr);
+}
+
+#endif
diff --git a/include/asm-arm26/topology.h b/include/asm-arm26/topology.h
new file mode 100644
index 000000000000..accbd7cad9b5
--- /dev/null
+++ b/include/asm-arm26/topology.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_ARM_TOPOLOGY_H
+#define _ASM_ARM_TOPOLOGY_H
+
+#include <asm-generic/topology.h>
+
+#endif /* _ASM_ARM_TOPOLOGY_H */
diff --git a/include/asm-arm26/types.h b/include/asm-arm26/types.h
new file mode 100644
index 000000000000..56cbe573a234
--- /dev/null
+++ b/include/asm-arm26/types.h
@@ -0,0 +1,61 @@
+#ifndef __ASM_ARM_TYPES_H
+#define __ASM_ARM_TYPES_H
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+#define BITS_PER_LONG 32
+
+#ifndef __ASSEMBLY__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+/* Dma addresses are 32-bits wide.  */
+
+typedef u32 dma_addr_t;
+typedef u32 dma64_addr_t;
+
+typedef unsigned int kmem_bufctl_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+#endif
diff --git a/include/asm-arm26/uaccess-asm.h b/include/asm-arm26/uaccess-asm.h
new file mode 100644
index 000000000000..19f798e338c9
--- /dev/null
+++ b/include/asm-arm26/uaccess-asm.h
@@ -0,0 +1,153 @@
+/*
+ *  linux/include/asm-arm/proc-armo/uaccess.h
+ *
+ *  Copyright (C) 1996 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * The fs functions are implemented on the ARM2 and ARM3 architectures
+ * manually.
+ * Use *_user functions to access user memory with faulting behaving
+ *   as though the user is accessing the memory.
+ * Use set_fs(get_ds()) and then the *_user functions to allow them to
+ *   access kernel memory.
+ */
+
+/*
+ * These are the values used to represent the user `fs' and the kernel `ds'
+ * FIXME - the KERNEL_DS should end at 0x03000000 but we want to access ROM at
+ * 0x03400000. ideally we want to forbid access to the IO space inbetween.
+ */
+#define KERNEL_DS       0x03FFFFFF
+#define USER_DS         0x02000000
+
+extern uaccess_t uaccess_user, uaccess_kernel;
+
+static inline void set_fs (mm_segment_t fs)
+{
+        current_thread_info()->addr_limit = fs;
+        current->thread.uaccess = (fs == USER_DS ? &uaccess_user : &uaccess_kernel);
+}
+
+#define __range_ok(addr,size) ({                                        \
+        unsigned long flag, sum;                                        \
+        __asm__ __volatile__("subs %1, %0, %3; cmpcs %1, %2; movcs %0, #0" \
+                : "=&r" (flag), "=&r" (sum)                             \
+                : "r" (addr), "Ir" (size), "0" (current_thread_info()->addr_limit)      \
+                : "cc");                                                \
+        flag; })
+
+#define __addr_ok(addr) ({                                              \
+        unsigned long flag;                                             \
+        __asm__ __volatile__("cmp %2, %0; movlo %0, #0"                 \
+                : "=&r" (flag)                                          \
+                : "0" (current_thread_info()->addr_limit), "r" (addr)   \
+                : "cc");                                                \
+        (flag == 0); })
+
+#define __put_user_asm_byte(x,addr,err)                                 \
+        __asm__ __volatile__(                                           \
+        "       mov     r0, %1\n"                                       \
+        "       mov     r1, %2\n"                                       \
+        "       mov     r2, %0\n"                                       \
+        "       mov     lr, pc\n"                                       \
+        "       mov     pc, %3\n"                                       \
+        "       mov     %0, r2\n"                                       \
+        : "=r" (err)                                                    \
+        : "r" (x), "r" (addr), "r" (current->thread.uaccess->put_byte), \
+          "0" (err)                                                     \
+        : "r0", "r1", "r2", "lr")
+
+#define __put_user_asm_half(x,addr,err)                                 \
+        __asm__ __volatile__(                                           \
+        "       mov     r0, %1\n"                                       \
+        "       mov     r1, %2\n"                                       \
+        "       mov     r2, %0\n"                                       \
+        "       mov     lr, pc\n"                                       \
+        "       mov     pc, %3\n"                                       \
+        "       mov     %0, r2\n"                                       \
+        : "=r" (err)                                                    \
+        : "r" (x), "r" (addr), "r" (current->thread.uaccess->put_half), \
+          "0" (err)                                                     \
+        : "r0", "r1", "r2", "lr")
+
+#define __put_user_asm_word(x,addr,err)                                 \
+        __asm__ __volatile__(                                           \
+        "       mov     r0, %1\n"                                       \
+        "       mov     r1, %2\n"                                       \
+        "       mov     r2, %0\n"                                       \
+        "       mov     lr, pc\n"                                       \
+        "       mov     pc, %3\n"                                       \
+        "       mov     %0, r2\n"                                       \
+        : "=r" (err)                                                    \
+        : "r" (x), "r" (addr), "r" (current->thread.uaccess->put_word), \
+          "0" (err)                                                     \
+        : "r0", "r1", "r2", "lr")
+
+#define __put_user_asm_dword(x,addr,err)                                 \
+        __asm__ __volatile__(                                           \
+        "       mov     r0, %1\n"                                       \
+        "       mov     r1, %2\n"                                       \
+        "       mov     r2, %0\n"                                       \
+        "       mov     lr, pc\n"                                       \
+        "       mov     pc, %3\n"                                       \
+        "       mov     %0, r2\n"                                       \
+        : "=r" (err)                                                    \
+        : "r" (x), "r" (addr), "r" (current->thread.uaccess->put_dword), \
+          "0" (err)                                                     \
+        : "r0", "r1", "r2", "lr")
+
+#define __get_user_asm_byte(x,addr,err)                                 \
+        __asm__ __volatile__(                                           \
+        "       mov     r0, %2\n"                                       \
+        "       mov     r1, %0\n"                                       \
+        "       mov     lr, pc\n"                                       \
+        "       mov     pc, %3\n"                                       \
+        "       mov     %0, r1\n"                                       \
+        "       mov     %1, r0\n"                                       \
+        : "=r" (err), "=r" (x)                                          \
+        : "r" (addr), "r" (current->thread.uaccess->get_byte), "0" (err)        \
+        : "r0", "r1", "r2", "lr")
+
+#define __get_user_asm_half(x,addr,err)                                 \
+        __asm__ __volatile__(                                           \
+        "       mov     r0, %2\n"                                       \
+        "       mov     r1, %0\n"                                       \
+        "       mov     lr, pc\n"                                       \
+        "       mov     pc, %3\n"                                       \
+        "       mov     %0, r1\n"                                       \
+        "       mov     %1, r0\n"                                       \
+        : "=r" (err), "=r" (x)                                          \
+        : "r" (addr), "r" (current->thread.uaccess->get_half), "0" (err)        \
+        : "r0", "r1", "r2", "lr")
+
+#define __get_user_asm_word(x,addr,err)                                 \
+        __asm__ __volatile__(                                           \
+        "       mov     r0, %2\n"                                       \
+        "       mov     r1, %0\n"                                       \
+        "       mov     lr, pc\n"                                       \
+        "       mov     pc, %3\n"                                       \
+        "       mov     %0, r1\n"                                       \
+        "       mov     %1, r0\n"                                       \
+        : "=r" (err), "=r" (x)                                          \
+        : "r" (addr), "r" (current->thread.uaccess->get_word), "0" (err)        \
+        : "r0", "r1", "r2", "lr")
+
+#define __do_copy_from_user(to,from,n)                                  \
+        (n) = current->thread.uaccess->copy_from_user((to),(from),(n))
+
+#define __do_copy_to_user(to,from,n)                                    \
+        (n) = current->thread.uaccess->copy_to_user((to),(from),(n))
+
+#define __do_clear_user(addr,sz)                                        \
+        (sz) = current->thread.uaccess->clear_user((addr),(sz))
+
+#define __do_strncpy_from_user(dst,src,count,res)                       \
+        (res) = current->thread.uaccess->strncpy_from_user(dst,src,count)
+
+#define __do_strnlen_user(s,n,res)                                      \
+        (res) = current->thread.uaccess->strnlen_user(s,n)
diff --git a/include/asm-arm26/uaccess.h b/include/asm-arm26/uaccess.h
new file mode 100644
index 000000000000..ab9ce38c6aec
--- /dev/null
+++ b/include/asm-arm26/uaccess.h
@@ -0,0 +1,299 @@
+#ifndef _ASMARM_UACCESS_H
+#define _ASMARM_UACCESS_H
+
+/*
+ * User space memory access functions
+ */
+#include <linux/sched.h>
+#include <asm/errno.h>
+
+#define VERIFY_READ 0
+#define VERIFY_WRITE 1
+
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue.  No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path.  This means when everything is well,
+ * we don't even have to jump over them.  Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry
+{
+        unsigned long insn, fixup;
+};
+
+/* Returns 0 if exception not found and fixup otherwise.  */
+extern unsigned long search_exception_table(unsigned long);
+extern int fixup_exception(struct pt_regs *regs);
+
+#define get_ds()        (KERNEL_DS)
+#define get_fs()        (current_thread_info()->addr_limit)
+#define segment_eq(a,b) ((a) == (b))
+
+#include <asm/uaccess-asm.h>
+
+#define access_ok(type,addr,size)       (__range_ok(addr,size) == 0)
+
+/* this function will go away soon - use access_ok() instead */
+static inline int __deprecated verify_area(int type, const void * addr, unsigned long size)
+{
+        return access_ok(type, addr, size) ? 0 : -EFAULT;
+}
+
+/*
+ * Single-value transfer routines.  They automatically use the right
+ * size if we just have the right pointer type.  Note that the functions
+ * which read from user space (*get_*) need to take care not to leak
+ * kernel data even if the calling code is buggy and fails to check
+ * the return value.  This means zeroing out the destination variable
+ * or buffer on error.  Normally this is done out of line by the
+ * fixup code, but there are a few places where it intrudes on the
+ * main code path.  When we only write to user space, there is no
+ * problem.
+ *
+ * The "__xxx" versions of the user access functions do not verify the
+ * address space - it must have been done previously with a separate
+ * "access_ok()" call.
+ *
+ * The "xxx_error" versions set the third argument to EFAULT if an
+ * error occurs, and leave it unchanged on success.  Note that these
+ * versions are void (ie, don't return a value as such).
+ */
+
+extern int __get_user_1(void *);
+extern int __get_user_2(void *);
+extern int __get_user_4(void *);
+extern int __get_user_8(void *);
+extern int __get_user_bad(void);
+
+#define __get_user_x(__r1,__p,__e,__s,__i...)                           \
+           __asm__ __volatile__ ("bl    __get_user_" #__s               \
+                : "=&r" (__e), "=r" (__r1)                              \
+                : "0" (__p)                                             \
+                : __i)
+
+#define get_user(x,p)                                                   \
+        ({                                                              \
+                const register typeof(*(p)) *__p asm("r0") = (p);       \
+                register typeof(*(p)) __r1 asm("r1");                   \
+                register int __e asm("r0");                             \
+                switch (sizeof(*(p))) {                                 \
+                case 1:                                                 \
+                        __get_user_x(__r1, __p, __e, 1, "lr");          \
+                        break;                                          \
+                case 2:                                                 \
+                        __get_user_x(__r1, __p, __e, 2, "r2", "lr");    \
+                        break;                                          \
+                case 4:                                                 \
+                        __get_user_x(__r1, __p, __e, 4, "lr");          \
+                        break;                                          \
+                case 8:                                                 \
+                        __get_user_x(__r1, __p, __e, 8, "lr");          \
+                        break;                                          \
+                default: __e = __get_user_bad(); break;                 \
+                }                                                       \
+                x = __r1;                                               \
+                __e;                                                    \
+        })
+
+
+#define __get_user(x,ptr)                                               \
+({                                                                      \
+        long __gu_err = 0;                                              \
+        __get_user_err((x),(ptr),__gu_err);                             \
+        __gu_err;                                                       \
+})
+
+#define __get_user_error(x,ptr,err)                                     \
+({                                                                      \
+        __get_user_err((x),(ptr),err);                                  \
+        (void) 0;                                                       \
+})
+
+#define __get_user_err(x,ptr,err)                                       \
+do {                                                                    \
+        unsigned long __gu_addr = (unsigned long)(ptr);                 \
+        unsigned long __gu_val;                                         \
+        switch (sizeof(*(ptr))) {                                       \
+        case 1: __get_user_asm_byte(__gu_val,__gu_addr,err);    break;  \
+        case 2: __get_user_asm_half(__gu_val,__gu_addr,err);    break;  \
+        case 4: __get_user_asm_word(__gu_val,__gu_addr,err);    break;  \
+        default: (__gu_val) = __get_user_bad();                         \
+        }                                                               \
+        (x) = (__typeof__(*(ptr)))__gu_val;                             \
+} while (0)
+
+extern int __put_user_1(void *, unsigned int);
+extern int __put_user_2(void *, unsigned int);
+extern int __put_user_4(void *, unsigned int);
+extern int __put_user_8(void *, unsigned long long);
+extern int __put_user_bad(void);
+
+#define __put_user_x(__r1,__p,__e,__s)                                  \
+           __asm__ __volatile__ (                                       \
+                __asmeq("%0", "r0") __asmeq("%2", "r1")                 \
+                "bl     __put_user_" #__s                               \
+                : "=&r" (__e)                                           \
+                : "0" (__p), "r" (__r1)                                 \
+                : "ip", "lr", "cc")
+
+#define put_user(x,p)                                                   \
+        ({                                                              \
+                const register typeof(*(p)) __r1 asm("r1") = (x);       \
+                const register typeof(*(p)) *__p asm("r0") = (p);       \
+                register int __e asm("r0");                             \
+                switch (sizeof(*(__p))) {                               \
+                case 1:                                                 \
+                        __put_user_x(__r1, __p, __e, 1);                \
+                        break;                                          \
+                case 2:                                                 \
+                        __put_user_x(__r1, __p, __e, 2);                \
+                        break;                                          \
+                case 4:                                                 \
+                        __put_user_x(__r1, __p, __e, 4);                \
+                        break;                                          \
+                case 8:                                                 \
+                        __put_user_x(__r1, __p, __e, 8);                \
+                        break;                                          \
+                default: __e = __put_user_bad(); break;                 \
+                }                                                       \
+                __e;                                                    \
+        })
+
+#if 0
+/*********************   OLD METHOD *******************/
+#define __put_user_x(__r1,__p,__e,__s,__i...)                           \
+           __asm__ __volatile__ ("bl    __put_user_" #__s               \
+                : "=&r" (__e)                                           \
+                : "0" (__p), "r" (__r1)                                 \
+                : __i)
+
+#define put_user(x,p)                                                   \
+        ({                                                              \
+                const register typeof(*(p)) __r1 asm("r1") = (x);       \
+                const register typeof(*(p)) *__p asm("r0") = (p);       \
+                register int __e asm("r0");                             \
+                switch (sizeof(*(p))) {                                 \
+                case 1:                                                 \
+                        __put_user_x(__r1, __p, __e, 1, "r2", "lr");    \
+                        break;                                          \
+                case 2:                                                 \
+                        __put_user_x(__r1, __p, __e, 2, "r2", "lr");    \
+                        break;                                          \
+                case 4:                                                 \
+                        __put_user_x(__r1, __p, __e, 4, "r2", "lr");    \
+                        break;                                          \
+                case 8:                                                 \
+                        __put_user_x(__r1, __p, __e, 8, "r2", "ip", "lr");      \
+                        break;                                          \
+                default: __e = __put_user_bad(); break;                 \
+                }                                                       \
+                __e;                                                    \
+        })
+/*************************************************/
+#endif
+
+#define __put_user(x,ptr)                                               \
+({                                                                      \
+        long __pu_err = 0;                                              \
+        __put_user_err((x),(ptr),__pu_err);                             \
+        __pu_err;                                                       \
+})
+
+#define __put_user_error(x,ptr,err)                                     \
+({                                                                      \
+        __put_user_err((x),(ptr),err);                                  \
+        (void) 0;                                                       \
+})
+
+#define __put_user_err(x,ptr,err)                                       \
+do {                                                                    \
+        unsigned long __pu_addr = (unsigned long)(ptr);                 \
+        __typeof__(*(ptr)) __pu_val = (x);                              \
+        switch (sizeof(*(ptr))) {                                       \
+        case 1: __put_user_asm_byte(__pu_val,__pu_addr,err);    break;  \
+        case 2: __put_user_asm_half(__pu_val,__pu_addr,err);    break;  \
+        case 4: __put_user_asm_word(__pu_val,__pu_addr,err);    break;  \
+        case 8: __put_user_asm_dword(__pu_val,__pu_addr,err);   break;  \
+        default: __put_user_bad();                                      \
+        }                                                               \
+} while (0)
+
+static __inline__ unsigned long copy_from_user(void *to, const void *from, unsigned long n)
+{
+        if (access_ok(VERIFY_READ, from, n))
+                __do_copy_from_user(to, from, n);
+        else /* security hole - plug it */
+                memzero(to, n);
+        return n;
+}
+
+static __inline__ unsigned long __copy_from_user(void *to, const void *from, unsigned long n)
+{
+        __do_copy_from_user(to, from, n);
+        return n;
+}
+
+static __inline__ unsigned long copy_to_user(void *to, const void *from, unsigned long n)
+{
+        if (access_ok(VERIFY_WRITE, to, n))
+                __do_copy_to_user(to, from, n);
+        return n;
+}
+
+static __inline__ unsigned long __copy_to_user(void *to, const void *from, unsigned long n)
+{
+        __do_copy_to_user(to, from, n);
+        return n;
+}
+
+#define __copy_to_user_inatomic __copy_to_user
+#define __copy_from_user_inatomic __copy_from_user
+
+static __inline__ unsigned long clear_user (void *to, unsigned long n)
+{
+        if (access_ok(VERIFY_WRITE, to, n))
+                __do_clear_user(to, n);
+        return n;
+}
+
+static __inline__ unsigned long __clear_user (void *to, unsigned long n)
+{
+        __do_clear_user(to, n);
+        return n;
+}
+
+static __inline__ long strncpy_from_user (char *dst, const char *src, long count)
+{
+        long res = -EFAULT;
+        if (access_ok(VERIFY_READ, src, 1))
+                __do_strncpy_from_user(dst, src, count, res);
+        return res;
+}
+
+static __inline__ long __strncpy_from_user (char *dst, const char *src, long count)
+{
+        long res;
+        __do_strncpy_from_user(dst, src, count, res);
+        return res;
+}
+
+#define strlen_user(s)  strnlen_user(s, ~0UL >> 1)
+
+static inline long strnlen_user(const char *s, long n)
+{
+        unsigned long res = 0;
+
+        if (__addr_ok(s))
+                __do_strnlen_user(s, n, res);
+
+        return res;
+}
+
+#endif /* _ASMARM_UACCESS_H */
diff --git a/include/asm-arm26/ucontext.h b/include/asm-arm26/ucontext.h
new file mode 100644
index 000000000000..f853130137cc
--- /dev/null
+++ b/include/asm-arm26/ucontext.h
@@ -0,0 +1,12 @@
+#ifndef _ASMARM_UCONTEXT_H
+#define _ASMARM_UCONTEXT_H
+
+struct ucontext {
+        unsigned long     uc_flags;
+        struct ucontext  *uc_link;
+        stack_t           uc_stack;
+        struct sigcontext uc_mcontext;
+        sigset_t          uc_sigmask;   /* mask last for extensibility */
+};
+
+#endif /* !_ASMARM_UCONTEXT_H */
diff --git a/include/asm-arm26/unaligned.h b/include/asm-arm26/unaligned.h
new file mode 100644
index 000000000000..d992782089fd
--- /dev/null
+++ b/include/asm-arm26/unaligned.h
@@ -0,0 +1,118 @@
+#ifndef __ASM_ARM_UNALIGNED_H
+#define __ASM_ARM_UNALIGNED_H
+
+#include <asm/types.h>
+
+extern int __bug_unaligned_x(void *ptr);
+
+/*
+ * What is the most efficient way of loading/storing an unaligned value?
+ *
+ * That is the subject of this file.  Efficiency here is defined as
+ * minimum code size with minimum register usage for the common cases.
+ * It is currently not believed that long longs are common, so we
+ * trade efficiency for the chars, shorts and longs against the long
+ * longs.
+ *
+ * Current stats with gcc 2.7.2.2 for these functions:
+ *
+ *      ptrsize get:    code    regs    put:    code    regs
+ *      1               1       1               1       2
+ *      2               3       2               3       2
+ *      4               7       3               7       3
+ *      8               20      6               16      6
+ *
+ * gcc 2.95.1 seems to code differently:
+ *
+ *      ptrsize get:    code    regs    put:    code    regs
+ *      1               1       1               1       2
+ *      2               3       2               3       2
+ *      4               7       4               7       4
+ *      8               19      8               15      6
+ *
+ * which may or may not be more efficient (depending upon whether
+ * you can afford the extra registers).  Hopefully the gcc 2.95
+ * is inteligent enough to decide if it is better to use the
+ * extra register, but evidence so far seems to suggest otherwise.
+ *
+ * Unfortunately, gcc is not able to optimise the high word
+ * out of long long >> 32, or the low word from long long << 32
+ */
+
+#define __get_unaligned_2_le(__p)                                       \
+        (__p[0] | __p[1] << 8)
+
+#define __get_unaligned_4_le(__p)                                       \
+        (__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24)
+
+#define __get_unaligned_le(ptr)                                 \
+        ({                                                      \
+                __typeof__(*(ptr)) __v;                         \
+                __u8 *__p = (__u8 *)(ptr);                      \
+                switch (sizeof(*(ptr))) {                       \
+                case 1: __v = *(ptr);                   break;  \
+                case 2: __v = __get_unaligned_2_le(__p);        break;  \
+                case 4: __v = __get_unaligned_4_le(__p);        break;  \
+                case 8: {                                       \
+                                unsigned int __v1, __v2;        \
+                                __v2 = __get_unaligned_4_le((__p+4)); \
+                                __v1 = __get_unaligned_4_le(__p);       \
+                                __v = ((unsigned long long)__v2 << 32 | __v1);  \
+                        }                                       \
+                        break;                                  \
+                default: __v = __bug_unaligned_x(__p);  break;  \
+                }                                               \
+                __v;                                            \
+        })
+
+static inline void __put_unaligned_2_le(__u32 __v, register __u8 *__p)
+{
+        *__p++ = __v;
+        *__p++ = __v >> 8;
+}
+
+static inline void __put_unaligned_4_le(__u32 __v, register __u8 *__p)
+{
+        __put_unaligned_2_le(__v >> 16, __p + 2);
+        __put_unaligned_2_le(__v, __p);
+}
+
+static inline void __put_unaligned_8_le(const unsigned long long __v, register __u8 *__p)
+{
+        /*
+         * tradeoff: 8 bytes of stack for all unaligned puts (2
+         * instructions), or an extra register in the long long
+         * case - go for the extra register.
+         */
+        __put_unaligned_4_le(__v >> 32, __p+4);
+        __put_unaligned_4_le(__v, __p);
+}
+
+/*
+ * Try to store an unaligned value as efficiently as possible.
+ */
+#define __put_unaligned_le(val,ptr)                                     \
+        ({                                                      \
+                switch (sizeof(*(ptr))) {                       \
+                case 1:                                         \
+                        *(ptr) = (val);                         \
+                        break;                                  \
+                case 2: __put_unaligned_2_le((val),(__u8 *)(ptr));      \
+                        break;                                  \
+                case 4: __put_unaligned_4_le((val),(__u8 *)(ptr));      \
+                        break;                                  \
+                case 8: __put_unaligned_8_le((val),(__u8 *)(ptr)); \
+                        break;                                  \
+                default: __bug_unaligned_x(ptr);                \
+                        break;                                  \
+                }                                               \
+                (void) 0;                                       \
+        })
+
+/*
+ * Select endianness
+ */
+#define get_unaligned   __get_unaligned_le
+#define put_unaligned   __put_unaligned_le
+
+#endif
diff --git a/include/asm-arm26/uncompress.h b/include/asm-arm26/uncompress.h
new file mode 100644
index 000000000000..df2cba816a4e
--- /dev/null
+++ b/include/asm-arm26/uncompress.h
@@ -0,0 +1,111 @@
+/*
+ *  linux/include/asm-arm/arch-arc/uncompress.h
+ *
+ *  Copyright (C) 1996 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#define VIDMEM ((char *)0x02000000)
+ 
+int video_num_columns, video_num_lines, video_size_row;
+int white, bytes_per_char_h;
+extern unsigned long con_charconvtable[256];
+
+struct param_struct {
+        unsigned long page_size;
+        unsigned long nr_pages;
+        unsigned long ramdisk_size;
+        unsigned long mountrootrdonly;
+        unsigned long rootdev;
+        unsigned long video_num_cols;
+        unsigned long video_num_rows;
+        unsigned long video_x;
+        unsigned long video_y;
+        unsigned long memc_control_reg;
+        unsigned char sounddefault;
+        unsigned char adfsdrives;
+        unsigned char bytes_per_char_h;
+        unsigned char bytes_per_char_v;
+        unsigned long unused[256/4-11];
+};
+
+static struct param_struct *params = (struct param_struct *)0x0207c000;
+ 
+/*
+ * This does not append a newline
+ */
+static void puts(const char *s)
+{
+        extern void ll_write_char(char *, unsigned long);
+        int x,y;
+        unsigned char c;
+        char *ptr;
+
+        x = params->video_x;
+        y = params->video_y;
+
+        while ( ( c = *(unsigned char *)s++ ) != '\0' ) {
+                if ( c == '\n' ) {
+                        x = 0;
+                        if ( ++y >= video_num_lines ) {
+                                y--;
+                        }
+                } else {
+                        ptr = VIDMEM + ((y*video_num_columns*params->bytes_per_char_v+x)*bytes_per_char_h);
+                        ll_write_char(ptr, c|(white<<16));
+                        if ( ++x >= video_num_columns ) {
+                                x = 0;
+                                if ( ++y >= video_num_lines ) {
+                                        y--;
+                                }
+                        }
+                }
+        }
+
+        params->video_x = x;
+        params->video_y = y;
+}
+
+static void error(char *x);
+
+/*
+ * Setup for decompression
+ */
+static void arch_decomp_setup(void)
+{
+        int i;
+        
+        video_num_lines = params->video_num_rows;
+        video_num_columns = params->video_num_cols;
+        bytes_per_char_h = params->bytes_per_char_h;
+        video_size_row = video_num_columns * bytes_per_char_h;
+        if (bytes_per_char_h == 4)
+                for (i = 0; i < 256; i++)
+                        con_charconvtable[i] =
+                                (i & 128 ? 1 << 0  : 0) |
+                                (i & 64  ? 1 << 4  : 0) |
+                                (i & 32  ? 1 << 8  : 0) |
+                                (i & 16  ? 1 << 12 : 0) |
+                                (i & 8   ? 1 << 16 : 0) |
+                                (i & 4   ? 1 << 20 : 0) |
+                                (i & 2   ? 1 << 24 : 0) |
+                                (i & 1   ? 1 << 28 : 0);
+        else
+                for (i = 0; i < 16; i++)
+                        con_charconvtable[i] =
+                                (i & 8   ? 1 << 0  : 0) |
+                                (i & 4   ? 1 << 8  : 0) |
+                                (i & 2   ? 1 << 16 : 0) |
+                                (i & 1   ? 1 << 24 : 0);
+
+        white = bytes_per_char_h == 8 ? 0xfc : 7;
+
+        if (params->nr_pages * params->page_size < 4096*1024) error("<4M of mem\n");
+}
+
+/*
+ * nothing to do
+ */
+#define arch_decomp_wdog()
diff --git a/include/asm-arm26/unistd.h b/include/asm-arm26/unistd.h
new file mode 100644
index 000000000000..dfa0b0c30aa3
--- /dev/null
+++ b/include/asm-arm26/unistd.h
@@ -0,0 +1,500 @@
+/*
+ *  linux/include/asm-arm/unistd.h
+ *
+ *  Copyright (C) 2001-2003 Russell King
+ *  Modified 25/11/04 Ian Molton for arm26.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Please forward _all_ changes to this file to spyro@f2s.com
+ * no matter what the change is.  Thanks!
+ */
+#ifndef __ASM_ARM_UNISTD_H
+#define __ASM_ARM_UNISTD_H
+
+#include <linux/linkage.h>
+
+#define __NR_SYSCALL_BASE       0x900000
+
+/*
+ * This file contains the system call numbers.
+ */
+
+#define __NR_restart_syscall            (__NR_SYSCALL_BASE+  0)
+#define __NR_exit                       (__NR_SYSCALL_BASE+  1)
+#define __NR_fork                       (__NR_SYSCALL_BASE+  2)
+#define __NR_read                       (__NR_SYSCALL_BASE+  3)
+#define __NR_write                      (__NR_SYSCALL_BASE+  4)
+#define __NR_open                       (__NR_SYSCALL_BASE+  5)
+#define __NR_close                      (__NR_SYSCALL_BASE+  6)
+                                        /* 7 was sys_waitpid */
+#define __NR_creat                      (__NR_SYSCALL_BASE+  8)
+#define __NR_link                       (__NR_SYSCALL_BASE+  9)
+#define __NR_unlink                     (__NR_SYSCALL_BASE+ 10)
+#define __NR_execve                     (__NR_SYSCALL_BASE+ 11)
+#define __NR_chdir                      (__NR_SYSCALL_BASE+ 12)
+#define __NR_time                       (__NR_SYSCALL_BASE+ 13)
+#define __NR_mknod                      (__NR_SYSCALL_BASE+ 14)
+#define __NR_chmod                      (__NR_SYSCALL_BASE+ 15)
+#define __NR_lchown                     (__NR_SYSCALL_BASE+ 16)
+                                        /* 17 was sys_break */
+                                        /* 18 was sys_stat */
+#define __NR_lseek                      (__NR_SYSCALL_BASE+ 19)
+#define __NR_getpid                     (__NR_SYSCALL_BASE+ 20)
+#define __NR_mount                      (__NR_SYSCALL_BASE+ 21)
+#define __NR_umount                     (__NR_SYSCALL_BASE+ 22)
+#define __NR_setuid                     (__NR_SYSCALL_BASE+ 23)
+#define __NR_getuid                     (__NR_SYSCALL_BASE+ 24)
+#define __NR_stime                      (__NR_SYSCALL_BASE+ 25)
+#define __NR_ptrace                     (__NR_SYSCALL_BASE+ 26)
+#define __NR_alarm                      (__NR_SYSCALL_BASE+ 27)
+                                        /* 28 was sys_fstat */
+#define __NR_pause                      (__NR_SYSCALL_BASE+ 29)
+#define __NR_utime                      (__NR_SYSCALL_BASE+ 30)
+                                        /* 31 was sys_stty */
+                                        /* 32 was sys_gtty */
+#define __NR_access                     (__NR_SYSCALL_BASE+ 33)
+#define __NR_nice                       (__NR_SYSCALL_BASE+ 34)
+                                        /* 35 was sys_ftime */
+#define __NR_sync                       (__NR_SYSCALL_BASE+ 36)
+#define __NR_kill                       (__NR_SYSCALL_BASE+ 37)
+#define __NR_rename                     (__NR_SYSCALL_BASE+ 38)
+#define __NR_mkdir                      (__NR_SYSCALL_BASE+ 39)
+#define __NR_rmdir                      (__NR_SYSCALL_BASE+ 40)
+#define __NR_dup                        (__NR_SYSCALL_BASE+ 41)
+#define __NR_pipe                       (__NR_SYSCALL_BASE+ 42)
+#define __NR_times                      (__NR_SYSCALL_BASE+ 43)
+                                        /* 44 was sys_prof */
+#define __NR_brk                        (__NR_SYSCALL_BASE+ 45)
+#define __NR_setgid                     (__NR_SYSCALL_BASE+ 46)
+#define __NR_getgid                     (__NR_SYSCALL_BASE+ 47)
+                                        /* 48 was sys_signal */
+#define __NR_geteuid                    (__NR_SYSCALL_BASE+ 49)
+#define __NR_getegid                    (__NR_SYSCALL_BASE+ 50)
+#define __NR_acct                       (__NR_SYSCALL_BASE+ 51)
+#define __NR_umount2                    (__NR_SYSCALL_BASE+ 52)
+                                        /* 53 was sys_lock */
+#define __NR_ioctl                      (__NR_SYSCALL_BASE+ 54)
+#define __NR_fcntl                      (__NR_SYSCALL_BASE+ 55)
+                                        /* 56 was sys_mpx */
+#define __NR_setpgid                    (__NR_SYSCALL_BASE+ 57)
+                                        /* 58 was sys_ulimit */
+                                        /* 59 was sys_olduname */
+#define __NR_umask                      (__NR_SYSCALL_BASE+ 60)
+#define __NR_chroot                     (__NR_SYSCALL_BASE+ 61)
+#define __NR_ustat                      (__NR_SYSCALL_BASE+ 62)
+#define __NR_dup2                       (__NR_SYSCALL_BASE+ 63)
+#define __NR_getppid                    (__NR_SYSCALL_BASE+ 64)
+#define __NR_getpgrp                    (__NR_SYSCALL_BASE+ 65)
+#define __NR_setsid                     (__NR_SYSCALL_BASE+ 66)
+#define __NR_sigaction                  (__NR_SYSCALL_BASE+ 67)
+                                        /* 68 was sys_sgetmask */
+                                        /* 69 was sys_ssetmask */
+#define __NR_setreuid                   (__NR_SYSCALL_BASE+ 70)
+#define __NR_setregid                   (__NR_SYSCALL_BASE+ 71)
+#define __NR_sigsuspend                 (__NR_SYSCALL_BASE+ 72)
+#define __NR_sigpending                 (__NR_SYSCALL_BASE+ 73)
+#define __NR_sethostname                (__NR_SYSCALL_BASE+ 74)
+#define __NR_setrlimit                  (__NR_SYSCALL_BASE+ 75)
+#define __NR_getrlimit                  (__NR_SYSCALL_BASE+ 76) /* Back compat 2GB limited rlimit */
+#define __NR_getrusage                  (__NR_SYSCALL_BASE+ 77)
+#define __NR_gettimeofday               (__NR_SYSCALL_BASE+ 78)
+#define __NR_settimeofday               (__NR_SYSCALL_BASE+ 79)
+#define __NR_getgroups                  (__NR_SYSCALL_BASE+ 80)
+#define __NR_setgroups                  (__NR_SYSCALL_BASE+ 81)
+#define __NR_select                     (__NR_SYSCALL_BASE+ 82)
+#define __NR_symlink                    (__NR_SYSCALL_BASE+ 83)
+                                        /* 84 was sys_lstat */
+#define __NR_readlink                   (__NR_SYSCALL_BASE+ 85)
+#define __NR_uselib                     (__NR_SYSCALL_BASE+ 86)
+#define __NR_swapon                     (__NR_SYSCALL_BASE+ 87)
+#define __NR_reboot                     (__NR_SYSCALL_BASE+ 88)
+#define __NR_readdir                    (__NR_SYSCALL_BASE+ 89)
+#define __NR_mmap                       (__NR_SYSCALL_BASE+ 90)
+#define __NR_munmap                     (__NR_SYSCALL_BASE+ 91)
+#define __NR_truncate                   (__NR_SYSCALL_BASE+ 92)
+#define __NR_ftruncate                  (__NR_SYSCALL_BASE+ 93)
+#define __NR_fchmod                     (__NR_SYSCALL_BASE+ 94)
+#define __NR_fchown                     (__NR_SYSCALL_BASE+ 95)
+#define __NR_getpriority                (__NR_SYSCALL_BASE+ 96)
+#define __NR_setpriority                (__NR_SYSCALL_BASE+ 97)
+                                        /* 98 was sys_profil */
+#define __NR_statfs                     (__NR_SYSCALL_BASE+ 99)
+#define __NR_fstatfs                    (__NR_SYSCALL_BASE+100)
+                                        /* 101 was sys_ioperm */
+#define __NR_socketcall                 (__NR_SYSCALL_BASE+102)
+#define __NR_syslog                     (__NR_SYSCALL_BASE+103)
+#define __NR_setitimer                  (__NR_SYSCALL_BASE+104)
+#define __NR_getitimer                  (__NR_SYSCALL_BASE+105)
+#define __NR_stat                       (__NR_SYSCALL_BASE+106)
+#define __NR_lstat                      (__NR_SYSCALL_BASE+107)
+#define __NR_fstat                      (__NR_SYSCALL_BASE+108)
+                                        /* 109 was sys_uname */
+                                        /* 110 was sys_iopl */
+#define __NR_vhangup                    (__NR_SYSCALL_BASE+111)
+                                        /* 112 was sys_idle */
+#define __NR_syscall                    (__NR_SYSCALL_BASE+113) /* syscall to call a syscall! */
+#define __NR_wait4                      (__NR_SYSCALL_BASE+114)
+#define __NR_swapoff                    (__NR_SYSCALL_BASE+115)
+#define __NR_sysinfo                    (__NR_SYSCALL_BASE+116)
+#define __NR_ipc                        (__NR_SYSCALL_BASE+117)
+#define __NR_fsync                      (__NR_SYSCALL_BASE+118)
+#define __NR_sigreturn                  (__NR_SYSCALL_BASE+119)
+#define __NR_clone                      (__NR_SYSCALL_BASE+120)
+#define __NR_setdomainname              (__NR_SYSCALL_BASE+121)
+#define __NR_uname                      (__NR_SYSCALL_BASE+122)
+                                        /* 123 was sys_modify_ldt */
+#define __NR_adjtimex                   (__NR_SYSCALL_BASE+124)
+#define __NR_mprotect                   (__NR_SYSCALL_BASE+125)
+#define __NR_sigprocmask                (__NR_SYSCALL_BASE+126)
+                                        /* 127 was sys_create_module */
+#define __NR_init_module                (__NR_SYSCALL_BASE+128)
+#define __NR_delete_module              (__NR_SYSCALL_BASE+129)
+                                        /* 130 was sys_get_kernel_syms */
+#define __NR_quotactl                   (__NR_SYSCALL_BASE+131)
+#define __NR_getpgid                    (__NR_SYSCALL_BASE+132)
+#define __NR_fchdir                     (__NR_SYSCALL_BASE+133)
+#define __NR_bdflush                    (__NR_SYSCALL_BASE+134)
+#define __NR_sysfs                      (__NR_SYSCALL_BASE+135)
+#define __NR_personality                (__NR_SYSCALL_BASE+136)
+                                        /* 137 was sys_afs_syscall */
+#define __NR_setfsuid                   (__NR_SYSCALL_BASE+138)
+#define __NR_setfsgid                   (__NR_SYSCALL_BASE+139)
+#define __NR__llseek                    (__NR_SYSCALL_BASE+140)
+#define __NR_getdents                   (__NR_SYSCALL_BASE+141)
+#define __NR__newselect                 (__NR_SYSCALL_BASE+142)
+#define __NR_flock                      (__NR_SYSCALL_BASE+143)
+#define __NR_msync                      (__NR_SYSCALL_BASE+144)
+#define __NR_readv                      (__NR_SYSCALL_BASE+145)
+#define __NR_writev                     (__NR_SYSCALL_BASE+146)
+#define __NR_getsid                     (__NR_SYSCALL_BASE+147)
+#define __NR_fdatasync                  (__NR_SYSCALL_BASE+148)
+#define __NR__sysctl                    (__NR_SYSCALL_BASE+149)
+#define __NR_mlock                      (__NR_SYSCALL_BASE+150)
+#define __NR_munlock                    (__NR_SYSCALL_BASE+151)
+#define __NR_mlockall                   (__NR_SYSCALL_BASE+152)
+#define __NR_munlockall                 (__NR_SYSCALL_BASE+153)
+#define __NR_sched_setparam             (__NR_SYSCALL_BASE+154)
+#define __NR_sched_getparam             (__NR_SYSCALL_BASE+155)
+#define __NR_sched_setscheduler         (__NR_SYSCALL_BASE+156)
+#define __NR_sched_getscheduler         (__NR_SYSCALL_BASE+157)
+#define __NR_sched_yield                (__NR_SYSCALL_BASE+158)
+#define __NR_sched_get_priority_max     (__NR_SYSCALL_BASE+159)
+#define __NR_sched_get_priority_min     (__NR_SYSCALL_BASE+160)
+#define __NR_sched_rr_get_interval      (__NR_SYSCALL_BASE+161)
+#define __NR_nanosleep                  (__NR_SYSCALL_BASE+162)
+#define __NR_mremap                     (__NR_SYSCALL_BASE+163)
+#define __NR_setresuid                  (__NR_SYSCALL_BASE+164)
+#define __NR_getresuid                  (__NR_SYSCALL_BASE+165)
+                                        /* 166 was sys_vm86 */
+                                        /* 167 was sys_query_module */
+#define __NR_poll                       (__NR_SYSCALL_BASE+168)
+#define __NR_nfsservctl                 (__NR_SYSCALL_BASE+169)
+#define __NR_setresgid                  (__NR_SYSCALL_BASE+170)
+#define __NR_getresgid                  (__NR_SYSCALL_BASE+171)
+#define __NR_prctl                      (__NR_SYSCALL_BASE+172)
+#define __NR_rt_sigreturn               (__NR_SYSCALL_BASE+173)
+#define __NR_rt_sigaction               (__NR_SYSCALL_BASE+174)
+#define __NR_rt_sigprocmask             (__NR_SYSCALL_BASE+175)
+#define __NR_rt_sigpending              (__NR_SYSCALL_BASE+176)
+#define __NR_rt_sigtimedwait            (__NR_SYSCALL_BASE+177)
+#define __NR_rt_sigqueueinfo            (__NR_SYSCALL_BASE+178)
+#define __NR_rt_sigsuspend              (__NR_SYSCALL_BASE+179)
+#define __NR_pread64                    (__NR_SYSCALL_BASE+180)
+#define __NR_pwrite64                   (__NR_SYSCALL_BASE+181)
+#define __NR_chown                      (__NR_SYSCALL_BASE+182)
+#define __NR_getcwd                     (__NR_SYSCALL_BASE+183)
+#define __NR_capget                     (__NR_SYSCALL_BASE+184)
+#define __NR_capset                     (__NR_SYSCALL_BASE+185)
+#define __NR_sigaltstack                (__NR_SYSCALL_BASE+186)
+#define __NR_sendfile                   (__NR_SYSCALL_BASE+187)
+                                        /* 188 reserved */
+                                        /* 189 reserved */
+#define __NR_vfork                      (__NR_SYSCALL_BASE+190)
+#define __NR_ugetrlimit                 (__NR_SYSCALL_BASE+191) /* SuS compliant getrlimit */
+#define __NR_mmap2                      (__NR_SYSCALL_BASE+192)
+#define __NR_truncate64                 (__NR_SYSCALL_BASE+193)
+#define __NR_ftruncate64                (__NR_SYSCALL_BASE+194)
+#define __NR_stat64                     (__NR_SYSCALL_BASE+195)
+#define __NR_lstat64                    (__NR_SYSCALL_BASE+196)
+#define __NR_fstat64                    (__NR_SYSCALL_BASE+197)
+#define __NR_lchown32                   (__NR_SYSCALL_BASE+198)
+#define __NR_getuid32                   (__NR_SYSCALL_BASE+199)
+#define __NR_getgid32                   (__NR_SYSCALL_BASE+200)
+#define __NR_geteuid32                  (__NR_SYSCALL_BASE+201)
+#define __NR_getegid32                  (__NR_SYSCALL_BASE+202)
+#define __NR_setreuid32                 (__NR_SYSCALL_BASE+203)
+#define __NR_setregid32                 (__NR_SYSCALL_BASE+204)
+#define __NR_getgroups32                (__NR_SYSCALL_BASE+205)
+#define __NR_setgroups32                (__NR_SYSCALL_BASE+206)
+#define __NR_fchown32                   (__NR_SYSCALL_BASE+207)
+#define __NR_setresuid32                (__NR_SYSCALL_BASE+208)
+#define __NR_getresuid32                (__NR_SYSCALL_BASE+209)
+#define __NR_setresgid32                (__NR_SYSCALL_BASE+210)
+#define __NR_getresgid32                (__NR_SYSCALL_BASE+211)
+#define __NR_chown32                    (__NR_SYSCALL_BASE+212)
+#define __NR_setuid32                   (__NR_SYSCALL_BASE+213)
+#define __NR_setgid32                   (__NR_SYSCALL_BASE+214)
+#define __NR_setfsuid32                 (__NR_SYSCALL_BASE+215)
+#define __NR_setfsgid32                 (__NR_SYSCALL_BASE+216)
+#define __NR_getdents64                 (__NR_SYSCALL_BASE+217)
+#define __NR_pivot_root                 (__NR_SYSCALL_BASE+218)
+#define __NR_mincore                    (__NR_SYSCALL_BASE+219)
+#define __NR_madvise                    (__NR_SYSCALL_BASE+220)
+#define __NR_fcntl64                    (__NR_SYSCALL_BASE+221)
+                                        /* 222 for tux */
+                                        /* 223 is unused */
+#define __NR_gettid                     (__NR_SYSCALL_BASE+224)
+#define __NR_readahead                  (__NR_SYSCALL_BASE+225)
+#define __NR_setxattr                   (__NR_SYSCALL_BASE+226)
+#define __NR_lsetxattr                  (__NR_SYSCALL_BASE+227)
+#define __NR_fsetxattr                  (__NR_SYSCALL_BASE+228)
+#define __NR_getxattr                   (__NR_SYSCALL_BASE+229)
+#define __NR_lgetxattr                  (__NR_SYSCALL_BASE+230)
+#define __NR_fgetxattr                  (__NR_SYSCALL_BASE+231)
+#define __NR_listxattr                  (__NR_SYSCALL_BASE+232)
+#define __NR_llistxattr                 (__NR_SYSCALL_BASE+233)
+#define __NR_flistxattr                 (__NR_SYSCALL_BASE+234)
+#define __NR_removexattr                (__NR_SYSCALL_BASE+235)
+#define __NR_lremovexattr               (__NR_SYSCALL_BASE+236)
+#define __NR_fremovexattr               (__NR_SYSCALL_BASE+237)
+#define __NR_tkill                      (__NR_SYSCALL_BASE+238)
+#define __NR_sendfile64                 (__NR_SYSCALL_BASE+239)
+#define __NR_futex                      (__NR_SYSCALL_BASE+240)
+#define __NR_sched_setaffinity          (__NR_SYSCALL_BASE+241)
+#define __NR_sched_getaffinity          (__NR_SYSCALL_BASE+242)
+#define __NR_io_setup                   (__NR_SYSCALL_BASE+243)
+#define __NR_io_destroy                 (__NR_SYSCALL_BASE+244)
+#define __NR_io_getevents               (__NR_SYSCALL_BASE+245)
+#define __NR_io_submit                  (__NR_SYSCALL_BASE+246)
+#define __NR_io_cancel                  (__NR_SYSCALL_BASE+247)
+#define __NR_exit_group                 (__NR_SYSCALL_BASE+248)
+#define __NR_lookup_dcookie             (__NR_SYSCALL_BASE+249)
+#define __NR_epoll_create               (__NR_SYSCALL_BASE+250)
+#define __NR_epoll_ctl                  (__NR_SYSCALL_BASE+251)
+#define __NR_epoll_wait                 (__NR_SYSCALL_BASE+252)
+#define __NR_remap_file_pages           (__NR_SYSCALL_BASE+253)
+                                        /* 254 for set_thread_area */
+                                        /* 255 for get_thread_area */
+                                        /* 256 for set_tid_address */
+#define __NR_timer_create               (__NR_SYSCALL_BASE+257)
+#define __NR_timer_settime              (__NR_SYSCALL_BASE+258)
+#define __NR_timer_gettime              (__NR_SYSCALL_BASE+259)
+#define __NR_timer_getoverrun           (__NR_SYSCALL_BASE+260)
+#define __NR_timer_delete               (__NR_SYSCALL_BASE+261)
+#define __NR_clock_settime              (__NR_SYSCALL_BASE+262)
+#define __NR_clock_gettime              (__NR_SYSCALL_BASE+263)
+#define __NR_clock_getres               (__NR_SYSCALL_BASE+264)
+#define __NR_clock_nanosleep            (__NR_SYSCALL_BASE+265)
+#define __NR_statfs64                   (__NR_SYSCALL_BASE+266)
+#define __NR_fstatfs64                  (__NR_SYSCALL_BASE+267)
+#define __NR_tgkill                     (__NR_SYSCALL_BASE+268)
+#define __NR_utimes                     (__NR_SYSCALL_BASE+269)
+#define __NR_fadvise64_64               (__NR_SYSCALL_BASE+270)
+#define __NR_pciconfig_iobase           (__NR_SYSCALL_BASE+271)
+#define __NR_pciconfig_read             (__NR_SYSCALL_BASE+272)
+#define __NR_pciconfig_write            (__NR_SYSCALL_BASE+273)
+#define __NR_mq_open                    (__NR_SYSCALL_BASE+274)
+#define __NR_mq_unlink                  (__NR_SYSCALL_BASE+275)
+#define __NR_mq_timedsend               (__NR_SYSCALL_BASE+276)
+#define __NR_mq_timedreceive            (__NR_SYSCALL_BASE+277)
+#define __NR_mq_notify                  (__NR_SYSCALL_BASE+278)
+#define __NR_mq_getsetattr              (__NR_SYSCALL_BASE+279)
+#define __NR_waitid                     (__NR_SYSCALL_BASE+280)
+
+/*
+ * The following SWIs are ARM private. FIXME - make appropriate for arm26
+ */
+#define __ARM_NR_BASE                   (__NR_SYSCALL_BASE+0x0f0000)
+#define __ARM_NR_breakpoint             (__ARM_NR_BASE+1)
+#define __ARM_NR_cacheflush             (__ARM_NR_BASE+2)
+#define __ARM_NR_usr26                  (__ARM_NR_BASE+3)
+
+#define __sys2(x) #x
+#define __sys1(x) __sys2(x)
+
+#ifndef __syscall
+#define __syscall(name) "swi\t" __sys1(__NR_##name) ""
+#endif
+
+#define __syscall_return(type, res)                                     \
+do {                                                                    \
+        if ((unsigned long)(res) >= (unsigned long)(-125)) {            \
+                errno = -(res);                                         \
+                res = -1;                                               \
+        }                                                               \
+        return (type) (res);                                            \
+} while (0)
+
+#define _syscall0(type,name)                                            \
+type name(void) {                                                       \
+  register long __res_r0 __asm__("r0");                                 \
+  long __res;                                                           \
+  __asm__ __volatile__ (                                                \
+  __syscall(name)                                                       \
+        : "=r" (__res_r0)                                               \
+        :                                                               \
+        : "lr");                                                        \
+  __res = __res_r0;                                                     \
+  __syscall_return(type,__res);                                         \
+}
+
+#define _syscall1(type,name,type1,arg1)                                 \
+type name(type1 arg1) {                                                 \
+  register long __r0 __asm__("r0") = (long)arg1;                        \
+  register long __res_r0 __asm__("r0");                                 \
+  long __res;                                                           \
+  __asm__ __volatile__ (                                                \
+  __syscall(name)                                                       \
+        : "=r" (__res_r0)                                               \
+        : "r" (__r0)                                                    \
+        : "lr");                                                        \
+  __res = __res_r0;                                                     \
+  __syscall_return(type,__res);                                         \
+}
+
+#define _syscall2(type,name,type1,arg1,type2,arg2)                      \
+type name(type1 arg1,type2 arg2) {                                      \
+  register long __r0 __asm__("r0") = (long)arg1;                        \
+  register long __r1 __asm__("r1") = (long)arg2;                        \
+  register long __res_r0 __asm__("r0");                                 \
+  long __res;                                                           \
+  __asm__ __volatile__ (                                                \
+  __syscall(name)                                                       \
+        : "=r" (__res_r0)                                               \
+        : "r" (__r0),"r" (__r1)                                         \
+        : "lr");                                                        \
+  __res = __res_r0;                                                     \
+  __syscall_return(type,__res);                                         \
+}
+
+
+#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3)           \
+type name(type1 arg1,type2 arg2,type3 arg3) {                           \
+  register long __r0 __asm__("r0") = (long)arg1;                        \
+  register long __r1 __asm__("r1") = (long)arg2;                        \
+  register long __r2 __asm__("r2") = (long)arg3;                        \
+  register long __res_r0 __asm__("r0");                                 \
+  long __res;                                                           \
+  __asm__ __volatile__ (                                                \
+  __syscall(name)                                                       \
+        : "=r" (__res_r0)                                               \
+        : "r" (__r0),"r" (__r1),"r" (__r2)                              \
+        : "lr");                                                        \
+  __res = __res_r0;                                                     \
+  __syscall_return(type,__res);                                         \
+}
+
+
+#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\
+type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) {             \
+  register long __r0 __asm__("r0") = (long)arg1;                        \
+  register long __r1 __asm__("r1") = (long)arg2;                        \
+  register long __r2 __asm__("r2") = (long)arg3;                        \
+  register long __r3 __asm__("r3") = (long)arg4;                        \
+  register long __res_r0 __asm__("r0");                                 \
+  long __res;                                                           \
+  __asm__ __volatile__ (                                                \
+  __syscall(name)                                                       \
+        : "=r" (__res_r0)                                               \
+        : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3)                   \
+        : "lr");                                                        \
+  __res = __res_r0;                                                     \
+  __syscall_return(type,__res);                                         \
+}
+  
+
+#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5)     \
+type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
+  register long __r0 __asm__("r0") = (long)arg1;                        \
+  register long __r1 __asm__("r1") = (long)arg2;                        \
+  register long __r2 __asm__("r2") = (long)arg3;                        \
+  register long __r3 __asm__("r3") = (long)arg4;                        \
+  register long __r4 __asm__("r4") = (long)arg5;                        \
+  register long __res_r0 __asm__("r0");                                 \
+  long __res;                                                           \
+  __asm__ __volatile__ (                                                \
+  __syscall(name)                                                       \
+        : "=r" (__res_r0)                                               \
+        : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3),"r" (__r4)        \
+        : "lr");                                                        \
+  __res = __res_r0;                                                     \
+  __syscall_return(type,__res);                                         \
+}
+
+#define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6)  \
+type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) {     \
+  register long __r0 __asm__("r0") = (long)arg1;                        \
+  register long __r1 __asm__("r1") = (long)arg2;                        \
+  register long __r2 __asm__("r2") = (long)arg3;                        \
+  register long __r3 __asm__("r3") = (long)arg4;                        \
+  register long __r4 __asm__("r4") = (long)arg5;                        \
+  register long __r5 __asm__("r5") = (long)arg6;                        \
+  register long __res_r0 __asm__("r0");                                 \
+  long __res;                                                           \
+  __asm__ __volatile__ (                                                \
+  __syscall(name)                                                       \
+        : "=r" (__res_r0)                                               \
+        : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3), "r" (__r4),"r" (__r5)            \
+        : "lr");                                                        \
+  __res = __res_r0;                                                     \
+  __syscall_return(type,__res);                                         \
+}
+
+#ifdef __KERNEL__
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_OLD_READDIR
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_SOCKETCALL
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_OLD_GETRLIMIT
+#define __ARCH_WANT_SYS_OLDUMOUNT
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_SYS_RT_SIGACTION
+#endif
+
+#ifdef __KERNEL_SYSCALLS__
+
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <linux/syscalls.h>
+
+extern long execve(const char *file, char **argv, char **envp);
+
+struct pt_regs;
+asmlinkage int sys_execve(char *filenamei, char **argv, char **envp,
+                        struct pt_regs *regs);
+asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
+                        struct pt_regs *regs);
+asmlinkage int sys_fork(struct pt_regs *regs);
+asmlinkage int sys_vfork(struct pt_regs *regs);
+asmlinkage int sys_pipe(unsigned long *fildes);
+asmlinkage int sys_ptrace(long request, long pid, long addr, long data);
+struct sigaction;
+asmlinkage long sys_rt_sigaction(int sig,
+                                const struct sigaction __user *act,
+                                struct sigaction __user *oact,
+                                size_t sigsetsize);
+
+#endif
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
+
+#endif /* __ASM_ARM_UNISTD_H */
diff --git a/include/asm-arm26/user.h b/include/asm-arm26/user.h
new file mode 100644
index 000000000000..3e8b0f879159
--- /dev/null
+++ b/include/asm-arm26/user.h
@@ -0,0 +1,84 @@
+#ifndef _ARM_USER_H
+#define _ARM_USER_H
+
+#include <asm/page.h>
+#include <asm/ptrace.h>
+/* Core file format: The core file is written in such a way that gdb
+   can understand it and provide useful information to the user (under
+   linux we use the 'trad-core' bfd).  There are quite a number of
+   obstacles to being able to view the contents of the floating point
+   registers, and until these are solved you will not be able to view the
+   contents of them.  Actually, you can read in the core file and look at
+   the contents of the user struct to find out what the floating point
+   registers contain.
+   The actual file contents are as follows:
+   UPAGE: 1 page consisting of a user struct that tells gdb what is present
+   in the file.  Directly after this is a copy of the task_struct, which
+   is currently not used by gdb, but it may come in useful at some point.
+   All of the registers are stored as part of the upage.  The upage should
+   always be only one page.
+   DATA: The data area is stored.  We use current->end_text to
+   current->brk to pick up all of the user variables, plus any memory
+   that may have been malloced.  No attempt is made to determine if a page
+   is demand-zero or if a page is totally unused, we just cover the entire
+   range.  All of the addresses are rounded in such a way that an integral
+   number of pages is written.
+   STACK: We need the stack information in order to get a meaningful
+   backtrace.  We need to write the data from (esp) to
+   current->start_stack, so we round each of these off in order to be able
+   to write an integer number of pages.
+   The minimum core file size is 3 pages, or 12288 bytes.
+*/
+
+struct user_fp {
+        struct fp_reg {
+                unsigned int sign1:1;
+                unsigned int unused:15;
+                unsigned int sign2:1;
+                unsigned int exponent:14;
+                unsigned int j:1;
+                unsigned int mantissa1:31;
+                unsigned int mantissa0:32;
+        } fpregs[8];
+        unsigned int fpsr:32;
+        unsigned int fpcr:32;
+        unsigned char ftype[8];
+        unsigned int init_flag;
+};
+
+/* When the kernel dumps core, it starts by dumping the user struct -
+   this will be used by gdb to figure out where the data and stack segments
+   are within the file, and what virtual addresses to use. */
+struct user{
+/* We start with the registers, to mimic the way that "memory" is returned
+   from the ptrace(3,...) function.  */
+  struct pt_regs regs;          /* Where the registers are actually stored */
+/* ptrace does not yet supply these.  Someday.... */
+  int u_fpvalid;                /* True if math co-processor being used. */
+                                /* for this mess. Not yet used. */
+/* The rest of this junk is to help gdb figure out what goes where */
+  unsigned long int u_tsize;    /* Text segment size (pages). */
+  unsigned long int u_dsize;    /* Data segment size (pages). */
+  unsigned long int u_ssize;    /* Stack segment size (pages). */
+  unsigned long start_code;     /* Starting virtual address of text. */
+  unsigned long start_stack;    /* Starting virtual address of stack area.
+                                   This is actually the bottom of the stack,
+                                   the top of the stack is always found in the
+                                   esp register.  */
+  long int signal;              /* Signal that caused the core dump. */
+  int reserved;                 /* No longer used */
+  struct pt_regs * u_ar0;       /* Used by gdb to help find the values for */
+                                /* the registers. */
+  unsigned long magic;          /* To uniquely identify a core file */
+  char u_comm[32];              /* User command that was responsible */
+  int u_debugreg[8];
+  struct user_fp u_fp;          /* FP state */
+  struct user_fp_struct * u_fp0;/* Used by gdb to help find the values for */
+                                /* the FP registers. */
+};
+#define NBPG PAGE_SIZE
+#define UPAGES 1
+#define HOST_TEXT_START_ADDR (u.start_code)
+#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
+
+#endif /* _ARM_USER_H */
diff --git a/include/asm-arm26/xor.h b/include/asm-arm26/xor.h
new file mode 100644
index 000000000000..e7c4cf58bed1
--- /dev/null
+++ b/include/asm-arm26/xor.h
@@ -0,0 +1,141 @@
+/*
+ *  linux/include/asm-arm/xor.h
+ *
+ *  Copyright (C) 2001 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm-generic/xor.h>
+
+#define __XOR(a1, a2) a1 ^= a2
+
+#define GET_BLOCK_2(dst) \
+        __asm__("ldmia  %0, {%1, %2}" \
+                : "=r" (dst), "=r" (a1), "=r" (a2) \
+                : "0" (dst))
+
+#define GET_BLOCK_4(dst) \
+        __asm__("ldmia  %0, {%1, %2, %3, %4}" \
+                : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \
+                : "0" (dst))
+
+#define XOR_BLOCK_2(src) \
+        __asm__("ldmia  %0!, {%1, %2}" \
+                : "=r" (src), "=r" (b1), "=r" (b2) \
+                : "0" (src)); \
+        __XOR(a1, b1); __XOR(a2, b2);
+
+#define XOR_BLOCK_4(src) \
+        __asm__("ldmia  %0!, {%1, %2, %3, %4}" \
+                : "=r" (src), "=r" (b1), "=r" (b2), "=r" (b3), "=r" (b4) \
+                : "0" (src)); \
+        __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)
+
+#define PUT_BLOCK_2(dst) \
+        __asm__ __volatile__("stmia     %0!, {%2, %3}" \
+                : "=r" (dst) \
+                : "0" (dst), "r" (a1), "r" (a2))
+
+#define PUT_BLOCK_4(dst) \
+        __asm__ __volatile__("stmia     %0!, {%2, %3, %4, %5}" \
+                : "=r" (dst) \
+                : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4))
+
+static void
+xor_arm4regs_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
+{
+        unsigned int lines = bytes / sizeof(unsigned long) / 4;
+        register unsigned int a1 __asm__("r4");
+        register unsigned int a2 __asm__("r5");
+        register unsigned int a3 __asm__("r6");
+        register unsigned int a4 __asm__("r7");
+        register unsigned int b1 __asm__("r8");
+        register unsigned int b2 __asm__("r9");
+        register unsigned int b3 __asm__("ip");
+        register unsigned int b4 __asm__("lr");
+
+        do {
+                GET_BLOCK_4(p1);
+                XOR_BLOCK_4(p2);
+                PUT_BLOCK_4(p1);
+        } while (--lines);
+}
+
+static void
+xor_arm4regs_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
+                unsigned long *p3)
+{
+        unsigned int lines = bytes / sizeof(unsigned long) / 4;
+        register unsigned int a1 __asm__("r4");
+        register unsigned int a2 __asm__("r5");
+        register unsigned int a3 __asm__("r6");
+        register unsigned int a4 __asm__("r7");
+        register unsigned int b1 __asm__("r8");
+        register unsigned int b2 __asm__("r9");
+        register unsigned int b3 __asm__("ip");
+        register unsigned int b4 __asm__("lr");
+
+        do {
+                GET_BLOCK_4(p1);
+                XOR_BLOCK_4(p2);
+                XOR_BLOCK_4(p3);
+                PUT_BLOCK_4(p1);
+        } while (--lines);
+}
+
+static void
+xor_arm4regs_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
+                unsigned long *p3, unsigned long *p4)
+{
+        unsigned int lines = bytes / sizeof(unsigned long) / 2;
+        register unsigned int a1 __asm__("r8");
+        register unsigned int a2 __asm__("r9");
+        register unsigned int b1 __asm__("ip");
+        register unsigned int b2 __asm__("lr");
+
+        do {
+                GET_BLOCK_2(p1);
+                XOR_BLOCK_2(p2);
+                XOR_BLOCK_2(p3);
+                XOR_BLOCK_2(p4);
+                PUT_BLOCK_2(p1);
+        } while (--lines);
+}
+
+static void
+xor_arm4regs_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
+                unsigned long *p3, unsigned long *p4, unsigned long *p5)
+{
+        unsigned int lines = bytes / sizeof(unsigned long) / 2;
+        register unsigned int a1 __asm__("r8");
+        register unsigned int a2 __asm__("r9");
+        register unsigned int b1 __asm__("ip");
+        register unsigned int b2 __asm__("lr");
+
+        do {
+                GET_BLOCK_2(p1);
+                XOR_BLOCK_2(p2);
+                XOR_BLOCK_2(p3);
+                XOR_BLOCK_2(p4);
+                XOR_BLOCK_2(p5);
+                PUT_BLOCK_2(p1);
+        } while (--lines);
+}
+
+static struct xor_block_template xor_block_arm4regs = {
+        .name   = "arm4regs",
+        .do_2   = xor_arm4regs_2,
+        .do_3   = xor_arm4regs_3,
+        .do_4   = xor_arm4regs_4,
+        .do_5   = xor_arm4regs_5,
+};
+
+#undef XOR_TRY_TEMPLATES
+#define XOR_TRY_TEMPLATES                       \
+        do {                                    \
+                xor_speed(&xor_block_arm4regs); \
+                xor_speed(&xor_block_8regs);    \
+                xor_speed(&xor_block_32regs);   \
+        } while (0)