diff options
Diffstat (limited to 'include/asm-arm/vfpmacros.h')
| -rw-r--r-- | include/asm-arm/vfpmacros.h | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/include/asm-arm/vfpmacros.h b/include/asm-arm/vfpmacros.h index 27fe028b4e72..cccb3892e73c 100644 --- a/include/asm-arm/vfpmacros.h +++ b/include/asm-arm/vfpmacros.h | |||
| @@ -15,19 +15,33 @@ | |||
| 15 | .endm | 15 | .endm |
| 16 | 16 | ||
| 17 | @ read all the working registers back into the VFP | 17 | @ read all the working registers back into the VFP |
| 18 | .macro VFPFLDMIA, base | 18 | .macro VFPFLDMIA, base, tmp |
| 19 | #if __LINUX_ARM_ARCH__ < 6 | 19 | #if __LINUX_ARM_ARCH__ < 6 |
| 20 | LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} | 20 | LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} |
| 21 | #else | 21 | #else |
| 22 | LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15} | 22 | LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15} |
| 23 | #endif | 23 | #endif |
| 24 | #ifdef CONFIG_VFPv3 | ||
| 25 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | ||
| 26 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | ||
| 27 | cmp \tmp, #2 @ 32 x 64bit registers? | ||
| 28 | ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} | ||
| 29 | addne \base, \base, #32*4 @ step over unused register space | ||
| 30 | #endif | ||
| 24 | .endm | 31 | .endm |
| 25 | 32 | ||
| 26 | @ write all the working registers out of the VFP | 33 | @ write all the working registers out of the VFP |
| 27 | .macro VFPFSTMIA, base | 34 | .macro VFPFSTMIA, base, tmp |
| 28 | #if __LINUX_ARM_ARCH__ < 6 | 35 | #if __LINUX_ARM_ARCH__ < 6 |
| 29 | STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} | 36 | STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} |
| 30 | #else | 37 | #else |
| 31 | STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15} | 38 | STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15} |
| 32 | #endif | 39 | #endif |
| 40 | #ifdef CONFIG_VFPv3 | ||
| 41 | VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 | ||
| 42 | and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field | ||
| 43 | cmp \tmp, #2 @ 32 x 64bit registers? | ||
| 44 | stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} | ||
| 45 | addne \base, \base, #32*4 @ step over unused register space | ||
| 46 | #endif | ||
| 33 | .endm | 47 | .endm |
