aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-arm/tlbflush.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-arm/tlbflush.h')
-rw-r--r--include/asm-arm/tlbflush.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 9387a5e1ffe0..0c2acc944a0a 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -340,6 +340,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
340 asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr)); 340 asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr));
341 if (tlb_flag(TLB_V6_I_PAGE)) 341 if (tlb_flag(TLB_V6_I_PAGE))
342 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr)); 342 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr));
343
344 /* The ARM ARM states that the completion of a TLB maintenance
345 * operation is only guaranteed by a DSB instruction
346 */
347 if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE))
348 asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero));
343} 349}
344 350
345/* 351/*